Acer Aspire V5-132P Angel_CY 12313-1
ix 5 4 f ina 3 2 1 Angel_CY UMA Schematics Document IVY Bridge Intel PCH v D C C ANNIE: ONLY FOR ANNIE solut
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4
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Angel_CY UMA Schematics Document IVY Bridge Intel PCH
v
D
C
C
ANNIE: ONLY FOR ANNIE solution. PSL: KBC795 PSL circuit for 10mW solution installed. 10mW: External circuit for 10mW solution installed. 65W: for 65W adaptor installed. 90W: for 90W adaptor installed.
B
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B
h
in
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DY :None Installed DIS:DIS installed DIS_Muxless :BOTH DIS or Muxless installed DIS_PX:BOTH DIS or PX installed DIS_PX_Muxless:DIS or PX or Muxless installed. Muxless: Muxless installed.(PX4.0) PX:MUX installed.(PX3.0) PX_Muxless:BOTH PX or Muxless installed. UMA:UMA installed UMA_Muxless:BOTH UMA or Muxless installed UMA_PX_Muxless:UMA or PX or Muxless installed
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Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
A
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
Cover Page 5
4
http://vinafix.vn 3
2
Size A3
Document Number
Date:
Monday, April 22, 2013
Rev
1
Angel-CY Sheet 1
1
of
102
5
4
Project code : 91.4LJ01.001 fix a n i : vPCB P/N Revision : 12313-1
3
2
1
SYSTEM DC/DC
m
DDRIII 1066/1333 Channel A
IVY-Bridge FSB: 1066 MHz
TPS51640 INPUTS
o
DCBATOUT VCC_GFXCORE
SYSTEM DC/DC
4,5,6,7,8,9,10,11,12,13
Intel
DP
52
PCH HM77 Cougar Point
USB3.0 x 1+ USB2.0 x 1
USB 3.0 ports (4)
in
USB x 1
USB 2.0 ports (14) USB3.0 x 1
DCBATOUT
1D05V_VTT
h ACPI 1.1
Camera / Touch Sensor
USB2.0 x 1
Digital MIC array
w
Azalia CODEC
Flash ROM 8MB 60
1D8V_S0
2
SATA x1
HDD 56
INPUTS
OUTPUTS
5V_S5
0D85V_S0
L1:Top L2:VCC L3:Signal L4:GND
B
L5:Signal L6:Signal L7:GND L8:Bottom
LPC debug port 71 Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
NPCE885P
w
48
SY8037
SMBus
29
1D5V_S0
SYSTEM DC/DC
KBC
ALC3225
OUTPUTS
PCB LAYER
LPC Bus
Combo Mic 82
SPI
AZALIA
w
USB2.0 x 1
47
S-1339D INPUTS
SD/MMC
17,18,19,20,21,22,23,24,25,26
USB 2.0x 1
1D8V_S0
SYSTEM LOD Card Reader
.c
49
47
OUTPUTS
3D3V_S0
LPC I/F
B
SYSTEM DC/DC
INPUTS
PCIE 2.0 ports (8)
USB2.0 x 1
A
27
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Speaker(1W) Touch PAD69
5
C
1D35V_S3 0D675V_S0 DDR_VREF_S3
SYW232
3
SATA ports (6) 63
OUTPUTS
DCBATOUT
WLAN on Board 802.11a/b/g
46
RT8207 INPUTS
26
RTS5170
High Definition Audio
USB 3.0x 1
A
OUTPUTS
a
mDP
PCIE x1 USB x1
INPUTS
SYSTEM DC/DC
x
C
DMIx4
fi
FDIx4x2
45
TPS51363
.c
eDP
42~44
OUTPUTS VCC_CORE
RAM x 16 14
49
D
5V_AUX_S5 3D3V_AUX_S5 5V_S5 3D3V_S5
CPU DC/DC
RAM x 16 14
Panel
OUTPUTS
DCBATOUT
RAM x 16 14
DDRIII 1066/1333 Channel B
41
TPS51225 INPUTS
Intel CPU 15
BT+
SYSTEM DC/DC
RAM x 16 14
DDR3L-SO DIMM
OUTPUTS
DCBATOUT
Angel-CY Block Diagram
D
40
BQ24727 INPUTS
4
Title
Thermal
Int. KB69
NCT7718W 28
Block Diagram
Fan 28
http://vinafix.vn
Size A3
Document Number
Date:
Monday, April 22, 2013
25
3
2
Rev
1
Angel-CY Sheet 1
2
of
102
Name
4
C
Processor Strapping
Reboot option at power-up Default Mode: Internal weak Pull-down. No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-kΩ - 10-kΩ weak pull-up resistor.
INIT3_3V#
Weak internal pull-up. Leave as "No Connect".
GNT3#/GPIO55 GNT2#/GPIO53 GNT1#/GPIO51
GNT[3:0]# functionality is not available on Mobile. Mobile: Used as GPIO only Pull-up resistors are not required on these signals. If pull-ups are used, they should be tied to the Vcc3_3power rail.
Strap Description
Configuration (Default value for each bit is 1 unless specified otherwise)
CFG[2]
PCI-Express Static Lane Reversal
1: 0:
CFG[6:5]
CFG[7]
PEG DEFER TRAINING
1: PEG Train immediately following xxRESETB de assertion 1 0: PEG Wait for BIOS for training
POWER PLANE
VOLTAGE
5V_S0 3D3V_S0 1D8V_S0 1D5V_S0 1D05V_VTT 0D85V_S0 0D75V_S0 VCC_CORE VCC_GFXCORE 1D8V_VGA_S0 3D3V_VGA_S0 1V_VGA_S0
5V 3.3V 1.8V 1.5V 1.05V 0.95 - 0.85V 0.75V 0.35V to 1.5V 0.4 to 1.25V 1.8V 3.3V 1V
DMI termination voltage. Weak internal pull-up. Do not pull low. Low (0) - Flash Descriptor Security will be overridden. Also, when this signals is sampled on the rising edge of PWROK then it will also disable Intel ME and its features. High (1) - Security measure defined in the Flash Descriptor will be enabled. Platform design should provide appropriate pull-up or pull-down depending on the desired settings. If a jumper option is used to tie this signal to GND as required by the functional strap, the signal should be pulled low through a weak pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently. Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for strapping functions.
HDA_SYNC
Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
2 GPIO27
GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is enabled. Default = Do not connect (floating) High(1) = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = Disables the VccVRM. Need to use on-board filter circuits for analog rails.
5V_USBX_S3 1D5V_S3 DDR_VREF_S3
x
5V 1.5V 0.75V
in
GPIO8
Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with confidentiality Note : This is an un-muxed signal. This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low. Sampled at rising edge of RSMRST#. CRB has a 1-kohm pull-up on this signal to +3.3VA rail.
h
GPIO15
DESCRIPTION ACTIVE IN
fi
Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
Voltage Rails
a
HDA_SDO
.c
3
11
.c
Disable Danbury:Leave floating (internal pull-down)
4
0
11 : x16 - Device 1 functions 1 and 2 disabled 10 : x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01 : Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00 : x8, x4, x4 - Device 1 functions 1 and 2 enabled
Disable Danbury:Left floating, no pull-down required.
HAD_DOCK_EN# /GPIO[33]
1
15 -> 0, 14 -> 1, ...
PCI-Express Port Bifurcation Straps
Enable Danbury: Connect to Vcc3_3 with 8.2-k? weak pull-up resistor.
NC_CLE
Normal Operation. Lane Numbers Reversed
Default Value
Disabled - No Physical Display Port attached to 1: Embedded DisplayPort. Enabled - An external Display Port device is 0: connectd to the EMBEDDED display Port
SPI_MOSI
NV_ALE
E
Pin Name
CFG[4]
Enable Danbury: Connect to +NVRAM_VCCQ with 8.2-kohm weak pull-up resistor [CRB has it pulled up with 1-kohm no-stuff resistor]
D Huron River Schematic Checklist Rev.0_7
m
a n i v SPKR
B Huron River Schematic Checklist Rev.0_7 Schematics Notes
o
A
PCH fiStrapping x
3
S0
CPU Core Rail Graphics Core Rail
S3
BT+ DCBATOUT 5V_S5 5V_AUX_S5 3D3V_S5 3D3V_AUX_S5
6V-14.1V 6V-14.1V 5V 5V 3.3V 3.3V
AC Brick Mode only
3D3V_LAN_S5
3.3V
WOL_EN
Legacy WOL
3D3V_AUX_KBC
3.3V
DSW, Sx
ON for supporting Deep Sleep states
3D3V_AUX_S5
3.3V
G3, Sx
Powered by Li Coin Cell in G3 and +V3ALW in Sx
All S states
2
USB Table
Mini Card2(WWAN)
LANE2
Mini Card1(WLAN) SATA
LANE3
Card Reader
LANE4
Onboard LAN
LANE5
USB3.0
LANE6
Intel GBE LAN
LANE7
Dock
LANE8
New Card
Device
0
Touch Panel / 3G SIM
1
USB Ext. port 1 (HS)
I 2 C / SMBus Addresses
2
Fingerprint
Device
w
LANE1
Table SATA
Pair
w
1
Pair
w
PCIE Routing
Device
3
BLUETOOTH
4
Mini Card2 (WWAN)
5
CARD READER
6
X
7
X
8
USB Ext. port 4 / E-SATA /USB CHARGER
0
HDD1
1
HDD2
9
USB Ext. port 2
2
N/A
10
EDP CAMERA
3
N/A
11
Mini Card1 (WLAN)
4
ODD
12
CAMERA
5
ESATA
13
New Card
SMBus ADDRESSES Ref Des
HURON RIVER ORB Address Hex Bus
EC SMBus 1 Battery CHARGER
BAT_SCL/BAT_SDA BAT_SCL/BAT_SDA BAT_SCL/BAT_SDA
EC SMBus 2 PCH eDP
SML1_CLK/SML1_DATA SML1_CLK/SML1_DATA SML1_CLK/SML1_DATA
PCH SMBus SO-DIMMA (SPD) SO-DIMMB (SPD) Digital Pot G-Sensor MINI
http://vinafix.vn
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
1
PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK Title PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK Size A3 Date:
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Table of Content Document Number
Rev
1
Angel-CY
Monday, April 22, 2013
Sheet
3
of
102
SSID fix= CPU a vin
5
4
3
2
1
1D05V_VTT 1 OF 9
DMI_RXP[3:0]
19 FDI_TXN[7:0]
C
19
FDI_INT
19 19
FDI_LSYNC0 FDI_LSYNC1
K3 M7 P4 T3
DMI_TX0 DMI_TX1 DMI_TX2 DMI_TX3
FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7
U7 W11 W1 AA6 W6 V4 Y2 AC9
FDI0_TX#0 FDI0_TX#1 FDI0_TX#2 FDI0_TX#3 FDI1_TX#0 FDI1_TX#1 FDI1_TX#2 FDI1_TX#3
FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7
U6 W10 W3 AA7 W7 T4 AA3 AC8
FDI0_TX0 FDI0_TX1 FDI0_TX2 FDI0_TX3 FDI1_TX0 FDI1_TX1 FDI1_TX2 FDI1_TX3
a AA11 AC12
U11
1 R402 2 24D9R2F-L-GP
DP_COMP
FDI0_FSYNC FDI1_FSYNC FDI_INT
AA10 AG8
FDI0_LSYNC FDI1_LSYNC
AF3 AD2 AG11
EDP_COMPIO EDP_ICOMPO EDP_HPD# EDP_AUX# EDP_AUX
49 CPU_EDP_DATA0# 49 CPU_EDP_DATA1#
AC3 AC4 AE11 AE7
EDP_TX#0 EDP_TX#1 EDP_TX#2 EDP_TX#3
49 CPU_EDP_DATA0 49 CPU_EDP_DATA1
AC1 AA4 AE10 AE6
EDP_TX0 EDP_TX1 EDP_TX2 EDP_TX3
.c
2
DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
IVY-BRIDGE-GP-NF
PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8 PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15
K22 K19 C21 D19 C19 D16 C13 D12 C11 C9 F8 C8 C5 H6 F6 K6
PEG_TX#0 PEG_TX#1 PEG_TX#2 PEG_TX#3 PEG_TX#4 PEG_TX#5 PEG_TX#6 PEG_TX#7 PEG_TX#8 PEG_TX#9 PEG_TX#10 PEG_TX#11 PEG_TX#12 PEG_TX#13 PEG_TX#14 PEG_TX#15
G22 C23 D23 F21 H19 C17 K15 F17 F14 A15 J14 H13 M10 F10 D9 J4
PEG_TX0 PEG_TX1 PEG_TX2 PEG_TX3 PEG_TX4 PEG_TX5 PEG_TX6 PEG_TX7 PEG_TX8 PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15
F22 A23 D24 E21 G19 B18 K17 G17 E14 C15 K13 G13 K10 G10 D8 K4
1 R401 2 24D9R2F-L-GP
D
C
B
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
w
A
PEG_RX#0 PEG_RX#1 PEG_RX#2 PEG_RX#3 PEG_RX#4 PEG_RX#5 PEG_RX#6 PEG_RX#7 PEG_RX#8 PEG_RX#9 PEG_RX#10 PEG_RX#11 PEG_RX#12 PEG_RX#13 PEG_RX#14 PEG_RX#15
H22 J21 B22 D21 A19 D17 B14 D13 A11 B10 G8 A8 B6 H8 E5 K7
PEG_IRCOMP_R
71.00IVY.A0U
w
w
CPU_EDP_HPD#
eDP
R403 1KR2F-L1-GP
DMI_TX#0 DMI_TX#1 DMI_TX#2 DMI_TX#3
AG4 AF4
49 CPU_EDP_AUXN 49 CPU_EDP_AUXP
1
B
49 CPU_EDP_HPD#
K1 M8 N4 R2
FDI_FSYNC0 FDI_FSYNC1
h
1D05V_VTT 1D05V_VTT
DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3
in
19 19
FDI_TXP[7:0]
DMI_RX0 DMI_RX1 DMI_RX2 DMI_RX3
Intel(R) FDI
19
N3 P7 P3 P11
G3 G1 G4
o
19
DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3
PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO
DMI
19 DMI_RXN[3:0]
DMI_RX#0 DMI_RX#1 DMI_RX#2 DMI_RX#3
.c
DMI_TXP[3:0]
M2 P6 P1 P10
x
19
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3
PCI EXPRESS -- GRAPHICS
DMI_TXN[3:0]
fi
19
D
m
CPU2A
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
http://vinafix.vn
CPU (PCIE/DMI/FDI)
Size A3
Document Number
Date:
Monday, April 22, 2013
Rev
Angel-CY
Sheet
4
of
1
102
4
CATERR#
H_PECI
A48
PECI
1 R513 2 56R2J-L1-GP
27,40,42 H_PROCHOT#
H_PROCHOT#_R
C45
PROCHOT#
22,36 H_THERMTRIP#
D45
THERMTRIP#
C48
H_PM_SYNC
B46
22,97 H_CPUPW RGD
C
1
PM_SYNC
UNCOREPWRGOOD
R503 2 10KR2J-L-GP
BE45
37 VDDPW RGOOD
D44
RESET#
20 20
AG3 AG1
CLK_DP_P CLK_DP_N
20 20
D SM_DRAMRST# 37
SM_DRAMRST#
AT30
SM_RCOMP0 SM_RCOMP1 SM_RCOMP2
BF44 BE43 BG43
2 R502 1 4K99R2F-L-GP SM_RCOMP_0 R506 1 SM_RCOMP_1 R507 1 SM_RCOMP_2 R508 1
2 140R2F-GP 2 25D5R2F-GP 2 200R2F-L1-GP
PRDY# PREQ#
N53 N55
TCK TMS TRST#
L56 L55 J58
TDI TDO
M60 L59
XDP_TDO
DBR#
K58
XDP_DBRESET#
BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7
G58 E55 E59 G55 G59 H60 J59 J61
XDP_TRST#
XDP_TDO XDP_TRST#
2 1
1D05V_VTT
3 4
RN502 SRN51J-GP
C
a
BUF_CPU_RST#
SM_DRAMPWROK
PWR MANAGEMENT
19
THERMAL
27
CLK_EXP_P CLK_EXP_N
m
C49
C502 SC47P50V2JN-3GP
DPLL_REF_CLK DPLL_REF_CLK#
J3 H2
o
PROC_DETECT#
BCLK BCLK#
.c
C57
1
9
fi
1
PROC_SELECT#
2
D
F49
CLOCKS
22 H_SNB_IVB# H_PROCHOT#
MISC
1D05V_VTT
1 R501 2 62R2J-GP
2 2 OF
x
a n i v
3 CPU2B
DDR3 MISC
f
5
JTAG & BPM
SSIDix= CPU
IVY-BRIDGE-GP-NF
71.00IVY.A0U
XDP_DBRESET#
18,27,36,65,71,77,97
PLT_RST#
1 2 3 4
8 7 6 5
in
3D3V_S0
BUF_CPU_RST#
h
RN503 SRN1K5J-1-GP
B
w
w
.c
B
w
A
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
http://vinafix.vn
CPU (THERMAL/CLOCK/PM )
Size A3
Document Number
Date:
Monday, April 22, 2013
Angel-CY
Rev Sheet
5
of
1
102
5
4
SSID fix = CPU a in
3
2
1
v
3 OF 9
CPU2C
4 OF 9
14 14 14
M_A_BS0 M_A_BS1 M_A_BS2
BD37 BF36 BA28
SA_BS0 SA_BS1 SA_BS2
14 14 14
M_A_CAS# M_A_RAS# M_A_W E#
BE39 BD39 AT41
SA_CAS# SA_RAS# SA_WE#
SA_CS#0 SA_CS#1
BB40 BC41
M_A_DIM0_CS#0 14
SA_ODT0 SA_ODT1
AY40 BA41
M_A_DIM0_ODT0 14
SA_DQS#0 SA_DQS#1 SA_DQS#2 SA_DQS#3 SA_DQS#4 SA_DQS#5 SA_DQS#6 SA_DQS#7
AL11 AR8 AV11 AT17 AV45 AY51 AT55 AK55
M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7
AJ11 AR10 AY11 AU17 AW45 AV51 AT56 AK54
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15
BG35 BB34 BE35 BD35 AT34 AU34 BB32 AT32 AY32 AV32 BE37 BA30 BC30 AW41 AY28 AU26
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
D
.c
in
M_A_DQS[7:0] 14
14
A
SB_CK0 SB_CK#0 SB_CKE0
BA34 AY34 AR22
M_B_DIM0_CLK_DDR0 15 M_B_DIM0_CLK_DDR#0 15 M_B_DIM0_CKE0 15
SB_CK1 SB_CK#1 SB_CKE1
BA36 BB36 BF27
M_B_DIM0_CLK_DDR1 15 M_B_DIM0_CLK_DDR#1 15 M_B_DIM0_CKE1 15
SB_CS#0 SB_CS#1
BE41 BE47
M_B_DIM0_CS#0 15 M_B_DIM0_CS#1 15
SB_ODT0 SB_ODT1
AT43 BG47
M_B_DIM0_ODT0 15 M_B_DIM0_ODT1 15
SB_DQS#0 SB_DQS#1 SB_DQS#2 SB_DQS#3 SB_DQS#4 SB_DQS#5 SB_DQS#6 SB_DQS#7
AL3 AV3 BG11 BD17 BG51 BA59 AT60 AK59
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7
AM2 AV1 BE11 BD18 BE51 BA61 AR59 AK61
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
15 15 15
M_B_BS0 M_B_BS1 M_B_BS2
BG39 BD42 AT22
SB_BS0 SB_BS1 SB_BS2
15 15 15
M_B_CAS# M_B_RAS# M_B_W E#
AV43 BF40 BD45
SB_CAS# SB_RAS# SB_WE#
C
M_B_DQS[7:0] 15
BF32 BE33 BD33 AU30 BD30 AV30 BG30 BD29 BE30 BE28 BD43 AT28 AV28 BD46 AT26 AU22
M_B_A[15:0] 15
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
IVY-BRIDGE-GP-NF Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
5
M_B_DQS#[7:0] 15
B
SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15
w
IVY-BRIDGE-GP-NF
SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63
x a
fi
M_A_DQS#[7:0] 14
M_A_A[15:0]
AL4 AL1 AN3 AR4 AK4 AK3 AN4 AR1 AU4 AT2 AV4 BA4 AU3 AR3 AY2 BA3 BE9 BD9 BD13 BF12 BF8 BD10 BD14 BE13 BF16 BE17 BE18 BE21 BE14 BG14 BG18 BF19 BD50 BF48 BD53 BF52 BD49 BE49 BD54 BE53 BF56 BE57 BC59 AY60 BE54 BG54 BA58 AW59 AW58 AU58 AN61 AN59 AU59 AU61 AN58 AR58 AK58 AL58 AG58 AG59 AM60 AL59 AF61 AH60
m
AT40 AU40 BB26
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
DDR SYSTEM MEMORY B
SA_CK1 SA_CK#1 SA_CKE1
M_A_DIM0_CLK_DDR0 14 M_A_DIM0_CLK_DDR#0 14 M_A_DIM0_CKE0 14
o
AU36 AV36 AY26
h
B
15 M_B_DQ[63:0]
SA_CK0 SA_CK#0 SA_CKE0
.c
C
SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63
w
D
AG6 AJ6 AP11 AL6 AJ10 AJ8 AL8 AL7 AR11 AP6 AU6 AV9 AR6 AP8 AT13 AU13 BC7 BB7 BA13 BB11 BA7 BA9 BB9 AY13 AV14 AR14 AY17 AR19 BA14 AU14 BB14 BB17 BA45 AR43 AW48 BC48 BC45 AR45 AT48 AY48 BA49 AV49 BB51 AY53 BB49 AU49 BA53 BB55 BA55 AV56 AP50 AP53 AV54 AT54 AP56 AP52 AN57 AN53 AG56 AG53 AN55 AN52 AG55 AK56
w
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
DDR SYSTEM MEMORY A
CPU2D 14 M_A_DQ[63:0]
4
http://vinafix.vn 3
2
CPU (DDR)
Size A3
Document Number
Date:
Monday, April 22, 2013
Angel-CY
Rev Sheet 1
6
of
1
102
SSIDix= CPU
5
4
3
2
1
f
a n i v D
D
VAXG_VAL_SENSE VSSAXG_VAL_SENSE
F48 G48
VCC_DIE_SENSE RSVD47
H48 K48
RSVD6 RSVD7
BA19 AV19 AT21 BB21 BB19 AY21 BA22 AY22 AU19 AU21 BD21 BD22 BD25 BD26 BG22 BE22 BG26 BE26 BF23 BE24
B
AT49 K24
RSVD41 RSVD42 RSVD43 RSVD44
AH2 AG13 AM14 AM15
RSVD45
N50
RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27
CFG[0]
Display Port Presence strap
CFG[6:5]
CFG[17:7]
PCI-Express Port Bifurcation Straps
1: Normal Operation; Lane # definition matches socket pin map definition
C
0
0:Lane Reversed 1:Disabled - No Physical Display Port attached to Embedded DisplayPort No connect for disable 0:Enabled - An external Display Port device is connected to the Embedded Display Port
0
Pull-down to GND through a 1KΩ ± 5% resistor to enable port 00 01 10 11
= = = =
1 x 8, 2 x 4 PCI Express reserved 2 x 8 PCI Express 1 x 16 PCI Express
00
Reserved configuration lands. A test point may be placed on the board for these lands.
B
71.00IVY.A0U
w
w
IVY-BRIDGE-GP-NF
PCIe Static x16 Lane Numbering Reversal.
CFG[4] A4 C4 D3 D1 A58 A59 C59 A61 C61 D61 BD61 BE61 BE59 BG61 BG59 BG58 BG4 BG3 BE3 BG1 BE1 BD1
Default Value
Connect a series 1 kOhms resistor on the critical CFG[0 trace in a manner which does not introduce any stubs to CFG[0] trace. Route as needed from the opposite side of this series isolation resistor to the debug port. ITP will drive the net to GND.
CFG[2]
DC_TEST_A4 DC_TEST_C4 DC_TEST_D3 DC_TEST_D1 DC_TEST_A58 DC_TEST_A59 DC_TEST_C59 DC_TEST_A61 DC_TEST_C61 DC_TEST_D61 DC_TEST_BD61 DC_TEST_BE61 DC_TEST_BE59 DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58 DC_TEST_BG4 DC_TEST_BG3 DC_TEST_BE3 DC_TEST_BG1 DC_TEST_BE1 DC_TEST_BD1
o
RSVD39 RSVD40
Configuration (Default value for each bit is 1 unless specified otherwise)
.c
M13 M14 U14 W14 P13
Strap Description
x
RSVD34 RSVD35 RSVD36 RSVD37 RSVD38
Pin Name
fi
H45 K45
N42 L42 L45 L47
a
VCC_VAL_SENSE VSS_VAL_SENSE
RSVD30 RSVD31 RSVD32 RSVD33
in
H43 K43
N59 N58
h
C
BCLK_ITP BCLK_ITP#
.c
2
R702 1KR2J-L2-GP
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17
RESERVED
1
CFG4
B50 C51 B54 D53 A51 C53 C55 H49 A55 H51 K49 K53 F53 G53 L51 F51 D52 L53
m
5 OF 9
CPU2E
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
w
A
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
5
4
http://vinafix.vn 3
2
CPU (RESERVED)
Size A3
Document Number
Date:
Monday, April 22, 2013
Angel-CY
Rev Sheet 1
7
of
1
102
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
m o
.c
1
x
2
1 2
1 2
1
1 2
1 2
1 2
1 2
1 2
1 2
C
fi
PEG IO AND DDR IO
a
SA_1031
1D05V_VTT
1D05V_VTT
2
1D05V_VTT C877 SC1U6D3V2KX-L-1-GP
2
1
AM25 AN22
VCCPQE1 VCCPQE2
R808 75R2F-2-GP
in
2
QUIET RAILS
1 2 1
1
1 2 2 1 2 1
1
1 1 2 1 2
2
1 2 2
1 2 2 1 2 1 2
1 2 1
1 2 1 2
2 1 2 1 2
SC1U6D3V2KX-L-1-GP C824
DY
SC1U6D3V2KX-L-1-GP C823
DY
SC1U6D3V2KX-L-1-GP C822
SA_1031 BC22
VCCIO_SEL
SC1U6D3V2KX-L-1-GP C821
W16 W17
VCCIO50 VCCIO51
SC1U6D3V2KX-L-1-GP C814
SC1U6D3V2KX-L-1-GP C813
1
1D05V_VTT AA14 AA15 AB17 AB20 AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15
VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39 VCCIO40 VCCIO41 VCCIO42 VCCIO43 VCCIO44 VCCIO45 VCCIO46 VCCIO47 VCCIO48 VCCIO49
SC1U6D3V2KX-L-1-GP C812
2
SC10U6D3V3MX-L-GP C845
DY
D
SC1U6D3V2KX-L-1-GP C809
1
1D05V_VTT
SC10U6D3V3MX-L-GP C844
SC10U6D3V3MX-L-GP C843
DY
SC10U6D3V3MX-L-GP C830
DY
SC10U6D3V3MX-L-GP C829
DY
SC1U6D3V2KX-L-1-GP C807
VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76
SC1U6D3V2KX-L-1-GP C806
SC10U6D3V3MX-L-GP C836
SC10U6D3V3MX-L-GP C834
2
Iccmax:8.5A ICC_TDC:8.5A
AF46 AG48 AG50 AG51 AJ17 AJ21 AJ25 AJ43 AJ47 AK50 AK51 AL14 AL15 AL16 AL20 AL22 AL26 AL45 AL48 AM16 AM17 AM21 AM43 AM47 AN20 AN42 AN45 AN48
VCCIO1 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8 VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24 VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29
SC10U6D3V3MX-L-GP C840
SC2D2U6D3V2KX-GP C820
DY
A26 A29 A31 A34 A35 A38 A39 A42 C26 C27 C32 C34 C37 C39 C42 D27 D32 D34 D37 D39 D42 E26 E28 E32 E34 E37 E38 F25 F26 F28 F32 F34 F37 F38 F42 G42 H25 H26 H28 H29 H32 H34 H35 H37 H38 H40 J25 J26 J28 J29 J32 J34 J35 J37 J38 J40 J42 K26 K27 K29 K32 K34 K35 K37 K39 K42 L25 L28 L33 L36 L40 N26 N30 N34 N38
1
6 OF 9
SC10U6D3V3MX-L-GP C838
SC2D2U6D3V2KX-GP C811
DY
SC10U6D3V3MX-L-GP C831
SC10U6D3V3MX-L-GP C828
SC10U6D3V3MX-L-GP C832
SC10U6D3V3MX-L-GP C833
SC10U6D3V3MX-L-GP C827
SC10U6D3V3MX-L-GP C826
SC10U6D3V3MX-L-GP C835
DY
SC2D2U6D3V2KX-GP C819
DY
SC2D2U6D3V2KX-GP C808
DY
SC2D2U6D3V2KX-GP C818
SC2D2U6D3V2KX-GP C817
DY
SC2D2U6D3V2KX-GP C804
SC2D2U6D3V2KX-GP C803
SC2D2U6D3V2KX-GP C816
SC10U6D3V3MX-L-GP C825
DY
SC2D2U6D3V2KX-GP C802
SC2D2U6D3V2KX-GP C815
C
SC2D2U6D3V2KX-GP C801
D
POWER
CPU2F
2
VCC_CORE SC10U6D3V3MX-L-GP C810
v
VCC_CORE
2
ULV:17W Iccmax:33A ICC_TDC:25A
3
SC10U6D3V3MX-L-GP C805
f ina
CORE SUPPLY
ix
4
2
5
SSID = CPU
F43 G43
VCC_SENSE VSS_SENSE
1 R803 2 43R2J-GP
1 R805 2 10R2F-L-GP
1D05V_VTT
1 R801 2 100R2F-L1-GP-U
AN16 AN17
VCC_CORE
B
43 43
Place near processor
R802 100R2F-L1-GP-U 2
VCCIO_SENSE 45 VSSIO_SENSE 45
1
VCCIO_SENSE VSS_SENSE_VCCIO
VR_SVID_ALERT# 42 H_CPU_SVIDCLK 42 H_CPU_SVIDDAT 42
VCCSENSE VSSSENSE
DY
.c
SENSE LINES
B
Place near processor
1
H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT
1
A44 B43 C44
VIDALERT# VIDSCLK VIDSOUT
h
SVID
1
R804 130R2F-L-GP
R807 10R2F-L-GP
IVY-BRIDGE-GP-NF
DY
w
w
w
2
71.00IVY.A0U
A
A
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
5
4
http://vinafix.vn 3
2
CPU (VCC_CORE)
Size A2
Document Number
Date:
Monday, April 22, 2013
Angel-CY 1
Sheet
8
Rev of
1
102
VREF
m 1 2
1
o 2
1 2
1
1 2
1 2
1
1 2
2
2
1
x
.c
2
1 2
1 2 1 2
fi
a 1D35V_S0
VCCSA_VID0 VCCSA_VID1 R904 10KR2J-L-GP
1 2 C948 SC1U6D3V2KX-L-1-GP
SA_1031
R910 10KR2J-L-GP
B
VID0
VID1
VCCSA ULV
L
L
0.9V
L
H
0.85V
H
L
0.775V
H
H
0.75V
0D85V_S0
BC43 BA43
1
VDDQ_SENSE VSS_SENSE_VDDQ
48 48
1
VCCDQ1 VCCDQ2
AM28 AN26
2
VCCSA_VID0 VCCSA_VID1
2
SA_1031
1
h
R912 100R2F-L1-GP-U
2
SENSE LINES
SA RAIL
w
1
w 2
VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8 VCCSA9 VCCSA10 VCCSA11 VCCSA12 VCCSA13 VCCSA14 VCCSA15 VCCSA16
1.8V RAIL
.c
1
1 2 1
w
2
1 2
1 2
1 2
1
2
2
2
SC10U6D3V3MX-L-GP C923
SC10U6D3V3MX-L-GP C921
SC1U10V2KX-1GP C960
SC1U10V2KX-1GP C944
SC1U10V2KX-1GP C951
SC1U10V2KX-1GP C927
4
SA_1031
in
1 2
- 1.5V RAILS
1 2
1 2 1 2
1 2 1 2
2 1 2
1 2
1 2
1 2 1 2 1
VCCPLL1 VCCPLL2 VCCPLL3
IVY-BRIDGE-GP-NF
5
SC1U10V2KX-1GP C952
ICC_MAX:4A
L17 L21 N16 N20 N22 P17 P20 R16 R18 R21 U15 V16 V17 V18 V21 W20
SC10U6D3V3MX-L-GP C958
0D85V_S0
BB3 BC1 BC4
C
SC1U10V2KX-1GP C939
R909 1 2 0R0603-PAD
SC1U10V2KX-1GP C929
SC10U6D3V3MX-L-GP C928
1D35V_S0
A
VCCPLL
2 0R3J-L1-GP
Iccmax:5A
SC10U6D3V3MX-L-GP C959
ICC_MAX:1.2A DY
1D35V_S0
AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33
SC1U10V2KX-1GP C938
VAXG_SENSE VSSAXG_SENSE
Angel-SA
R908 1
37 37 D
SC10U6D3V3MX-L-GP C931
1D8V_S0
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26
SC1U10V2KX-1GP C937
R907 100R2F-L1-GP-U
M_VREF_DQ_DIMM0_C M_VREF_DQ_DIMM1_C
SC10U6D3V3MX-L-GP C932
F45 G45
BE7 BG7
SC1U10V2KX-1GP C936
VCC_AXG_SENSE VSS_AXG_SENSE
44 VCC_AXG_SENSE 44 VSS_AXG_SENSE
+V_SM_VREF_CNT 37
SA_1031
R906 100R2F-L1-GP-U
B
SA_DIMM_VREFDQ SB_DIMM_VREFDQ
AY43
SC1U10V2KX-1GP C935
VCC_GFXCORE
VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54 VAXG55 VAXG56
SC10U6D3V3MX-L-GP C933
C
SM_VREF
AA46 AB47 AB50 AB51 AB52 AB53 AB55 AB56 AB58 AB59 AC61 AD47 AD48 AD50 AD51 AD52 AD53 AD55 AD56 AD58 AD59 AE46 N45 P47 P48 P50 P51 P52 P53 P55 P56 P61 T48 T58 T59 T61 U46 V47 V48 V50 V51 V52 V53 V55 V56 V58 V59 W50 W51 W52 W53 W55 W56 W61 Y48 Y61
1
Routing Guideline: Power from DDR_VREF_S3 and +V_SM_VREF_CNT should have 10 mils trace width.
SC10U6D3V3MX-L-GP C934
SC10U6D3V3MX-L-GP C908
SC10U6D3V3MX-L-GP C907
SC10U6D3V3MX-L-GP C906
SC10U6D3V3MX-L-GP C905
SC10U6D3V3MX-L-GP C904
SC10U6D3V3MX-L-GP C903
SC10U6D3V3MX-L-GP C902
SC10U6D3V3MX-L-GP C901
1
SC1U10V2KX-1GP C950
SC1U10V2KX-1GP C949
SC1U10V2KX-1GP C943
SC1U10V2KX-1GP C942
1
VCC_GFXCORE
2
7 OF 9
DDR3
D
2
POWER
CPU2G
QUIET RAILS
v
Iccmax:18A(GT1) ICC_TDC:12A(GT1)
SENSE LINES
SSID ina = CPU
3
GRAPHICS
fix
4
VCCSA VID lines
5
VCCSA_SENSE
U10
VCCSA_SENSE
VCCSA_SENSE Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
VCCSA_VID0 VCCSA_VID1
D48 D49
VCCSA_VID0 VCCSA_VID1
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
71.00IVY.A0U
http://vinafix.vn 3
2
CPU (VCC_GFXCORE)
Size A3
Document Number
Date:
Monday, April 22, 2013
Angel-CY
Rev Sheet 1
9
of
1
102
4
a n i v
3
2
1
8 OF 9
CPU2H
9 OF 9
o
VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249
VSS
NCTF TEST PIN： A5,A57,BC61,BG5 BG57,C3,E1,E61
NCTF
h
in
a
fi
x
.c
BG17 BG21 BG24 BG28 BG37 BG41 BG45 BG49 BG53 BG9 C29 C35 C40 D10 D14 D18 D22 D26 D29 D35 D4 D40 D43 D46 D50 D54 D58 D6 E25 E29 E3 E35 E40 F13 F15 F19 F29 F35 F40 F55 G51 G6 G61 H10 H14 H17 H21 H4 H53 H58 J1 J49 J55 K11 K21 K51 K8 L16 L20 L22 L26 L30 L34 L38 L43 L48 L61 M11 M15
A
VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285 VSS286 VSS287 VSS288 VSS289 VSS290 VSS291 VSS292 VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300
M4 M58 M6 N1 N17 N21 N25 N28 N33 N36 N40 N43 N47 N48 N51 N52 N56 N61 P14 P16 P18 P21 P58 P59 P9 R17 R20 R4 R46 T1 T47 T50 T51 T52 T53 T55 T56 U13 U8 V20 V61 W13 W15 W18 W21 W46 W8 Y4 Y47 Y58 Y59
D
C
VSS_NCTF_1#A5 VSS_NCTF_2#A57 VSS_NCTF_3#BC61 VSS_NCTF_8#BG5 VSS_NCTF_9#BG57 VSS_NCTF_10#C3 VSS_NCTF_13#E1 VSS_NCTF_14#E61
A5 A57 BC61 BG5 BG57 C3 E1 E61
VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_11 VSS_NCTF_12
BD3 BD59 BE4 BE58 C58 D59
B
IVY-BRIDGE-GP-NF
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
w
B
VSS
.c
C
VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180
w
D
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90
AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13
m
CPU2I
A13 A17 A21 A25 A28 A33 A37 A40 A45 A49 A53 A9 AA1 AA13 AA50 AA51 AA52 AA53 AA55 AA56 AA8 AB16 AB18 AB21 AB48 AB61 AC10 AC14 AC46 AC6 AD17 AD20 AD4 AD61 AE13 AE8 AF1 AF17 AF21 AF47 AF48 AF50 AF51 AF52 AF53 AF55 AF56 AF58 AF59 AG10 AG14 AG18 AG47 AG52 AG61 AG7 AH4 AH58 AJ13 AJ16 AJ20 AJ22 AJ26 AJ30 AJ34 AJ38 AJ42 AJ45 AJ48 AJ7 AK1 AK52 AL10 AL13 AL17 AL21 AL25 AL28 AL33 AL36 AL40 AL43 AL47 AL61 AM13 AM20 AM22 AM26 AM30 AM34
w
SSID fix = CPU
5
A
IVY-BRIDGE-GP-NF
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
5
4
http://vinafix.vn 3
2
CPU (VSS)
Size A3
Document Number
Date:
Monday, April 22, 2013
Angel-CY
Rev Sheet 1
10
of
1
102
fix
5
4
3
2
1
a n i v
D
x
.c
o
m
D
C
C
h
in
a
fi
Blanking
B
w
.c
B
w
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation
w
A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
XDP 5
4
http://vinafix.vn 3
Size A4
Document Number
Angel-CY Monday, April 22, 2013
Date: 2
Rev
1 Sheet
11
of 1
102
A
fix
5
4
3
2
1
a n i v
D
x
.c
o
m
D
C
fi
C
h
in
a
Blanking
B
w
.c
B
w
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation
w
A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
Reserved 5
4
http://vinafix.vn 3
Size A4
Document Number
Angel-CY Monday, April 22, 2013
Date: 2
Rev
1 Sheet
12
of 1
102
A
fix
5
4
3
2
1
a n i v
D
x
.c
o
m
D
C
fi
C
h
in
a
Blanking
B
w
.c
B
w
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation
w
A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
Reserved 5
4
http://vinafix.vn 3
Size A4
Document Number
Angel-CY Monday, April 22, 2013
Date: 2
Rev
1 Sheet
13
of 1
102
A
5
ix
4
3
2
1
SSID = MEMORY
6 6 6
M_A_BS0 M_A_BS1 M_A_BS2
J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1
6 M_A_DIM0_CLK_DDR0 6 M_A_DIM0_CLK_DDR#0 6 M_A_DIM0_CKE0
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
G1 F9 E8 E2 D8 D1 B9 B1 G9
6 6 6
M_A_WE# M_A_CAS# M_A_RAS#
D3 E7
UDM LDM
L3 K3 J3
WE# CAS# RAS#
R1403 240R2F-1-GP
MT41J256M16RE-107-D-GP
MT41J256M16RE-107-D-GP
72.41256.D0U
72.41256.D0U
E1600:KN.00409.002
E1600:KN.00409.002
H1600:KN.0040G.007
H1600:KN.0040G.007
6 M_A_DIM0_CKE0
6 6 6
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
G1 F9 E8 E2 D8 D1 B9 B1 G9
M_A_A15 VRAM_CH_A_ZQ_3B
D3 E7
UDM LDM
L3 K3 J3
WE# CAS# RAS#
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14
R1410 240R2F-1-GP
6 15,37
R1405 240R2F-1-GP
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
H1 M8 L8
VREFDQ VREFCA ZQ
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14
M2 N8 M3
BA0 BA1 BA2
J7 K7
CK CK#
K9
CKE
D3 E7
UDM LDM
L3 K3 J3
WE# CAS# RAS#
DY
6 6 6
M_A_BS0 M_A_BS1 M_A_BS2
6 M_A_DIM0_CLK_DDR0 6 M_A_DIM0_CLK_DDR#0 6 M_A_DIM0_CKE0
6 6 6
M_A_WE# M_A_CAS# M_A_RAS#
E3 F7 F2 F8 H3 H8 G2 H7
M_A_DQ63 M_A_DQ60 M_A_DQ62 M_A_DQ61 M_A_DQ58 M_A_DQ57 M_A_DQ59 M_A_DQ56
DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
D7 C3 C8 C2 A7 A2 B8 A3
M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ51 M_A_DQ48 M_A_DQ50 M_A_DQ52 M_A_DQ49
UDQS UDQS#
C7 B7
M_A_DQS6 M_A_DQS#6
LDQS LDQS#
F3 G3
M_A_DQS7 M_A_DQS#7
ODT
K1
M_A_DIM0_ODT0
CS# RESET#
L2 T2
M_A_DIM0_CS#0 DDR3_DRAMRST#
NC#M7 NC#L9 NC#L1 NC#J9 NC#J1
M7 L9 L1 J9 J1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
G1 F9 E8 E2 D8 D1 B9 B1 G9
MT41J256M16RE-107-D-GP
MT41J256M16RE-107-D-GP
72.41256.D0U
72.41256.D0U
E1600:KN.00409.002
E1600:KN.00409.002
H1600:KN.0040G.007
H1600:KN.0040G.007
D
6 6 15,37
M_A_A15 VRAM_CH_A_ZQ_4B
R1408 240R2F-1-GP
DY
C
1 2
1 2
1 2
1 2
1
1 2
1 2
a 1
1 2
2
1 2
in
1
1 2
2
1 2
1
1 2
2
1 2
1 2 1
1 2
2
1 2 1 2
1
1 2
2 1
1
SCD1U10V2KX-L1-GP C1438
SC10U6D3V3MX-L-GP C1437
SC10U6D3V3MX-L-GP C1436
SC1U6D3V2KX-L-1-GP C1431
SC1U6D3V2KX-L-1-GP C1429
2
SA_1031
SCD1U10V2KX-L1-GP C1435
SCD1U10V2KX-L1-GP C1434
SCD1U10V2KX-L1-GP C1408
SCD1U10V2KX-L1-GP C1407
SCD1U10V2KX-L1-GP C1410
SCD1U10V2KX-L1-GP C1409
SCD1U10V2KX-L1-GP C1448
SCD1U10V2KX-L1-GP C1447
SCD1U10V2KX-L1-GP C1424
SCD1U10V2KX-L1-GP C1425
SCD1U10V2KX-L1-GP C1422
SCD1U10V2KX-L1-GP C1423
SCD1U10V2KX-L1-GP C1418
SCD1U10V2KX-L1-GP C1420
SCD1U10V2KX-L1-GP C1417
SCD1U10V2KX-L1-GP C1416
2
0D675V_S0
SC1U6D3V2KX-L-1-GP C1421
1
M7 L9 L1 J9 J1
SC1U6D3V2KX-L-1-GP C1419
1
NC#M7 NC#L9 NC#L1 NC#J9 NC#J1
SCD1U10V2KX-L1-GP C1426
2
M_A_DIM0_CS#0 DDR3_DRAMRST#
SCD1U10V2KX-L1-GP C1413
2
M_A_WE# M_A_CAS# M_A_RAS#
L2 T2
SCD1U10V2KX-L1-GP C1411
1
CKE
SCD1U10V2KX-L1-GP C1414
2
CK CK#
K9
SCD1U10V2KX-L1-GP C1412
SC10U6D3V3MX-L-GP C1406
SC10U6D3V3MX-L-GP C1405
SC10U6D3V3MX-L-GP C1404
B
SC10U6D3V3MX-L-GP C1403
37
SCD1U10V2KX-L1-GP C1433
SCD1U10V2KX-L1-GP C1427
SCD1U10V2KX-L1-GP C1428
SCD1U10V2KX-L1-GP C1415
1
J7 K7
CS# RESET#
6
A8 A1 C1 C9 D2 E9 F1 H9 H2
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
DDR_VREF_S3
1x10u+4x0.1u per/SDRAM
2
BA0 BA1 BA2
M_A_DIM0_ODT0
2
1D35V_S3
DDR_WR_VREF_CHA
M_A_BS0 M_A_BS1 M_A_BS2
6 M_A_DIM0_CLK_DDR0 6 M_A_DIM0_CLK_DDR#0
DDR_WR_VREF_CHA
SA_1031
M2 N8 M3
DY 6 6 6
K1
VRAM_CH_A_ZQ_4A
1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
M_A_A15 VRAM_CH_A_ZQ_2B
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14
ODT
DDR_WR_VREF_CHA DDR_VREF_S3
VDD VDD VDD VDD VDD VDD VDD VDD VDD
1
CKE
M7 L9 L1 J9 J1
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7
M_A_DQS5 M_A_DQS#5
Angel_SA
K8 K2 N1 R9 B2 D9 G7 R1 N9
2
CK CK#
K9
NC#M7 NC#L9 NC#L1 NC#J9 NC#J1
R1406 240R2F-1-GP
6 15,37
M_A_DQS4 M_A_DQS#4
F3 G3
2
J7 K7
M_A_DIM0_CS#0 DDR3_DRAMRST#
C7 B7
LDQS LDQS#
1
BA0 BA1 BA2
L2 T2
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14
UDQS UDQS#
o
G1 F9 E8 E2 D8 D1 B9 B1 G9
M2 N8 M3
DY
CS# RESET#
6
VREFDQ VREFCA ZQ
2
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
R1402 240R2F-1-GP
M_A_DIM0_ODT0
H1 M8 L8
1
J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14
K1
VRAM_CH_A_ZQ_3A
2
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
M_A_A15 VRAM_CH_A_ZQ_1B
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7
ODT
DDR_WR_VREF_CHA DDR_VREF_S3
M_A_DQ36 M_A_DQ39 M_A_DQ37 M_A_DQ38 M_A_DQ32 M_A_DQ34 M_A_DQ33 M_A_DQ35
.c
M7 L9 L1 J9 J1
R1404 240R2F-1-GP
M_A_DQS3 M_A_DQS#3
D7 C3 C8 C2 A7 A2 B8 A3
1
NC#M7 NC#L9 NC#L1 NC#J9 NC#J1
6 15,37
M_A_DQS2 M_A_DQS#2
F3 G3
DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
2
WE# CAS# RAS#
M_A_DIM0_CS#0 DDR3_DRAMRST#
C7 B7
LDQS LDQS#
M_A_DQ45 M_A_DQ40 M_A_DQ43 M_A_DQ41 M_A_DQ46 M_A_DQ44 M_A_DQ47 M_A_DQ42
1
L3 K3 J3
L2 T2
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14
UDQS UDQS#
E3 F7 F2 F8 H3 H8 G2 H7
2
UDM LDM
CS# RESET#
6
VREFDQ VREFCA ZQ
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
x
D3 E7
M_A_DIM0_ODT0
H1 M8 L8
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
1
CKE
K1
VRAM_CH_A_ZQ_2A
A8 A1 C1 C9 D2 E9 F1 H9 H2
1
CK CK#
K9
ODT
DDR_WR_VREF_CHA DDR_VREF_S3
M_A_DQ22 M_A_DQ19 M_A_DQ20 M_A_DQ18 M_A_DQ16 M_A_DQ23 M_A_DQ17 M_A_DQ21
2
J7 K7
M_A_DQS1 M_A_DQS#1
D7 C3 C8 C2 A7 A2 B8 A3
2
M_A_WE# M_A_CAS# M_A_RAS#
BA0 BA1 BA2
M_A_DQS0 M_A_DQS#0
F3 G3
DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
VDD VDD VDD VDD VDD VDD VDD VDD VDD
2
6 6 6
M2 N8 M3
C7 B7
LDQS LDQS#
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
RAM4
Angel_SA
K8 K2 N1 R9 B2 D9 G7 R1 N9
fi
C
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14
UDQS UDQS#
A8 A1 C1 C9 D2 E9 F1 H9 H2
M_A_DQ25 M_A_DQ28 M_A_DQ26 M_A_DQ29 M_A_DQ31 M_A_DQ30 M_A_DQ27 M_A_DQ24
1
6 M_A_DIM0_CKE0
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7
M_A_DQ5 M_A_DQ6 M_A_DQ1 M_A_DQ3 M_A_DQ4 M_A_DQ7 M_A_DQ0 M_A_DQ2
E3 F7 F2 F8 H3 H8 G2 H7
2
6 M_A_DIM0_CLK_DDR0 6 M_A_DIM0_CLK_DDR#0
VREFDQ VREFCA ZQ
D7 C3 C8 C2 A7 A2 B8 A3
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
1
2
M_A_BS0 M_A_BS1 M_A_BS2
H1 M8 L8
DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
VDD VDD VDD VDD VDD VDD VDD VDD VDD
1D35V_S3 RAM3
Angel_SA
K8 K2 N1 R9 B2 D9 G7 R1 N9
2
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14
R1401 240R2F-1-GP
6 6 6
VRAM_CH_A_ZQ_1A
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
M_A_DQ14 M_A_DQ8 M_A_DQ11 M_A_DQ9 M_A_DQ15 M_A_DQ12 M_A_DQ10 M_A_DQ13
1
1
DDR_WR_VREF_CHA DDR_VREF_S3
A8 A1 C1 C9 D2 E9 F1 H9 H2
E3 F7 F2 F8 H3 H8 G2 H7
1
6 M_A_DQS[7:0] D
1D35V_S3 RAM2
Angel_SA DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
2
M_A_DQ[63:0]
VDD VDD VDD VDD VDD VDD VDD VDD VDD
1
6
6 M_A_DQS#[7:0]
K8 K2 N1 R9 B2 D9 G7 R1 N9
m
1D35V_S3 RAM1
M_A_A[15:0]
1
1D35V_S3
6
2
v
2
f ina
B
h
0D675V_S0 0D675V_S0
1 R1418 2 36R2F-1-GP
M_A_A0
1 R1407 2 36R2F-1-GP
M_A_DIM0_CKE0
1 R1419 2 36R2F-1-GP
M_A_A1
1 R1409 2 36R2F-1-GP
M_A_DIM0_ODT0
1 R1420 2 36R2F-1-GP
M_A_A2
1 R1411 2 36R2F-1-GP
M_A_DIM0_CS#0
1 R1421 2 36R2F-1-GP
M_A_A3
1 R1412 2 36R2F-1-GP
M_A_RAS#
1 R1422 2 36R2F-1-GP
M_A_A4
3D3V_S0 U1401
1
.c
1
M_A_A6
2
1 R1415 2 36R2F-1-GP
M_A_BS0
1 R1425 2 36R2F-1-GP
M_A_A7
1 R1416 2 36R2F-1-GP
M_A_BS1
1 R1417 2 36R2F-1-GP
M_A_BS2
w w
1 R1428 2 36R2F-1-GP
M_A_A10
1 R1429 2 36R2F-1-GP
M_A_A11
1 R1430 2 36R2F-1-GP
M_A_A12
1 R1431 2 36R2F-1-GP
M_A_A13
1 R1432 2 36R2F-1-GP
M_A_A14
1 R1433 2 36R2F-1-GP
M_A_A15
8 7 6 5
PCH_SMBCLK 15,20,52,69,97 PCH_SMBDATA 15,20,52,69,97
M_A_DIM0_CLK_DDR_R
1 2 C1432 SCD1U10V2KX-L1-GP
R1436 30D1R2F-L-GP 2
M_A_A9
C1430 SC1D6P16V2BN-GP
2
M_A_A5
1 R1424 2 36R2F-1-GP
M_A_A8
DY
VCC WP SCL SDA
72.24C02.B0Q
1
1 R1423 2 36R2F-1-GP
M_A_WE#
w
M_A_CAS#
1 R1427 2 36R2F-1-GP
A0 A1 A2 GND
AT24C02C-XHM-T-GP
1 R1414 2 36R2F-1-GP
1 R1426 2 36R2F-1-GP
1 2 3 4 R1435 30D1R2F-L-GP
1 R1413 2 36R2F-1-GP
A
5
M_A_DIM0_CLK_DDR0
M_A_DIM0_CLK_DDR#0
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
DDR3-SODIMM1 Size Custom Date:
4
3
2
Document Number
Rev
1
Angel-CY
Monday, April 22, 2013
Sheet
14
of
102
1
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
http://vinafix.vn
4
f ina
3
2
1
DIM2
VREF_CA VREF_DQ RESET# VTT1 VTT2
m
1 2 4 3
o
.c DY
1 2 1 2
1 1
2
DY
2
1 1
2
DY
2
2
DY
1
DY
1
1D35V_S3
2
2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206
SA1_DIM1 TS#_DIMM0_1
C
1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
1D35V_S3
2
75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124
1
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18
1
77 122 125
.c
w
w
NC#1 NC#2 NC#/TEST
SA1_DIM1
SC10U6D3V3MX-L-GP C1517
w
197 201
SC10U6D3V3MX-L-GP C1511
1
SA0 SA1
TS#_DIMM0_1
SC10U6D3V3MX-L-GP C1516
2
198 199
3D3V_S0
RN1501 SRN10KJ-L-GP
SC10U6D3V3MX-L-GP C1510
1
EVENT#
PCH_SMBDATA 14,20,52,69,97 PCH_SMBCLK 14,20,52,69,97 3D3V_S0
SC1U6D3V2KX-L-1-GP C1515
2
200 202
SC10U6D3V3MX-L-GP C1509
ODT0 ODT1
126 1
203 204
SDA SCL
VDDSPD
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
116 120
30
11 28 46 63 136 153 170 187
SC1U6D3V2KX-L-1-GP C1514
0D675V_S0
12 29 47 64 137 154 171 188
M_B_DIM0_CLK_DDR1 6 M_B_DIM0_CLK_DDR#1 6
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
D
SC10U6D3V3MX-L-GP C1508
14,37 DDR3_DRAMRST#
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
102 104
CK1 CK1#
SCD1U10V2KX-L1-GP C1513
A
DDR_VREF_S3 DDR_WR_VREF_CHB
DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#
M_B_DIM0_CLK_DDR0 6 M_B_DIM0_CLK_DDR#0 6
CK0 CK0#
SC10U6D3V3MX-L-GP C1507
6 M_B_DIM0_ODT0 6 M_B_DIM0_ODT1
10 27 45 62 135 152 169 186
M_B_DIM0_CKE0 6 M_B_DIM0_CKE1 6
101 103
CKE0 CKE1
SC1U6D3V2KX-L-1-GP C1512
6 M_B_DQS[7:0]
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
M_B_DIM0_CS#0 6 M_B_DIM0_CS#1 6
73 74
SC10U6D3V3MX-L-GP C1506
SC1U6D3V2KX-L-1-GP C1502
SC1U6D3V2KX-L-1-GP C1501
6 M_B_DQS#[7:0]
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
114 121
2
2
1
37
C1519 SCD1U10V2KX-L1-GP
0D675V_S0
B
5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194
CS0# CS1#
SCD1U10V2KX-L1-GP C1504
DDR_WR_VREF_CHB
DDR_WR_VREF_CHB
BA0 BA1
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
C
SA_1031
109 108
M_B_RAS# 6 M_B_WE# 6 M_B_CAS# 6
2
M_B_BS0 M_B_BS1 M_B_DQ[63:0]
110 113 115
x
M_B_BS2
RAS# WE# CAS#
1
6 6 6
NP1 NP2
2
6
NP1 NP2
1
D
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2
2
v
98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 79
fi
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
a
M_B_A[15:0]
in
6
h
ix
5
B
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
DDR3-204P-123-GP
DDR3-SODIMM2 Size Custom
2ND = 62.10024.G11 3RD = 62.10024.S11 4th = 62.10017.X31
5
4
http://vinafix.vn 3
1st = 62.10024.M51
Date: 2
Document Number
Rev
1
Angel-CY
Monday, April 22, 2013
Sheet 1
15
of
102
fix
5
4
3
2
1
a n i v
D
x
.c
o
m
D
C
fi
C
h
in
a
Blanking
B
w
.c
B
w
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation
w
A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
DDR3-SODIMM2 5
4
http://vinafix.vn 3
Size A4
Document Number
Angel-CY Monday, April 22, 2013
Date: 2
Rev
1 Sheet
16
of 1
102
A
ix
5
4
3
2
1
f ina
v
3D3V_S0
T45 P39
L_CTRL_CLK L_CTRL_DATA
AF37 AF36
LVD_IBG LVD_VBG
AE48 AE47
LVD_VREFH LVD_VREFL
AK39 AK40
LVDSA_CLK# LVDSA_CLK
AN48 AM47 AK47 AJ48
LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3
AN47 AM49 AK49 AJ47
LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3
AF40 AF39
LVDSB_CLK# LVDSB_CLK
AH45 AH47 AF49 AF45
LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3
AH43 AH49 AF47 AF43
LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3
C
CRT_BLUE CRT_GREEN CRT_RED
1 R1702 1KR2F-L1-GP
AP39 AP40
CRT_DDC_CLK CRT_DDC_DATA
M47 M49
CRT_HSYNC CRT_VSYNC
T43 T42
DAC_IREF CRT_IRTN
PANTHER-GP-NF
CRT
T39 M40
CTR_DP_CLK CTR_DP_DATA
4 3
D
P38 M39 AT49 AT47 AT40
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49
DDPC_CTRLCLK DDPC_CTRLDATA
RN1701
1 2
SRN2K2J-5-GP
DDPB_AUXN DDPB_AUXP DDPB_HPD
P46 P42
CTR_DP_CLK 52 CTR_DP_DATA 52
DDPC_AUXN DDPC_AUXP DDPC_HPD
AP47 AP49 AT38
PCH_DP_AUXN 52 PCH_DP_AUXP 52 PCH_DP_HPD 52
DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P
AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49
PCH_DP_DATA0# PCH_DP_DATA0 PCH_DP_DATA1# PCH_DP_DATA1 PCH_DP_DATA2# PCH_DP_DATA2 PCH_DP_DATA3# PCH_DP_DATA3
DDPD_CTRLCLK DDPD_CTRLDATA
h
DAC_IREF_R B
SDVO_INTN SDVO_INTP
SDVO_CTRLCLK SDVO_CTRLDATA
in
N48 P49 T49
AM42 AM40
m
L_DDC_CLK L_DDC_DATA
SDVO_STALLN SDVO_STALLP
o
T40 K47
AP43 AP45
.c
L_BKLTCTL
SDVO_TVCLKINN SDVO_TVCLKINP
x
D
L_BKLTEN L_VDD_EN
P45
fi
49 PCH_BKLT_CTL
RN1702 SRN100KJ-6-GP
J47 M45
Digital Display Interface
27 PANEL_BLEN 49 LCDVDD_EN
LCDVDD_EN PANEL_BLEN
a
4 3
LVDS
1 2
4 OF 10
PCH1D
Angel-SA
C
52 52 52 52 52 52 52 52
M43 M36
DDPD_AUXN DDPD_AUXP DDPD_HPD
AT45 AT43 BH41
DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42
B
w
w
2
.c
71.PANTH.00U
w
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
A
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
PCH (LVDS/CRT/DDI) 5
4
http://vinafix.vn 3
2
Size A3
Document Number
Date:
Monday, April 22, 2013
Rev
1
Angel-CY Sheet 1
17
of
102
5
fix
4
3
2
1
a = PCH inSSID 5 OF 10
BE28 BC30 BE32 BJ32 BC28 BE30 BF32 BG32 AV26 BB26 AU28 AY30 AU26 AY26 AV28 AW30
C
52 USB30_RN3 62 USB30_RP1 52 USB30_RP3 62
USB30_TN1
52
USB30_TN3
62
USB30_TP1
52
USB30_TP3
INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#
27,52 SYS_COM_REQ
R1809
2 0R2J-L-GP SYS_COM_REQ_R
1
DY
SA_1026 69,97
TP_IN#
INT_PIRQE# INT_PIRQF# INT_PIRQG#
K40 K38 H38 G38
PIRQA# PIRQB# PIRQC# PIRQD#
C46 C44 E40
REQ1#/GPIO50 REQ2#/GPIO52 REQ3#/GPIO54
D47 E42 F46
G42 G40 C42 D44 K10
Angel-1 CLK_PCI_TPM CLK_PCI_LPC CLK_PCI_FB CLK_PCI_KBC
R1807 R1804 R1805 R1806
1 1 1 1
TPM DB
2 2 2 2
22R2J-2-GP 22R2J-2-GP 22R2J-2-GP 22R2J-2-GP
CLK_PCI_LPC_R CLK_PCI_FB_R CLK_PCI_KBC_R
H49 H43 J48 K42 H40
AV5 AV10
RSVD25
AT8
RSVD26 RSVD27
AY5 BA2
RSVD28 RSVD29
AT12 BF3
PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P
C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32
USBRBIAS#
C33
USB Table
o
Pair
USB_PN0 USB_PP0 USB_PN1 USB_PP1 USB_PN2 USB_PP2 USB_PN3 USB_PP3
62 62 49 49 52 52 49 49
Device
0
USB3.0 Ext. port 1
1
TOUCH PANEL
2
mDP
3
CCD
4
NC
5
NC
6
X
7
X
8
NC
9
USB2.0 Ext. port 1
10
Card Reader
11
Mini Card1 (BT)
12
NC
C
Angel-1
USB_PN9 82,97 USB_PP9 82,97 USB_PN10 32 USB_PP10 32 USB_PN11 65 USB_PP11 65
USB_RBIAS
B
1 R1811 2 22D6R2F-L1-GP
Angel-SA USBRBIAS
B33
OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14
A14 K20 B17 C16 L16 A16 D14 C14
PME#
3D3V_S5
PLTRST# CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4 PANTHER-GP-NF
m
RSVD23 RSVD24
D
R1820 10KR2J-L-GP USB_OC
71.PANTH.00U Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
w
1
w
77 71 20 27
C6
PLT_RST#
w
5,27,36,65,71,77,97
GNT1#/GPIO51 GNT2#/GPIO53 GNT3#/GPIO55
.c
B
USB3RN1 USB3RN2 USB3RN3 USB3RN4 USB3RP1 USB3RP2 USB3RP3 USB3RP4 USB3TN1 USB3TN2 USB3TN3 USB3TN4 USB3TP1 USB3TP2 USB3TP3 USB3TP4
h
62 USB30_RN1
TP21 TP22 TP23 TP24
RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22
AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6
1
B21 M20 AY16 BG46
AT10 BC8
2
Angel-SA
RSVD5 RSVD6
fi
Angel-SA
3D3V_S0
INT_PIRQG# INT_PIRQD# INT_PIRQE# INT_PIRQF#
AY7 AV7 AU3 BG4
a
10 9 8 7 6
in
3D3V_S0
1 2 3 4 5
USB
INT_PIRQB# INT_PIRQA# TP_IN# INT_PIRQC#
RSVD
RN1801 SRN8K2J-2-GP-U
D
TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20
PCI
BG26 BJ26 BH25 BJ16 BG16 AH38 AH37 AK43 AK45 C18 N30 H3 AH12 AM4 AM5 Y13 K24 L24 AB46 AB45
RSVD1 RSVD2 RSVD3 RSVD4
.c
PCH1E
x
v
2
SC33P50V2JN-3GP
EC1801
A
A
DY
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
PCH (PCI/USB/NVRAM) 5
4
http://vinafix.vn 3
2
Size A3
Document Number
Date:
Monday, April 22, 2013
Rev
1
Angel-CY Sheet 1
18
of
102
5
ix
4
3
2
1
f ina
DS3 to S0
SSID = PCH
AW24 AW20 BB18 AV18
DMI0TXN DMI1TXN DMI2TXN DMI3TXN
DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3
AY24 AY20 AY18 AU18
DMI0TXP DMI1TXP DMI2TXP DMI3TXP
FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7 FDI_INT
1D05V_VTT
BJ24
R1901
1
2 49D9R2F-GP
DMI_COMP_R
BG25
R1902
1
2 750R2F-L-GP
RBIAS_CPY
BH21
DMI_ZCOMP
FDI_FSYNC0
DMI_IRCOMP
FDI_FSYNC1
DMI2RBIAS
FDI_LSYNC0 FDI_LSYNC1
R1905
1
2 10KR2J-L-GP PCH_GPIO22
PCH_GPIO22
22
DSWVRMEN
PM_SUSACK# SYS_RESET#
22 SYS_RESET# C
C12 K3
36 SYS_PWROK
P12
27 S0_PWR_GOOD
L22 L10 B13
37 PM_DRAM_PWRGD PM_RSMRST# PM_SUSWARN#
20
BATLOW#
SYS_RESET# SYS_PWROK PWROK APWROK DRAMPWROK
DPWROK WAKE# CLKRUN#/GPIO32 SUS_STAT#/GPIO61 SUSCLK/GPIO62 SLP_S5#/GPIO63
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
H20
27 AC_PRESENT
SUSACK#
C21
E20
27,97 PM_PWRBTN#
System Power Management
3D3V_S0
BATLOW#
E10
PM_RI#
A10
BC10
FDI_FSYNC1
4
AV14
FDI_LSYNC0
4
BB10
FDI_LSYNC1
4
A18
DSWODVREN
E22
PCH_DPWROK
4 4
R1910 1 2 0R0402-PAD
B9
PCH_PCIE_WAKE#
N3
PM_CLKRUN# 27,77
S0 to DS3
C
Angel-SA
PCH_SUSCLK_KBC 27
PM_SLP_S4# 27,46 PM_SLP_S3# 27
SLP_LAN#/GPIO29
27,65
D10
G10 G16
PM_RSMRST#
Angel-SA PM_SUS_STAT# 77
G8 N14
F4
SLP_SUS#
RI#
FDI_FSYNC0
SLP_S3#
PMSYNCH
PANTHER-GP-NF
FDI_INT
H4
SLP_A#
BATLOW#/GPIO72
AW16 AV12
SLP_S4#
PWRBTN# ACPRESENT/GPIO31
BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9
D
FDI_TXP[7:0] 4
m
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3
FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7
FDI_TXN[7:0] 4
o
DMI_TXP[3:0]
DMI0RXP DMI1RXP DMI2RXP DMI3RXP
FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7
.c
4
BE24 BC20 BJ18 BJ20
BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9
x
4 DMI_TXN[3:0]
DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7
fi
DMI_RXP[3:0]
DMI0RXN DMI1RXN DMI2RXN DMI3RXN
a
4
BC24 BE20 BG18 BG20
FDI
Signal Routing Guideline: DMI_ZCOMP keep W=4 mils and routing length less than 500 mils. DMI_IRCOMP keep W=4 mils and routing length less than 500 mils.
DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3
DMI
D
3 OF 10
PCH1C 4 DMI_RXN[3:0]
PM_SLP_SUS#
AP14
H_PM_SYNC 5
in
v
K14
71.PANTH.00U
B
h
B
Angel-SA Angel-SA
DSWODVREN - On Die DSW VR Enable
3D3V_S5
2
R1909 1 100KR2J-4-GP 2
CLK_PCIE_WLAN_REQ#
20,65
R1916 10KR2J-L-GP Q1901
Angel-SA
RN1902 SRN10KJ-6-GP 8 7 6 5
PM_SUSWARN# PCH_GPIO27 PM_SLP_SUS# AC_PRESENT
4 3V_5V_POK_#
PM_RSMRST#
3
w
1 2 3 4
RN1901 SRN10KJ-6-GP PM_SUSACK# 8 PM_RI# 7 PCH_PCIE_WAKE# 6 CLK_PCIE_WLAN_REQ# 5
Non DS3
1
1 2 3 4
.c
3D3V_AUX_S5
PCH_GPIO27 22
5
2
6
1
3V_5V_POK_C
R1912 2 1KR2J-L2-GP 1 1 R1922 2 0R0402-PAD
HIGH
Enabled (DEFAULT)
LOW
Disabled
RTC_AUX_S5
DSWODVREN
R1917
RSMRST#_KBC 27 3V_5V_POK 41
3D3V_S0 R1919 PM_CLKRUN#
2N7002KDW-GP
1 2 8K2R2J-3-GP
S0_PWR_GOOD
1 R1908 2 100KR2J-4-GP
PM_RSMRST#
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Custom
PCH (DM I/FDI/PM) Document Number
Rev
Angel-CY
Date: Monday, April 22, 2013 5
A
w
1 R1904 2 100KR2J-4-GP
w
84.2N702.A3F 2nd = 75.00601.07C 3rd = 84.2N702.F3F
A
2 330KR2F-L-GP
1
4
3
http://vinafix.vn
2
1
Sheet
19
of
1
102
5
ix
4
3
f ina
2
1
SSID = PCH
Angel-SA
BG37 BH37 AY36 BB36 BJ38 BG38 AU36 AV36 BG40 BJ40 AY40 BB40 BE38 BC38 AW38 AY38 Y40 Y39 PCIE_CLK_REQ#
J2
WLAN
AB49 AB47 22 PCIE_CLK_REQ1#
PCIE_CLK_REQ1#
M1
SML0DATA
SML1ALERT#/PCHHOT#/GPIO74 SML1CLK/GPIO58
PERN5 PERP5 PETN5 PETP5
USB3.0
PERN6 PERP6 PETN6 PETP6
LAN
PERN7 PERP7 PETN7 PETP7
Dock
PERN8 PERP8 PETN8 PETP8
NEW CARD
SML1DATA/GPIO75
CL_CLK1 CL_DATA1 CL_RST1#
PEG_A_CLKRQ#/GPIO47 CLKOUT_PCIE0N CLKOUT_PCIE0P PCIECLKRQ0#/GPIO73
CLKOUT_PEG_A_N CLKOUT_PEG_A_P
CLKOUT_PCIE1N CLKOUT_PCIE1P
CLKOUT_DMI_N CLKOUT_DMI_P
PCIECLKRQ1#/GPIO18 CLKOUT_DP_N CLKOUT_DP_P
C
BATLOW#
19
WLAN 19,65
Angel-SA 1 2 3 4
RN2018 SRN10KJ-6-GP 8 7 6 5
H_A20GATE H_RCIN# PEG_CLKREQ# TOUCH_DET#
V10 Y37 Y36
65 CLK_PCIE_WLAN# 65 CLK_PCIE_WLAN
A8
CLK_PCIE_WLAN_REQ#
Y43 Y45
H_A20GATE 22,27 H_RCIN# 22,27
PCIE_CLK_REQ#
L12
CLKIN_DMI_N CLKIN_DMI_P
PCIECLKRQ2#/GPIO20 CLKOUT_PCIE3N CLKOUT_PCIE3P
CLKIN_GND1_N CLKIN_GND1_P
PCIECLKRQ3#/GPIO25 CLKIN_DOT_96N CLKIN_DOT_96P CLKOUT_PCIE4N CLKOUT_PCIE4P CLKIN_SATA_N CLKIN_SATA_P
PCIECLKRQ4#/GPIO26
TOUCH_DET# 22 V45 V46
PCIECLKRQ1# and PCIECLKRQ2# Support S0 power only
PCIE_CLK_REQ#
L14 AB42 AB40
PEG_B_CLKRQ#
E6 V40 V42
PCIE_CLK_REQ#
T13 V38 V37
PCIE_CLK_REQ# B
K12 AK14 AK13
CLKOUT_PCIE5N CLKOUT_PCIE5P
REFCLK14IN
PCIECLKRQ5#/GPIO44
CLKIN_PCILOOPBACK
CLKOUT_PEG_B_N CLKOUT_PEG_B_P
XTAL25_IN XTAL25_OUT
PEG_B_CLKRQ#/GPIO56
XCLK_RCOMP
CLKOUT_PCIE6N CLKOUT_PCIE6P PCIECLKRQ6#/GPIO45 CLKOUT_PCIE7N CLKOUT_PCIE7P PCIECLKRQ7#/GPIO46 CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P
SML0_CLK SML0_DATA
C13
PCH_GPIO74
SMB_DATA SMB_CLK
4 3
37
CLKOUTFLEX0/GPIO64 CLKOUTFLEX1/GPIO65 CLKOUTFLEX2/GPIO66 CLKOUTFLEX3/GPIO67
RN2004 SRN2K2J-5-GP 1 2
D
Angel-SA
E14
SML1_CLK 27,28
M16
SML1_DATA 27,28
PCH_GPIO74
R2023
M7 T11 P10
PEG_CLKREQ#
M10
1
2 10KR2J-L-GP
1 R2009 2 1KR2J-L2-GP
AB37 AB38 AV22 AU22
CLK_EXP_N CLK_EXP_P
5 5
AM12 AM13
CLK_DP_N CLK_DP_P
5 5
BF18 BE18
CLK_BUF_EXP_N CLK_BUF_EXP_P
BJ30 BG30
CLK_BUF_CPYCLK_N CLK_BUF_CPYCLK_P
G24 E24
CLK_BUF_DOT96_N CLK_BUF_DOT96_P
AK7 AK5
CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P
2 1
RN2008 SRN10KJ-L-GP 3 4
3D3V_S0
RN2007 4 3
1 2 SRN2K2J-5-GP
SMB_DATA
6
1
Q2001 2N7002KDW-GP
5
2
84.2N702.A3F 2nd = 75.00601.07C
4
3
PCH_SMBCLK
SA_1031 K45
CLK_BUF_REF14
H45 V47 V49
CLK_BUF_REF14 CLK_PCI_FB
K43
DRAM_TYPE1
F47
DRAM_TYPE2
H47
DRAM_TYPE3
18
1D05V_VTT
RN2009 SRN10KJ-L3-GP
K49
CLK_BUF_DOT96_P CLK_BUF_DOT96_N
B
1 2 3 4 5
10 9 CLK_BUF_EXP_N 8 CLK_BUF_EXP_P 7 CLK_BUF_CKSSCD_N 6 CLK_BUF_CKSSCD_P
Angel-SA
SA_1024 3D3V_S0
RAM_DY
Hynix/Samsung
Elpida60/Samsung
XTAL25_OUT
2
R2014 10KR2J-L-GP
2
4
2
3
1
SC15P50V2JN-2-GP C2008 X2001 XTAL-25MHZ-181-GP
82.30020.G71
2
1
1
1
R2022 10KR2J-L-GP
2nd = 82.30020.G61
2
1
SC15P50V2JN-2-GP C2007
1
1
DRAM_TYPE3 DRAM_TYPE2 DRAM_TYPE1 1
w
1 R2006 1MR2F-GP
R2016 10KR2J-L-GP
R2019 10KR2J-L-GP
w
2
1
Angel-SA
2
w
XTAL25_IN
R2018 10KR2J-L-GP
R2017 10KR2J-L-GP
RAM
Elpida
2
2
A
2
A
14,15,52,69,97
UMA_DIS#;DGPU_PRSNT# UMA: 1 1 DIS :0 1 SG(PX) : 0 0 Optimus(Muxless) : 1 0
22
XTAL25_IN XTAL25_OUT
Y47 XCLK_RCOMP 1 R2007 2 90D9R2F-1-GP
C
PCH_SMBDATA 14,15,52,69,97
SMB_CLK
71.PANTH.00U
.c
PANTHER-GP-NF
DRAMRST_CNTRL_PCH
C8 G12
in
3D3V_S0
22 PCIE_CLK_REQ2#
PCIE_CLK_REQ2#
CLKOUT_PCIE2N CLKOUT_PCIE2P
h
PEG_B_CLKRQ# BATLOW# PCIE_CLK_REQ# EC_SWI#
AA48 AA47
FLEX CLOCKS
RN2001 SRN10KJ-6-GP 1 8 2 7 3 6 4 5
A12
SML0_DATA SML0_CLK SML1_DATA SML1_CLK
DRAMRST_CNTRL_PCH
Angel-SA
3D3V_S5
SMBUS
PERN4 PERP4 PETN4 PETP4
SML0CLK
SMB_DATA
m
PCIE_TXN4_C PCIE_TXP4_C
SML0ALERT#/GPIO60
SMB_CLK
C9
RN2003 SRN2K2J-4-GP 8 1 7 2 6 3 5 4
o
2 SCD1U10V2KX-L1-GP 2 SCD1U10V2KX-L1-GP
Card Reader
H14
.c
1 1
PERN3 PERP3 PETN3 PETP3
EC_SWI#
x
C2001 C2002
SMBDATA
E12
fi
PCIE_RXN4 PCIE_RXP4 PCIE_TXN4 PCIE_TXP4
WWAN
Link
65 65 65 65
BF36 BE36 AY34 BB34
SMBCLK
PERN2 PERP2 PETN2 PETP2
Controller
BG36 BJ36 AV34 AU34
D
SMBALERT#/GPIO11
CLOCKS
BE34 BF34 BB32 AY32
3D3V_S5
PERN1 PERP1 PETN1 PETP1
PCI-E*
BG34 BJ34 AV32 AU32
a
v
2 OF 10
PCH1B
Elpida33_Hynix60
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
5
4
http://vinafix.vn 3
2
PCH (PCI-E/SMBUS/CLOCK/CL)
Size A2
Document Number
Date:
Monday, April 22, 2013
Rev
Angel-CY 1
Sheet
20
of
1
102
5
x
4
i SSID af = PCH
2
RTC_AUX_S5 RTC_X1 R2120 R2125
RTC_X2
1 1
2 20KR2F-L3-GP 2 20KR2F-L3-GP 1
1 R2101 2 10MR2J-L-GP
C2103 SC1U10V3KX-L1-GP
INTVRMEN- Integrated SUS 1.05V VRM Enable High - Enable internal VRs Low - Enable external VRs
2
X2101 X-32D768KHZ-34GPU
82.30001.661 2nd = 82.30001.B21
LPC_AD[0..3]
RTC_RST#
D20
RTCRST#
SRTC_RST#
G22
SRTCRST#
SM_INTRUDER#
K22
INTRUDER#
PCH_INTVRMEN
C17
INTVRMEN
HDA_BITCLK
N34
HDA_BCLK
HDA_SYNC
RTC Reset 29
HDA_SPKR HDA_RST#
29 HDA_SDIN0
Low = Default High = Enable
27 ME_UNLOCK
PLL ODVR VOLTAGE
1 R2107 2 HDA_SDOUT 1KR2J-L2-GP
a
Low = 1.8V (Default) HDA_SYNC High = 1.5V
+3VS_+1.5VS_HDA_IO
HDA_SYNC
Angel_SA 29 HDA_CODEC_BITCLK 29 HDA_CODEC_RST#
B
HDA_BITCLK HDA_RST# HDA_SYNC HDA_SDOUT
.c
29 HDA_CODEC_SDOUT
1 2 HDA_SYNC_R 3 4
RN2102 SRN33J-7-GP-U 8 7 6 5
h
1 R2103 2 1KR2J-L2-GP
in
1 R2121 2 4K7R2J-L-GP
Q2101
G D
SPKR
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
60 PCH_SPI_CS0#
PCH_JTAG_TCK_BUF
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN#/GPIO33
N32
HDA_DOCK_RST#/GPIO13
E36 K36 27,77
SATA0RXN SATA0RXP SATA0TXN SATA0TXP
AM3 AM1 AP7 AP5
SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0
56 56 56 56
SATA1RXN SATA1RXP SATA1TXN SATA1TXP
AM10 AM8 AP11 AP10
SATA2RXN SATA2RXP SATA2TXN SATA2TXP
AD7 AD5 AH5 AH4
SATA3RXN SATA3RXP SATA3TXN SATA3TXP
AB8 AB10 AF3 AF1
SATA4RXN SATA4RXP SATA4TXN SATA4TXP
Y7 Y5 AD3 AD1 Y3 Y1 AB3 AB1
JTAG_TCK JTAG_TMS
SATAICOMPO
Y11
K5
JTAG_TDI
SATAICOMPI
Y10
H1
JTAG_TDO
T3
SPI_CS0#
T1
SPI_CS1#
60 PCH_SPI_SI
V4
SPI_MOSI
27,60 SPI_SO_R
U3
SPI_MISO PANTHER-GP-NF
HDD1
C
1D05V_VTT SATA_COMP
1 R2112 2 37D4R2F-GP
SATA3RCOMPO
AB12
SATA3COMPI
AB13
SATA3_COMP
1 R2113 2 49D9R2F-GP
SATA3RBIAS
AH1
RBIAS_SATA3
1 R2114 2 750R2F-L-GP
SPI_CLK
Y14
LPC_FRAME# 27,71,77
INT_SERIRQ
J3
27,71,77
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
V5
SERIRQ
P3
SATA_LED#
SATA0GP/GPIO21
V14
SATA_DET#0
SATA1GP/GPIO19
P1
SATALED#
B
Strap pin ,Internal PU
71.PANTH.00U
3D3V_S0
HDA_SYNC_R
S
RN2103 SRN10KJ-L-GP 3 4
INT_SERIRQ SATA_DET#0
2 1
SATA_LED#
1 R2111 2 10KR2J-L-GP
w
84.2N702.J31 2ND = 84.2N702.031
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used to sample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on this signal on the board. Signal may have leakage paths via powered off devices(Audio Codec) and hence contend with the external pull-up. A blocking FET is recommended in such a case to isolate HDA_SYNC from the Audio Codec device until after the Strap sampling is complete. 5
D36
LDRQ0# LDRQ1#/GPIO23
H7
2N7002K-2-GP
A
FWH4/LFRAME#
SATA5RXN SATA5RXP SATA5TXN SATA5TXP
w
29 HDA_CODEC_SYNC
T10
K34
w
5V_S0
60 PCH_SPI_CLK
FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3
IHDA
HDA_SDOUT
fi
C
HDA_SYNC
x
Flash Descriptor Security Overide
L34
C38 A38 B37 C37
m
RTCX2
LPC
C20
SATA 6G
RTCX1
RTC_X2
RTC
RTC_AUX_S5
A20
SATA
2
84.2N702.J31 2ND = 84.2N702.031
2 R2104 1 1MR2F-GP 2 1 R2105 330KR2F-L-GP
2
2N7002K-2-GP
R2117 2K2R2F-GP
2
R2118 100KR2J-4-GP
G2101 GAP-OPEN
1
1
S
1
2
D RTCRST_ON_C
RTC_X1
o
G
27 RTCRST_ON
1
1 2
2
3
SC1U10V3KX-L1-GP C2104
SC6P50V2CN-1GP C2102
SC6P50V2CN-1GP C2101
1
Q2102
2
D
1 OF 10
PCH1A
4
JTAG
1
.c
D
1
SPI
vin
3
4
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
http://vinafix.vn 3
2
PCH (SPI/RTC/LPC/SATA/IHDA)
Size A3
Document Number
Date:
Monday, April 22, 2013
Rev
Angel-CY
Sheet 1
21
of
1
102
5
ix
4
3
f ina
2
1
SSID = PCH 6 OF 10
PCH1F
E38
EC_SCI# ICC_EN#
C10
LAN_DISABLE#
C4
PCH_GPIO15
G2
SATA_ODD_PRSNT#
U2
B41
PCH_GPIO69
TACH2/GPIO6
TACH6/GPIO70
C41
PCH_GPIO70
TACH3/GPIO7
TACH7/GPIO71
A40
PCH_GPIO71
LAN_PHY_PWR_CTRL/GPIO12 GPIO15
A20GATE PECI
SATA4GP/GPIO16
2
20 TOUCH_DET# G2201 GAP-OPEN
1
Pass Word Clear C
T5
SCLOCK/GPIO22
PCH_GPIO24
E8
GPIO24
PCH_GPIO27
E16
GPIO27
P8
GPIO28
PSW_CLR#
K1
STP_PCI#/GPIO34
TOUCH_DET#
K4
GPIO35
DMI_OVRVLTG
V8
SATA2GP/GPIO36
FDI_OVRVLTG
M5
SATA3GP/GPIO37
MFG_MODE
N2
SLOAD/GPIO38
M3
SDATAOUT0/GPIO39
PCH_GPIO39
8 7 6 5
RN2201 SRN10KJ-6-GP 1 2 3 4
Angel_SA
V13
PCH_GPIO17 DGPU_HPD_INTR# EC_SCI# EC_SMI#
SDATAOUT1/GPIO48
AY11
THRMTRIP#
AY10
INIT3_3V#
T14
DF_TVS
AY1
TS_VSS1
AH8
TS_VSS2
AK11
TS_VSS3
AH10
TS_VSS4
AK10
NC_1
P37
VSS_NCTF_15#BG2
BG2
PCH_TEMP_ALERT#
V3
SATA5GP/GPIO49/TEMP_ALERT#
VSS_NCTF_16#BG48
USB3_SUPPORT
D6
GPIO57
BG48
VSS_NCTF_17#BH3
8 7 6 5
MFG_MODE PCIE_CLK_REQ1# SYS_RESET# PSW_CLR#
A45
PCIE_CLK_REQ1# 20 SYS_RESET# 19
A46
H_RCIN#
20,27
H_CPUPWRGD 5,97
PCH_THERMTRIP_R
1 R2204 2 390R2F-2GP
H_THERMTRIP# 5,36
NV_CLE
1D8V_S0
NV_CLE
R2207 2K2R2F-GP
1 R2205 2 1KR2J-L2-GP
H_SNB_IVB#
5
C
FDI_OVRVLTG
FDI TERMINATION VOLTAGE OVERRIDE(Reserved)
VSS_NCTF_2#A44 VSS_NCTF_3#A45 VSS_NCTF_4#A46 VSS_NCTF_5#A5
VSS_NCTF_19#BJ4 VSS_NCTF_20#BJ44 VSS_NCTF_21#BJ45 VSS_NCTF_22#BJ46
VSS_NCTF_23#BJ5
R2208 10KR2J-L-GP
BH3
BH47
FDI_OVRVLTG (GPIO37)
LOW - Tx, Rx terminated to same voltage (DC Coupling Model DEFAULT)
BJ4
DMI_OVRVLTG
BJ44
DMI TERMINATION VOLTAGE OVERRIDE(Reserved) BJ45
R2210 10KR2J-L-GP
BJ46
DMI_OVRVLTG (GPIO36)
BJ5
LOW - Tx, Rx terminated to same voltage (DC Coupling Model DEFAULT)
B3 B47 PCIE_CLK_REQ2# 20
BD1 BD49
8 7 6 5
RN2205 SRN10KJ-6-GP 1 2 3 4
BE1
PCH_GPIO68 PCH_GPIO71 PCH_GPIO70 PCH_GPIO69
VSS_NCTF_7#B3
VSS_NCTF_8#B47
VSS_NCTF_9#BD1
VSS_NCTF_10#BD49 VSS_NCTF_11#BE1
h
B
VSS_NCTF_6#A6
BE49 BF1
VSS_NCTF_12#BE49
1 2 10KR2J-L-GP
CLK_BUF_REF14
Angel_SA
CLK_BUF_REF14 20
3D3V_S0
VSS_NCTF_26#C48 VSS_NCTF_27#D1
VSS_NCTF_28#D49 VSS_NCTF_29#E1 VSS_NCTF_30#E49 VSS_NCTF_31#F1
VSS_NCTF_14#BF49
VSS_NCTF_32#F49
PANTHER-GP-NF
R2214
VSS_NCTF_25#C2
VSS_NCTF_13#BF1
.c
BF49
VSS_NCTF_24#BJ6
BJ6 C2 C48 D1
ICC_EN#
Integrated Clock Chip Enable(Reserved)
2
A6 PCH_TEMP_ALERT# SATA_ODD_PRSNT# S_GPIO PCIE_CLK_REQ2#
ICC_EN# (GPIO8)
R2211 1KR2J-L2-GP
D49
HIGH- DISABLED [DEFAULT]
E1
B
LOW -
1
RN2203 SRN10KJ-6-GP 1 2 3 4
in
8 7 6 5
NCTF TEST PIN: A4,A44,A45,A46,A5,A6,B3,B47, BD1,BD49,BE1,BE49,BF1,BF49, BG2,BG48,BH3,BH47,BJ4,BJ44, BJ45,BJ46,BJ5,BJ6,C2,C48,D1, D49,E1,E49,F1,F49
1
A5
VSS_NCTF_1#A4
a
A4 A44
NCTF
VSS_NCTF_18#BH47 RN2202 SRN10KJ-6-GP 1 2 3 4
P5
PROCPWRGD
2
3D3V_S0
H_A20GATE 20,27
AU16
1
PCH_GPIO22
P4
fi
19 PCH_GPIO27
TACH0/GPIO17
CPU/MISC
19 PCH_GPIO22
D40
GPIO
RCIN# PCH_GPIO17
D
GPIO8
m
H36
PCH_GPIO68
TACH5/GPIO69
2
DGPU_HPD_INTR#
C40
TACH1/GPIO1
o
27
A42
TACH4/GPIO68
.c
2
D
EC_SMI#
BMBUSY#/GPIO0
1
R2221 10KR2J-L-GP
T7
2
S_GPIO
1
PCH_GPIO39
x
v
ENABLED
E49 F1
DY
F49
71.PANTH.00U
w
1
SA_1101 R2222 10KR2J-L-GP
Angel-SA 2
DY
PCH_GPIO24 1
USB3_SUPPORT LAN_DISABLE#
R2220 10KR2J-L-GP
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
2
RN2204 SRN10KJ-L-GP 1 4 2 3
SA_1106
w
3D3V_S5
A
A
PCH_GPIO15
w
1 R2201 2 1KR2J-L2-GP
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size Custom
PCH (GPIO/CPU) Document Number
Rev
Angel-CY
Date: Monday, April 22, 2013 5
4
3
http://vinafix.vn
2
1
Sheet
22
of
1
102
ix
5
4
3
2
1
f ina
v
1D05V_VTT
POWER
PCH1G
7 OF 10 3D3V_S0
VCCIO20
AP23
VCCIO21
AP24
VCCIO22
VCCIO24
AT16
VCCDMI1
AT20
VCCCLKDMI
AB36
AG17
VCCDFTERM3
AJ16
AP16
VCCVRM2
VCCDFTERM4
AJ17 1
DFT / SPI
VCCSPI
V1
3D3V_S5
71.PANTH.00U
C2323 SCD1U10V2KX-L1-GP
B
w
w
PANTHER-GP-NF
1D8V_S0
2mA
1
VCCDMI2
C2321 SC1U6D3V2KX-L-1-GP
10mA
FDI
47mA(Total)
VCCAFDIPLL VCCIO27
1D05V_VTT
70mA
2 VCCDFTERM2
L2303 IND-10UH-218-GP 1 2
68.10050.10Y 2nd = 68.10090.10B
VCCIO25
VCC3_3_3
1D05V_VTT
C2320 SC1U6D3V2KX-L-1-GP
+1.05VS_VCC_DMI_CCI
BH29
AU20
m 1D05V_VTT
AG16
AP17
o
LVDS
CRT
VCCVRM3
SCD1U10V2KX-L1-GP C2322
h
C
VCCDFTERM1
BG6
C2319 SCD1U10V2KX-L1-GP
1D5V_S0
VCCIO26
1D05V_VTT
.c
V34
SCD1U10V2KX-L1-GP C2326
B
VCC3_3_7
AN34
167mA(Total) 1D5V_S0
2
C2310 SCD1U10V2KX-L1-GP
VCCIO23
in
1
228mA(Total)
VCC3_3_6
V33
2
AN33 3D3V_S0
AP37
1
AT24
AP36
VCCTX_LVDS4
2
AP26
AM38
VCCTX_LVDS3
1
VCCIO19
AP21
AM37
VCCTX_LVDS2
2
AN27
VCCTX_LVDS1
x
VCCIO18
HVCMOS
VCCIO17
AN26
AK37
fi
AN21
VCCIO
VCCIO16
a
1 2
1 2
1 2
1 2
SC1U6D3V2KX-L-1-GP C2309
SC1U6D3V2KX-L-1-GP C2308
SC1U6D3V2KX-L-1-GP C2307
SC1U6D3V2KX-L-1-GP C2306
C
VCCIO15
AN17
AK36
VSSALVDS
3D3V_S0
3.711A(Total) AN16
VCCALVDS
D
1
VCCAPLLEXP
U47
2
BJ22
VSSADAC
1
VCCIO28
U48
2
AN19
VCCADAC
.c
1D05V_VTT
VCCCORE1 VCCCORE2 VCCCORE3 VCCCORE4 VCCCORE5 VCCCORE6 VCCCORE7 VCCCORE8 VCCCORE9 VCCCORE10 VCCCORE11 VCCCORE12 VCCCORE13 VCCCORE14 VCCCORE15 VCCCORE16 VCCCORE17
DMI
1D05V_VTT
AA23 AC23 AD21 AD23 AF21 AF23 AG21 AG23 AG24 AG26 AG27 AG29 AJ23 AJ26 AJ27 AJ29 AJ31
VCC CORE
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
2
SC1U6D3V2KX-L-1-GP C2304
SC1U6D3V2KX-L-1-GP C2303
SC1U6D3V2KX-L-1-GP C2302
DY
SC10U6D3V3MX-L-GP C2301
DY
SC22U4V3MX-GP C2315
DY
SC22U4V3MX-GP C2314
DY
SC22U4V3MX-GP C2313
DY
SC22U4V3MX-GP C2312
D
SC22U4V3MX-GP C2311
1
1.7A
w
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
A
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
5
4
http://vinafix.vn 3
2
PCH (POWER1)
Size A3
Document Number
Date:
Monday, April 22, 2013
Angel-CY
Rev Sheet 1
23
of
1
102
POWER
1mA
VCCIO30
P26
VCCIO31
P28
VCCIO32
T27
VCCIO33
T29
VCCSUS3_3_7
T23
VCCSUS3_3_8
T24
VCCSUS3_3_9
V23
VCCSUS3_3_10
V24
VCCSUS3_3_6
P24
VCCIO34
T26
V5REF_SUS
M26
Angel-SA
VCCDSW3_3
T38
VCC3_3_5
D
VCCIO14
1
VCCAPLLDMI2
AL29
USB
DCPSUS3
C2424 SCD1U10V2KX-L1-GP
AD29
VCCASW13
W21
VCCASW14
C2409 SC1U6D3V2KX-L-1-GP
2 L2403
+VCCRTCEXT
W29
VCCASW18
W31
VCCASW19
W33
VCCASW20
N16
DCPRTC
1D5V_S0
BD47
+1.05VS_VCCA_B_DPL
C2412 2SC1U6D3V2KX-L-1-GP
1
1
VCCIO7 VCCDIFFCLKN1 VCCDIFFCLKN2 VCCDIFFCLKN3
AG33
C2413 2SC1U6D3V2KX-L-1-GP +VCCSST 2 1
1
1 2
1
1 2
w
VCCSSC
V16
DCPSST
T17 V19
DCPSUS1 DCPSUS2
BJ8
V_PROC_IO
A22
VCCRTC PANTHER-GP-NF
o
C2428 SC1U6D3V2KX-L-1-GP
3D3V_S0
AA16
VCC3_3_8
W16
VCC3_3_4
T34
VCC3_3_2
AJ2
C2430 SCD1U10V2KX-L1-GP
C2431 SCD1U10V2KX-L1-GP 3D3V_S0
VCCIO5
AF13
VCCIO12
AH13
VCCIO13
AH14
VCCIO6
AF14
C2429 SCD1U10V2KX-L1-GP 1D05V_VTT B
VCCAPLLSATA
C2432 SC1U6D3V2KX-L-1-GP
AK1
VCCVRM1
AF11
VCCIO2
AC16
VCCIO3
AC17
VCCIO4
AD17
1D5V_S0
1D05V_VTT
1D05V_VTT
VCCASW22
T21
VCCASW23
V21
VCCASW21
T19
VCCSUSHDA
P32
R2409 C2435 SC1U6D3V2KX-L-1-GP
1 2 0R0402-PAD
+3VS_+1.5VS_HDA_IO
10mA
71.PANTH.00U
A
Wistron Corporation
C2433 SCD1U10V2KX-L1-GP
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
4
3D3V_S5
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
2 5
Angel-SA
+3VS_+1.5VS_HDA_IO
1
1 2
C2434 SC1U10V3KX-L1-GP
SCD1U10V2KX-L1-GP C2418
6uA
SCD1U10V2KX-L1-GP C2419
RTC_AUX_S5
SC4D7U6D3V3KX-L-GP C2417
SCD1U10V2KX-L1-GP C2422
SCD1U10V2KX-L1-GP C2421
1mA
2
1D05V_VTT
w
C2415 SCD1U10V2KX-L1-GP 1D5V_S0
2
95mA
w
1D05V_VTT
2
C2414 SC1U6D3V2KX-L-1-GP
VCCADPLLB
AF17 AF33 AF34 AG34
VCC3_3_1
1
1D05V_VTT
55mA
VCCADPLLA
BF47
VCCSUS3_3_5
P22
2
1D05V_VTT
VCCVRM4
.c
+1.05VS_VCCA_A_DPL
P20
C
C2427 SC1U10V2KX-1GP
1
Y49
MISC
1
C2411 SCD1U10V2KX-L1-GP
2
B
1
VCCASW17
HDA
1
C2410 SC1U6D3V2KX-L-1-GP
2
68.1001D.10S
2
W26
+1.05VS_VCCA_B_DPL
1 2 IND-10UH-203-GP
A
VCCASW16
h
80mA
VCCASW15
W24
CPU
68.1001D.10S
W23
VCCSUS3_3_4
Angel-SA
2
+1.05VS_VCCA_A_DPL
RTC
L2402 1 2 IND-10UH-203-GP
1
80mA
AD31
N22
3D3V_S5
1
1D05V_VTT
VCCASW12
VCCSUS3_3_3
1
VCCASW11
N20
1 R2402 2 10R2F-L-GP
2
AC31
VCCSUS3_3_2
1mA
+5VS_PCH_VCC5REF
83.R0304.A8F 2nd = 83.R0304.D8F
2
VCCASW10
.c
VCCASW9
AC29
P34
5V_S0
D2402 CH751H-40PT-GP
1
AC27
SATA
1 2
1 2
1 2
1 2
1 2
SC1U6D3V2KX-L-1-GP C2408
SC1U6D3V2KX-L-1-GP C2407
SC1U6D3V2KX-L-1-GP C2406
SC10U6D3V3MX-L-GP C2404
SC10U6D3V3MX-L-GP C2403
C
V5REF
3D3V_S5
2
VCCASW8
AN24
3D3V_S0
Angel-SA
1
VCCASW7
AC26
VCCSUS3_3_1
1mA
2
AA31
AN23
1
VCCASW6
DCPSUS4
2
VCCASW5
AA29
903mA
C2426 SCD1U10V2KX-L1-GP
1
AA27
2
VCCASW4
C2425 SCD1U10V2KX-L1-GP
+5VA_PCH_VCC5REFSUS
x
AA26
1D05V_VTT
fi
VCCASW3
a
AA24
PCI/GPIO/LPC
VCCASW2
Clock and Miscellaneous
VCCASW1
AA21
in
1D05V_VTT
AA19
D
1 R2408 2 10R2F-L-GP
3D3V_S5
1
AL24
5V_S5
83.R0304.A8F 2nd = 83.R0304.D8F
95mA
2
BH23 1D05V_VTT
3D3V_S5
D2401 CH751H-40PT-GP
1
DCPSUSBYP
3D3V_S5
Angel-SA
1
V12
C2423 SC1U6D3V2KX-L-1-GP
2
3D3V_S5 3D3V_S0
1
N26
2
T16
C2402 SC1U10V2KX-1GP
1D05V_VTT
10 OF 10
VCCIO29
1
VCCACLK
1
PCH1J
AD49
1
m
v
2
2
fix = PCH SSID a in
3
2
4
2
5
http://vinafix.vn 3
2
PCH (POWER2)
Size A3
Document Number
Date:
Monday, April 22, 2013
Angel-CY
Rev Sheet 1
24
of
1
102
ix SSID af = PCH
3
vin
w
PANTHER-GP-NF A
H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28
D
.c
VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285 VSS286 VSS287 VSS288 VSS289 VSS290 VSS291 VSS292 VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300 VSS301 VSS302 VSS303 VSS304 VSS305 VSS306 VSS307 VSS308 VSS309 VSS310 VSS311 VSS312 VSS313 VSS314 VSS315 VSS316 VSS317 VSS318 VSS319 VSS320 VSS321 VSS322 VSS323 VSS324 VSS325 VSS328 VSS329 VSS330 VSS331 VSS333 VSS334 VSS335 VSS337 VSS338 VSS340 VSS342 VSS343 VSS344 VSS345 VSS346 VSS347 VSS348 VSS349 VSS350 VSS351 VSS352
x fi
in h
AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28
.c
VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158
w
B
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79
w
AA17 AA2 AA3 AA33 AA34 AB11 AB14 AB39 AB4 AB43 AB5 AB7 AC19 AC2 AC21 AC24 AC33 AC34 AC48 AD10 AD11 AD12 AD13 AD19 AD24 AD26 AD27 AD33 AD34 AD36 AD37 AD38 AD39 AD4 AD40 AD42 AD43 AD45 AD46 AD8 AE2 AE3 AF10 AF12 AD14 AD16 AF16 AF19 AF24 AF26 AF27 AF29 AF31 AF38 AF4 AF42 AF46 AF5 AF7 AF8 AG19 AG2 AG31 AG48 AH11 AH3 AH36 AH39 AH40 AH42 AH46 AH7 AJ19 AJ21 AJ24 AJ33 AJ34 AK12 AK3
8 OF 10
VSS0
VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258
a
PCH1H
H5
AY4 AY42 AY46 AY8 B11 B15 B19 B23 B27 B31 B35 B39 B7 F45 BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38 BB4 BB46 BC14 BC18 BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46 BD5 BE22 BE26 BE40 BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28 BD3 BF30 BF38 BF40 BF8 BG17 BG21 BG33 BG44 BG8 BH11 BH15 BH17 BH19 H10 BH27 BH31 BH33 BH35 BH39 BH43 BH7 D3 D12 D16 D18 D22 D24 D26 D30 D32 D34 D38 D42 D8 E18 E26 G18 G20 G26 G28 G36 G48 H12 H18 H22 H24 H26 H30 H32 H34 F3
C
B
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
4
http://vinafix.vn 3
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
PANTHER-GP-NF
5
1
9 OF 10
PCH1I
D
C
2
m
4
o
5
2
PCH (VSS)
Size A3
Document Number
Date:
Monday, April 22, 2013
Angel-CY
Rev Sheet 1
25
of
1
102
fix
5
4
3
2
1
a n i v
D
x
.c
o
m
D
C
fi
C
h
in
a
Blanking
B
w
.c
B
w
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
Wistron Corporation
w
A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
Clock(colay) 5
4
http://vinafix.vn 3
Size A4
Document Number
Angel-CY Monday, April 22, 2013
Date: 2
Rev
1 Sheet
26
of 1
102
A
5
fix
SSID = KBC
4
a n i v
1
1 2
C2702 SCD1U10V2KX-L1-GP EC_VSBY
1 R2778 2 0R0402-PAD
EC_VBKUP
1 R2779 2 0R0402-PAD
RTC_AUX_S5
65 WIFI_RF_EN 65 BLUETOOTH_EN 19 S0_PWR_GOOD
90 92 86 87 91
19
PM_SLP_S3#
31 63 64
GPIO52/PSDAT3/RDY# GPIO50/PSCLK3/TDO GPIO27/PSDAT2 GPIO26/PSCLK2 GPIO35/PSDAT1 GPIO37/PSCLK1
27 25 11 10 71 72
GPIO17/SCL1/N2TCK GPIO22/SDA1/N2TMS GPIO73/SCL2 GPIO74/SDA2 GPIO23/SCL3 GPIO31/SDA3 GPIO47/SCL4 GPIO53/SDA4
70 69 67 68 119 120 24 28
PLT_RST# 5,18,36,65,71,77,97 CLK_PCI_KBC 18 LPC_FRAME# 21,71,77
LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0
LPC_AD[0..3]
INT_SERIRQ 21,77 PM_CLKRUN# 19,77 PANEL_BLEN 17
ECSCI#_KBC
PCH_PCIE_WAKE# 19,65 H_A20GATE 20,22 H_RCIN# 20,22
BLON_OUT 49 TOUCH_EN 49 WLAN_PWR_EN# TPDATA TPCLK
56 HDD_PWR_EN 68 STDBY_LED 28,97 FAN1_PWM 69 KB_BL_PWM 68 PWRLED
32 118 62 65 22 81 66 16
GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM GPIO32/D_PWM GPIO45/E_PWM GPIO66/G_PWM GPIO33/H_PWM GPIO40/F_PWM
21 ME_UNLOCK 65 E51_RxD 65 E51_TxD
23 113 111
GPIO46/CIRRXM/TRIST# GPIO87/CIRRXM/SIN_CR GP/I/O83/SOUT_CR/TRIST#
68 CHARGE_LED 29 KBC_BEEP
21,71,77
19 PCH_SUSCLK_KBC 29 AMP_MUTE# ECRST#
65
69 69
5
H_PECI
BAT_SCL 39,40 Main Battery/ charger BAT_SDA 39,40 SML1_CLK_KBC 39 PCH/Thermal/2nd Battery SML1_DATA_KBC 39 AP_DET# 65 DC_BATFULL 68
SML1_CLK_KBC SML1_DATA_KBC
F_CS0# F_SCK F_SDI&F_SDIO1 F_SDIO&F_SDIO0 GPIO81/F_WP#
PSL_OUT_GPIO71# PSL_IN2_GPI06# PSL_IN1_GPI70#
74 93 73
PROCHOT_EC
CHG_ON#
VCORF
44
GPIO56/TA1 GPIO14/TB1 GPIO1/TB2
PECI
1 R2721 2 43R2J-GP
77 30
GPIO0/EXTCLK GPIO55/CLKOUT/IOX_DIN_DIO
85
VCC_POR#
13 12
53 52 51 50 49 48 47 43 42 41 40 39 38 37 36 35 34 33
KCOL0 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15
KBSIN0/GPIOA0/N2TCK KBSIN1/GPIOA1/N2TMS KBSIN2/GPIOA2 KBSIN3/GPIOA3 KBSIN4/GPIOA4 KBSIN5/GPIOA5 KBSIN6/GPIOA6 KBSIN7/GPIOA7
54 55 56 57 58 59 60 61
KROW0 KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7
PECI VTT
1D05V_VTT
KCOL[0..15]
KBSOUT0/GPOB0/JENK# KBSOUT1/GPIOB1/TCK KBSOUT2/GPIOB2/TMS KBSOUT3/GPIOB3/TDI KBSOUT4/GPOB4/JEN0# KBSOUT5/GPIOB5/TDO KBSOUT6/GPIOB6/RDY# KBSOUT7/GPIOB7 KBSOUT8/GPIOC0 KBSOUT9/GPOC1/SDP_VIS# KBSOUT10&P80_CLK/GPIOC2 KBSOUT11&P80_DAT/GPIOC3 KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62 KBSOUT15/GPIO61/XOR_OUT GPIO60/KBSOUT16 GPIO57/KBSOUT17
D
69,97
m
75
114
VSBY
VBKUP
102
4 VDD
AVCC
GPIO02 GPIO24 GPIO30/F_WP# GPIO34/CIRRXL GPIO36 GPIO41/F_WP# GPIO42/TCK GPIO43/TMS GPIO44/TDI GPIO51/N2TCK GPIO67N2TMS GPIO75 GPIO76 GPIO77
FAN_TACH1
KROW[0..7]
69,97
NPCE885PA0DX-GP
40
C2716 SCD1U10V2KX-L1-GP
3D3V_AUX_S5
3D3V_S5
KBC_PWRBTN#_R AC_IN#
AC_IN#
38,40
2 1
60 EC_SPI_CS0# 60 EC_SPI_CLK 21,60 SPI_SO_R 60 EC_SPI_SI
GPIO94/DA0 GPIO95/DA1 GPIO96/DA2 GPIO97/DA3
28
o
GPIO90/AD0 GPIO91/AD1 GPIO92/AD2 GPIO93/AD3 GPIO5/AD4 GPIO4/AD5 GPIO3/AD6 GPIO7/AD7
7 2 3 1 128 127 126 125 8 9 29 124 121 122
LRESET#/GPIOF7 LCLK/GPIOF5 LFRAME#/GPIOF6 LAD3/GPIOF4 LAD2/GPIOF3 LAD1/GPIOF2 LAD0/GPIOF1 SERIRQ/GPIOF0 GPIO11/CLKRUN# GPIO65/SMI# ECSCI#/GPIO54 GPIO10/LPCPD# GPIO85/GA20 KBRST#/GPIO86
2 0F 2
U2701B
SA_1026 65 WLAN_PCIE_WAKE#
.c
97 98 99 100 108 96 95 94
79 6 109 14 15 80 17 20 21 26 123 82 83 84
38 AD_OFF 18,52 SYS_COM_REQ 36,97 S5_ENABLE 40 2ND_BATT_CHR_OFF 39 BAT_IN# 70 LID_CLOSE# 19 RSMRST#_KBC 19,46 PM_SLP_S4# 39 BAT_IN#_2
19 46 76 88 115
VREF
101 105 106 107
65 WLAN_PERST#
AD_IA 2 C2714 SCD1U10V2KX-L1-GP
104
1 0F 2
1
MODEL_ID
ALL_POWER_OK
Angel-SA
EC_VBKUP
U2701A
2
PCB_VER_AD ADT_TYPE
KB_BL_DET 21 RTCRST_ON
EC_VSBY
VCC1 VCC2 VCC3 VCC4 VCC5
2
1 2
1 2
1
1 2
2
SCD1U10V2KX-L1-GP C2710
AD_IA
SCD1U10V2KX-L1-GP C2707
SCD1U10V2KX-L1-GP C2706
37,42,48
SCD1U10V2KX-L1-GP C2704
SC2D2U10V3KX-L-GP C2701
69
1
3D3V_AUX_KBC
40
1
2 3D3V_AUX_S5
D
DY
3 3D3V_S0
x
20,28 SML1_CLK
6
2
5
3
C
3 4
1
fi
1 2
2
1
103
2
GND1 GND2 GND3 GND4 GND5 GND6 18 45 78 89 116 5
2nd = 84.2N702.E3F 3rd = 84.2N702.F3F
2N7002KDW-GP
100KR2F-L3-GP R2706
71.00885.A0G
PCH_SUSCLK_KBC
C2712 SC1U10V3KX-L1-GP
SC20P50V2JN-1GP C2711
NPCE885PA0DX-GP
RN2710 SRN4K7J-8-GP
84.2N702.A3F
KBC_VCORF 1
GPIO20/TA2/IOX_DIN_DIO GP/I/O84/IOX_SCLK/XORTR# GPO82/IOX_LDSH/TEST# AGND
117 112 110
19,97 PM_PWRBTN# 19 AC_PRESENT 62,82 USB_PWR_EN#
C
SML1_CLK_KBC
4 Q2804
20,28 SML1_DATA
Angel-SA
SML1_DATA_KBC
3D3V_AUX_S5
29,82,97
C2713 SC1U6D3V2KX-L-1-GP
DY
G2701 GAP-OPEN
84.T3906.A11 2nd = 84.03906.F11
PROCHOT_EC
G
Angel-SA
3D3V_S0
D
R2774 1
5,40,42
S RN2701 SRN4K7J-8-GP
2 1
3D3V_AUX_KBC
H_PROCHOT#
R2732 100KR2J-4-GP BAT_SDA BAT_SCL
3 4
2N7002K-2-GP
84.2N702.J31 2ND = 84.2N702.031
Angel-SA
CHG_ON# 2 100KR2J-4-GP
3D3V_AUX_S5
1 R2772 2 0R0603-PAD
h
FAN_TACH1 2 10KR2J-L-GP
1
R2712 1
C2717
2
3D3V_AUX_KBC
B
SA_1031
3D3V_AUX_KBC
KBC_PWRBTN#_R
DY SC220P50V2KX-3GP
2
3rd = 84.M3906.B11
Q2702
2 R2757 1 470R2J-2-GP
KBC_PWRBTN#
1
1 Q2701 MMBT3906-4-GP
B
in
PURE_HW_SHUTDOWN#_R
C
28,36 PURE_HW_SHUTDOWN#
2
EC_SCI#
E
22
R2704 330KR2F-L-GP
1
ECRST#
3D3V_AUX_S5 RN2709 SRN10KJ-L-GP 1 4 2 3
ECSCI#_KBC
2
2 1 0R0402-PAD
1 R2759 2 0R0402-PAD
1
PM_SLP_S3#
2
29,36,37,47
a
EC_PM_SLP_S3# R2702
2 R2775 1 100KR2J-4-GP
BAT_IN#
2 R2769 1 100KR2J-4-GP
AC_IN#
B
Reserved
R2711 10KR2J-L-GP WLAN_PWR_EN#
0.82V
47.0K
100.0K
1.06V
64.9K
100.0K
1.3V
PCB VERSION A/D(PIN64) SA
PULL-LOW RESISTOR 100.0K
1
1
0.55V
100.0K
w
1
1 2
DY
EC2703
100.0K
33.0K
ADT_TYPE
R2734 10KR2F-L1-GP
R2736 20KR2F-L3-GP
MODEL_ID R2735 100KR2F-L3-GP
PULL-HIGH RESISTOR 10.0K
VOLTAGE 3.0V
SB
100.0K
20.0K
2.75V
SC
100.0K
33.0K
2.48V
-1
100.0K
47.0K
2.24V
-1M
100.0K
64.9K
2.0V
-2
100.0K
76.8K
1.87V
-3
100.0K
100K
1.65V
-3M
100.0K
143.0K
1.358V
-1M For PCH B3
100.0K
174.0K
1.204V
SA_1026 3D3V_S5
R2724 47KR2F-GP
A
PCB_VER_AD R2726 100KR2F-L3-GP
2
2
DY
EC2702
w
1
A
2
1
DY 3D3V_S5
EC2701
SC68P50V2JN-1GP
WLAN_PCIE_WAKE# AP_DET#
SC68P50V2JN-1GP
RN2703 SRN10KJ-L-GP 4 3
SC68P50V2JN-1GP
1 2
2
3D3V_IOAC
20.0K
3D3V_S5 R2737 100KR2F-L3-GP
2
Reserved
0.3V
2
120W
ALL_POWER_OK
0V
100.0K
1
40W
VOLTAGE 3.3V
N/A
2
10.0K
1
Angel-SA
30W
PULL-HIGH RESISTOR 100.0K
1
R2773 100KR2J-4-GP
BAT_IN#_2
100.0K
2
2
2 R2776 1 100KR2J-4-GP
PULL-LOW RESISTOR N/A
90W
3D3V_S5
1
ADT_TYPE A/D(PIN65) 65W
ECRST# S5_ENABLE
SPI_SO_R
Angel-SA 45W_60W# High: 65W / Low 40W DISCRETE# High: UMA / Low: Muxless
2
RN2705 SRN10KJ-L-GP 1 4 2 3
1
AD_OFF
w
R2770 1 1KR2J-L2-GP
.c
Angel-SA 2
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
5
4
3 2 http://vinafix.vn
Size Custom Date:
KBC ENE 9016
Document Number
Angel-CY
Monday, April 22, 2013
1
Sheet
Rev 27
of
1
102
5
4
SSIDx = Thermal
3
2
1
i
f ina
v
Thermal sensor NCT 7718W 3D3V_S0
D
2 1
D
RN2801 SRN10KJ-L-GP
1 THERM_SYS_SHDN#
NCT_CLK NCT_DATA ALERT#
8 7 6 5
SML1_DATA 20,27
NCT7718W-GP
2.System Sensor, Put on palm rest
o
VDD SCL D+ SDA DALERT# T_CRIT# GND
3rd = 83.5R003.08F
Q2802
1 2
83.R5003.C8F 2ND = 83.R5003.H8H
SML1_CLK 20,27
Angel-CL SB
.c
P2800_DXN
1 2 3 4
m
D2802 CH551H-30PT-GP
4
1
5
3
2
1 2 1
2
DY
2
C2804 SC470P50V-2-GP
2
1
3
1 2
2
NCT_DATA
U2801
5V_S0
6
P2800_DXP SC2K2P50V2KX-L-GP C2805
1
DY
*Layout* 15 mil
1
SCD1U10V2KX-L1-GP C2808
84.03904.L06 2nd = 84.03904.E11
R2804 NTC-100K-8-GP
NCT_CLK
C2801 SCD1U10V2KX-L1-GP
SC4D7U10V3KX-GP C2809
Q2801 PMBS3904-1-GP
84.2N702.A3F
2nd = 84.2N702.E3F 3rd = 84.2N702.F3F 2N7002KDW-GP
3 4
Layout notice : Both DXN and DXP routing 10 mil trace width and 10 mil spacing.
2
3D3V_S0
74.07718.0B9
x
1.H/W T8 Shutdown
C
5V_S0
fi
FAN_TACH1_C
97 FAN_TACH1_C
FAN1 ACES-CON4-29-GP 6
4 3 2 1 5
a
FAN1_PWM_R
1 R2806 2 0R0402-PAD
27,97 FAN1_PWM
20.F1639.004 2nd = 20.F1804.004
1
FAN_TACH1
2
FAN_TACH1_C
in
D2801 CH551H-30PT-GP
h
83.R5003.C8F 2ND = 83.R5003.H8H 3rd = 83.5R003.08F
B
1
3D3V_S0
R7
1
3D3V_S0
.c
B
R2805 18K7R2F-GP
R5
2
R2809 2KR2F-L1-GP
2
27
C
Q2803
S
THERM_SYS_SHDN#
ALERT#
w
SA_1031 D
27,36 PURE_HW_SHUTDOWN#
SA_1031
G
IMVP_PWRGD 36,42
2N7002K-2-GP
w
w
84.2N702.J31 2ND = 84.2N702.031 3rd = 84.2N702.W31
A
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
5
4
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Size Custom Date: 2
Thermal Sensor NCT7718W
Document Number
Sheet 1
Rev
1
Angel-CY
Monday, April 22, 2013
28
of
102
5
ix
1
5VA_S0
HDA_CODEC_BITCLK
Angel-CL SB
GAP-CLOSE
DY
G2901 1
5V_S0
AUD_AGND
2
Close to Pin1
3D3V_S0
AC97_DATIN
1 R2923 2 33R2J-L1-GP
HDA_SDIN0
1
2 GAP-CLOSE
m
21
C2913
2
1 2
G2902
SC10U10V3MX-GP
SCD1U10V2KX-L1-GP C2912
1
PVDD2
G2903 C2901 1 2 SC10U6D3V3MX-L-GP
1
LDO3_CAP
AUD_AGND close to codec IC
2
RN2901 AUDIO_PC_BEEP 1 C2914
GAP-CLOSE AUD_AGND
AUDIO_BEEP
2
SC1U6D3V2KX-L-1-GP
21 HDA_CODEC_BITCLK
4 3
1 2
KBC_BEEP 27 HDA_SPKR 21
SRN47K-2-GP-U R2903 4K7R2J-L-GP
21 HDA_CODEC_SDOUT HDA_CODEC_SYNC
21
HDA_CODEC_RST#
o
2
Close to Pin46
21
AUDIO_PC_BEEP 5V_S0 R2909 COMBO_MIC
1 2
1 2 3 4 5 6 7 8 9 10 11 12
2 1 1
LIN2-R_PORT-C LIN2-L_PORT-C
C2934 1 C2937 1
2 2SC1U6D3V2KX-L-1-GP SC1U6D3V2KX-L-1-GP
36 35 34 33 32 31 30 29 28 27 26 25
75.40201.070
58,97
INT_MIC_L_R
EC2901 VARISTOR-5D5V-19-GP
Close to Pin26
h
2
83.00056.Q11 2nd = 83.00056.R11
Angel-SA
2
1
1
KBC_PWRBTN#
HDA_CODEC_RST#
27,82,97
21
w
3
D2904 AZ2025-02S-R7G-GP
3
75.02025.07D
w
2nd = 75.005V0.A7D
2nd = 75.005V0.A7D AUD_SPK1_L+
D2905 AZ2025-02S-R7G-GP
75.02025.07D
w
2
1
AUD_SPK1_L-
A
83.00056.Q11 2nd = 83.00056.R11
DY
3
2
1
75.02025.07D
B
AMP_MUTE# 27
D2902 BAW56-5-GP 2 PD#
27,36,37,47
DY
AUD_AGND
D2903 AZ2025-02S-R7G-GP
EC_PM_SLP_S3#
1
Close to Pin28 AUD_SPK1_R+
SA_1031
D2901 BAW56-5-GP 2
3
.c
1
1
1 2
2
DY
SC2D2U10V3KX-L-GP C2932
SC10U6D3V3MX-L-GP C2931
Vendor suggest
SCD1U10V2KX-L1-GP C2930
2 56R2J-L1-GP 2 56R2J-L1-GP
C2936 SC5600P25V2KX-1GP
69.80024.011
Close to Pin40 1 R2919 1 R2920
INT_MIC_L_R
82,97
R2915 22K1R2F-L-GP
AUD_AGND
in
1 2
1 2
1 2
AUD_CBN CPVEE HP_OUT_R_AUD HP_OUT_L_AUD
1 2
1 2 1 2
1
C2929 SC10U10V3MX-GP
C2927 SC10U6D3V3MX-L-GP
SCD1U10V2KX-L1-GP C2928
SC10U6D3V3MX-L-GP C2925
SCD1U10V2KX-L1-GP C2924
2
Angel-CL SB
AUD_AGND
C2935 SC2D2U10V3KX-L-GP 1 2
82,97 AUD_HP1_JACK_R2 82,97 AUD_HP1_JACK_L2
COMBO_MIC C2910 TVL-0402-01-AB1-1-GP
AUD_AGND
AUD_AGND
AUD_AGND
R2929 INT_MIC_L 2 1KR2J-L2-GP 1
DY
71.03225.003
VREF B
COMBO_MIC_R
C
R2911 2K2R2F-GP
Angel-SA
R2913 2 1KR2J-L2-GP 1
ANALOG
LDO1_CAP
C2926 SCD1U10V2KX-L1-GP
MIC2V
SC2D2U10V3KX-L-GP C2923
1D5V_S0
82,97
R2927 10KR2J-L-GP 2 1 LDO1_CAP
5VA_S0 3D3V_S0
AUD_HP1_JD# AUD_AGND
1
2 SC2D2U10V3KX-L-GP 2 SC2D2U10V3KX-L-GP
1
2 20KR2F-L3-GP
2
2 39K2R2F-L-GP
1 R2912
x
1 R2910
C2920 C2921
1
MIC2-L_PORT-B MIC2-R_PORT-B
2
AUD_CBP
AUD_AGND
IDREF
fi
LDO2_CAP
2 SC10U6D3V3MX-L-GP
1
ALC282_SENSE_A
13 14 15 16 17 18 19 20 21 22 23 24
a
C2922
SENSE_A SENSE_B JDREF MONO-OUT MIC2-L_PORT-F-L MIC2-R_PORT-F-R MIC1-L_PORT-B-L MIC1-R_PORT-B-R LINE1-R_PORT-C-R LINE1-L_PORT-C-L LINE2-R_PORT-E-R LINE2-L_PORT-E-L
1
PVDD1
GND SPDIF-OUT/GPIO2 PDB PVDD2 SPK-OUT-R+ SPK-OUT-RSPK-OUT-LSPK-OUT-L+ PVDD1 AVDD2 LDO2-CAP AVSS2 CBP
MIC2V
2
AUD_SPK1_R+ AUD_SPK1_RAUD_SPK1_LAUD_SPK1_L+
AUD_SPK1_R-
COMBO_MIC_JD#
C2915 SC10U6D3V3MX-L-GP
1
COMBO_MIC_JD# PD# PVDD2
C
1D5V_S0
R2908 1 2 0R0402-PAD
COMBO_MIC_R1
1 R2907 2 22K1R2F-L-GP
AUD_AGND
Spilt by DGND
2
49 48 47 46 45 44 43 42 41 40 39 38 37
DVDD GPIO0/DMIC-DATA GPIO1/DMIC-CLK DVSS SDATA-OUT BCLK LDO3-CAP SDATA-IN DVDD-IO SYNC RESETB PCBEEP
DIGITAL
CPVDD CBN CPVEE HPOUT-R_PORT-I-R HPOUT-L_PORT-I-L MIC1-VREFO-L MIC1-VREFO-R MIC2-VREFO VREF LDO1-CAP AVDD1 AVSS1
2
1 2
AUDIO_DVDD
U2901 ALC3225-CG-GP
Close to Pin41
58 58 58 58
1 2 0R0603-PAD
3D3V_S0
C2919 SC10U10V3MX-GP
SCD1U10V2KX-L1-GP C2918
1
PVDD1
.c
R2918 1 2 0R0603-PAD
D
GAP-CLOSE
Close to Pin9 R2917 1 2 0R0603-PAD
1
D
C2909
2
1
1 2
1 2
1
1 2
1 2
1
2
DY 2
GAP-CLOSE G2904 1 2
Angel-SA
SC10U10V3MX-GP
SCD1U10V2KX-L1-GP C2906
G2905 1
R2902 1 2 0R0603-PAD
SC1U10V3KX-L1-GP C2907
R2901 1 2 0R0603-PAD
3D3V_S0 AUDIO_DVDD
C2902 SC22P50V2JN-L-GP
SC10U6D3V3MX-L-GP C2903
2
2
5V_S0
SC10U6D3V3MX-L-GP C2905
v
3
SCD1U10V2KX-L1-GP C2904
f ina
4
A
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3
Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
2nd = 75.005V0.A7D
5
Size Custom
4
http://vinafix.vn 3
2
Date:
Audio Codec_ALC3225
Document Number
Sheet 1
Rev
1
Angel-CY
Monday, April 22, 2013
29
of
102
fix
5
a n i v
4
3
2
1
AUDIO OP AMPLIFIER D
x
.c
o
m
D
C
fi
C
h
in
a
Blanking
B
w
.c
B
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Audio AMP 5
4
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Size A4
Document Number
Angel-CY Monday, April 22, 2013
Date: 2
Rev
1 Sheet
30
of 1
102
A
fix
5
4
3
2
1
a n i v
D
x
.c
o
m
D
C
fi
C
h
in
a
Blanking
B
w
.c
B
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21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
AR8158 5
4
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Size A4
Document Number
Angel-CY Monday, April 22, 2013
Date: 2
Rev
1 Sheet
31
of 1
102
A
fix
5
4
3
2
a n i v
1
Angel-1 SD_DATA0_R
R3205 1
2
SD_DATA1_R
R3206 1
2
SD_DATA2_R
R3207 1
2
SD_DATA3_R
R3208 1
2
SD_DATA0 74,97
0R0402-PAD
SD_DATA1 74,97
0R0402-PAD
Angel-1
SD_DATA2 74,97
0R0402-PAD
D
m
CARD_RREF 1 RREF 2 6K19R2F-GP 17 GPIO0
CARD_3V3
5
SDREG
6
XD_D7 XD_CD#
23 7
GND
SD_CMD 74,97
0R0402-PAD
SD_CLK
o
0R0402-PAD
74,97
SD_WP
SD_WP
74,97
SD_CD#
SD_CD#
74,97
2
C
3D3V_CARD_S0
CARD_VREG
in
71.05170.003
h
SD_CLK_R
SD_CMD_R
22 21 20 19 18 16 15 SD_DATA2_R SD_DATA3_R
2
3D3V_S0
2
SP14 SP13 SP12 SP11 SP10 SP9 SP8
25
R3202 1
x
1 R3201
SD_CLK_R
SC1U10V2KX-1GP C3202
3V3_IN
4
C
CARD_V1D8 C3201 1 SC1U10V2KX-1GP
24
V18
2
fi
DM DP
1
2 3
a
USB_PN10 USB_PP10
USB_PN10 USB_PP10
R3209 1
.c
SD_DATA0_R SD_DATA1_R
SD_WP
U3201 RTS5170-GR-GP
14 13 12 11 10 9 8
SD_CD#
Angel-SA
SP7 SP6 SP5 SP4 SP3 SP2 SP1 18 18
SD_CMD_R
D
SD_DATA3 74,97
0R0402-PAD
B
SD_CMD 1 2
1 SD_DATA3 2
1 SD_DATA1
1 SD_DATA2 2
2
2
1 SD_DATA0
w
1
1 2
1 2
2
2
w
DY
SC22P50V2JN-L-GP C3212
DY
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
SC22P50V2JN-L-GP C3211
DY
SC22P50V2JN-L-GP C3210
4
DY
SC22P50V2JN-L-GP C3209
DY
SC22P50V2JN-L-GP C3208
SCD1U10V2KX-L1-GP C3206
SC4D7U6D3V3KX-L-GP C3205
5
3D3V_CARD_S0
SCD1U10V2KX-L1-GP C3204
A
SC4D7U6D3V3KX-L-GP C3203
1
3D3V_S0
w
.c
B
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Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
RTS5159 (CARD READER) Size A4
Document Number
Angel-CY Monday, April 22, 2013
Date: 2
Rev
1 Sheet
32
of 1
102
A
fix
A
B
C
D
E
a n i v
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3
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Reserved A
B
http://vinafix.vn C
Size A4 Date:
Document Number
Angel-CY Monday, April 22, 2013 D
Rev
1 Sheet
33
of E
102
1
fix
5
4
3
2
1
a n i v
D
x
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o
m
D
C
fi
C
h
in
a
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B
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Reserved 5
4
http://vinafix.vn 3
Size A4
Document Number
Angel-CY Monday, April 22, 2013
Date: 2
Rev
1 Sheet
34
of 1
102
A
fix
5
4
3
2
1
a n i v
D
x
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o
m
D
C
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C
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USB 3.0 Controller 5
4
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Size A4
Document Number
Angel-CY Monday, April 22, 2013
Date: 2
Rev
1 Sheet
35
of 1
102
A
5
x
4
fi Power Sequence a in
3
2
1
v
3D3V_S5
1 R3608 2 100KR2J-4-GP
D
1 R3614 2 0R0402-PAD
PS_S3CNTRL 37 D
SYS_PW ROK 19
D
28,42 IMVP_PW RGD
SA_1101
Q3606 2N7002K-2-GP
27,29,37,47 EC_PM_SLP_S3#
m
1
84.2N702.J31 2ND = 84.2N702.031
3 2
o
83.00016.K11 2ND = 83.00016.F11
S
G
D3603 BAS16-6-GP
x
.c
27,29,37,47 EC_PM_SLP_S3#
C
5V_S5 U3601
VTT_CT_3VC
U3602
VIN#1 VIN#2 ON VBIAS
1D35V_S0
GND VOUT#8 VOUT#7 CT GND
9 8 7 6 5
VTT_CT_1D35V
TPS22965DSGR-GP
74.22965.093
C3608 SC1KP50V2KX-L-1-GP
DY 2
1 2 3 4
2ND = 74.03526.093
h
2ND = 74.03523.A73
DY
5V_S5
in
2
1 2
B
B
SA_1025
SA_1101
PLT_RST#_R
2
w w
3V_5V_EN
A
1
2 3 1
PURE_HW _SHUTDOW N#
27,28
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
D3601 BAS16-6-GP
83.00016.K11 2ND = 83.00016.F11
w
41
84.02222.V11 2nd = 84.02222.X11
B
SCD1U10V2KX-L1-GP C3602
R3632 2K2R2F-GP
Q3601 MMBT2222A-3-GP
2
2 R3616 1 4K7R2J-L-GP
PLT_RST#
1
5,18,27,65,71,77,97
H_THERMTRIP# 5,22
E
.c
1 R3622 2 1KR2J-L2-GP
1D05V_VTT
C
1 2
DY
SC1KP50V2KX-L-1-GP C3605
SC1KP50V2KX-L-1-GP C3603
SC1U10V2KX-1GP C3632
74.22966.093
1
27,29,37,47 EC_PM_SLP_S3#
TPS22966DPUR-GP C3633 SC1U10V2KX-1GP
3D3V_S0
1D35V_S3
1
VTT_CT_5VC
fi
15 14 13 12 11 10 9 8
2
27,29,37,47 EC_PM_SLP_S3#
GND VOUT1#14 VOUT1#13 CT1 GND CT2 VOUT2#9 VOUT2#8
VIN1#1 VIN1#2 ON1 VBIAS ON2 VIN2#6 VIN2#7
1
1 2 3 4 5 6 7
C
5V_S0
a
3D3V_S5
2 R3603 1 2KR2F-L1-GP
SA_1101
A
Wistron Corporation
S5_ENABLE 27,97
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
Power Plane Enable 5
4
http://vinafix.vn 3
2
Size A3
Document Number
Date:
Monday, April 22, 2013
Rev
1
Angel-CY Sheet 1
36
of
102
5
ix
f ina
4
3
2
1
Close to CPU S3 Power Reduction Circuit Processor VREF_DQ Implementation
v
SA_1101
SA_1101
Q3709 AO3418L-GP
DDR_VREF_S3 Q3708 AO3418L-GP
D
14 DDR_W R_VREF_CHA
S
M_VREF_DQ_DIMM0_C
D
84.03418.A31 2nd = 84.03404.C31
+V_SM_VREF_CNT 9
D
m
R3705 100KR2J-4-GP
G
84.03418.A31 2nd = 84.03404.C31
9
G
S 2
D
1
DRAMRST_CNTRL
EC_PM_SLP_S3# 27,29,36,47
.c
Q3710 AO3418L-GP
Q3704
D
15 DDR_W R_VREF_CHB 0D675V_EN
S
x
2N7002K-2-GP
1D05VTT_PW RGD 45,48
9
DRAMRST_CNTRL C
2
S3 Power Reduction Circuit SM_DRAMRST#
0D675V_S0
1 R3703 22R2J-2-GP
SA_1101
2
1D35V_S3
PS_S3CNTRL_Q
R3706 1KR2J-L2-GP
2
in
0D675V_EN 46
1
1
a
R3710 0R0402-PAD
SA_1101
M_VREF_DQ_DIMM1_C
fi
84.2N702.J31 2ND = 84.2N702.031
C
S
84.03418.A31 2nd = 84.03404.C31
IN A
1 R3704 2 0R2J-L-GP
1
GND OUT Y
4
73.01G09.AAH 2nd = 73.01G09.0AB
A
D
84.2N702.J31 2ND = 84.2N702.031
R3723 1 2 0R0402-PAD
G
84.2N702.J31 2ND = 84.2N702.031 36 DRAMRST_CNTRL_PCH
VDDPW RGOOD
PS_S3CNTRL
20
5
SA_1101
C3703 SCD047U25V2KX-GP
2
w
U3701 74VHC1G09DFT2G-GP
Q3701 2N7002K-2-GP
Angel-SA
1
VDDPW RGOOD_R 1 R3719 2 130R2F-L-GP
B
14,15
Q3703 2N7002K-2-GP
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
w
DY
DY
VCC
DDR3_DRAMRST#
SA_1101
2
3
1
2
5
SM_DRAMRST#_D 1 R3718 2 1KR2J-L2-GP
D G
R3702 200R2F-L1-GP
w
IN B
0D675V_EN_1
SM_DRAMRST#
DRAMRST_CNTRL
1
1 R3701 1 2 0R0402-PAD
2
45,48 1D05VTT_PW RGD
1D35V_S0
R3721 200R2F-L1-GP
SCD1U10V2KX-L1-GP C3701
19 PM_DRAM_PW RGD 27,42,48 ALL_POW ER_OK
3D3V_S5
2
R3713 200R2F-L1-GP
2
DY
SA_1026(HM2漏 漏漏) 3D3V_S0
1
3D3V_S5
S
h
Close to CPU S3 Power Reduction Circuit SM_DRAMPWROK
.c
5
B
S
D
G
G
36 PS_S3CNTRL
o
SA_1101
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title
ADAPTER 5
4
http://vinafix.vn 3
2
Size A3
Document Number
Date:
Monday, April 22, 2013
Rev
1
Angel-CY Sheet 1
37
of
102
5
4
fix solution ANNIE a in
v
3
2
1
remember to check pin define
pitch = 2mm AD_JK_IN
1
4
1
.c
S
1
1
4 5 6
2N7002BKS-GP-U
PR3802 100KR2J-4-GP
84.2N702.E3F 2nd = 84.2N702.A3F 3rd = 84.2N702.F3F
C
fi
D
2
x
1
o
1 2
G
1
D
AD_JK_IN_G_3
AD_JK_IN_G_1
PQ3803
2/26 wayler
2
2
2
2
1
1
PR3805 10KR2F-L1-GP
3
C
PR3804 100KR2F-L3-GP AD_JK_IN_G_2
AD_JK_IN_D
2
A
PR3803 4K7R2J-L-GP
PR3801 200KR2F-L-GP
PC3801 SC1U25V3KX-1-GP
1 2 3
G
TPCC8131-GP
D
83.P6SBM.DAG 2nd = 83.P6SMB.JAG 3rd = 83.P6SMB.CAG
S S S
S
2
PC3813
PU3801 D D D D
G
2nd = 20.F2198.005
PD3801 P6SBMJ27APT-GP
D
AD_JK
8 7 6 5 SC1U50V5ZY-1-GP
20.F2182.005
PC3812 SCD1U50V3KX-L-GP
ACES-CON5-27-GP
K
AD_JK_IN
2 3 4 5 NP2 7
m
6 NP1 1
2
DCIN1 D
PQ3805 2N7002K-2-GP
G
a
E
1 2 3
G
1 2
A
AD_JK_IN
PR3816
2
4
1
1
1 2
2
K
PWR_AD+_5
D
A
.c
2
DY
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
DY
A
Wistron Corporation
PW R_AD+_3
1
1
84.2N702.J31 2ND = 84.2N702.W31
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
1
DY
AD_2ND_BATT_G
10KR2F-L1-GP
PR3819 100KR2J-4-GP
PQ3804 2N7002K-2-GP
PR3806 10KR2F-L1-GP
w
PR3818
DY
S
S S S
PD3802 MMPZ5240BPT-GP
1PWR_AD+_4
D D D D
4
8 7 6 5
PR3814 100KR2J-4-GP
DY
w
AD_JK
84.08131.037 2nd = 84.07129.037
10KR2F-L1-GP PR3817 100KR2J-4-GP
PR3807 100KR2J-4-GP
DY
Title
DCIN JACK
2
2
DY
12/19 Raymond
5
8 7 6 5
B
AD_JK
w
AD_2ND_BATT
PU3803 TPCC8131-GP
AD+
PW R_AD+_2
PQ3802
84.00024.A1K 2ND = 84.05124.011 3rd = 84.00124.M1K
For 2nd BATT Structure
PC3814
G
C
2 R2 LTC024EUB-FS8-GP
Angel-SA
2
h
R2
B
R1
AD_OFF
PW R_ADJK_EN
3
D D D D
G PR3815 200KR2F-L-GP
SC1U50V5ZY-1-GP
27
B
1 S 2 S 3 S
DRA9115E0L-GP
PQ3801 R1
84.08131.037 2nd = 84.07129.037 3rd = 84.03604.B37
2
27,40
in
AC_IN#
1
PU3802 TPCC8131-GP
AD_JK
1
S
84.2N702.J31 2ND = 84.2N702.W31
4
http://vinafix.vn 3
2
Size A3
Document Number
Date:
Monday, April 22, 2013
Rev
1
Angel-CY Sheet 1
38
of
102
5
ix
4
f ina
3
2
BATTERY CONNECTOR
RTC_AUX_S5
1
v
1
PR3901 1KR2F-L1-GP
BAT_RST
Angel-SB
T1
SW 1
T2 T1
T2
T5
T6
T3
T4
1
2
RESET1
D
D
R3903 0R2J-L-GP
T6
DY
T4
2
T3
R3902
SW -TACT6-1-GP-U
62.40009.D51 2nd = 62.40009.B71
2 BI_low
1
10KR2F-L1-GP
SW -TACT6-1-GP-U
1Pin=3A, Use AWG 28 cable pitch = 1.25mm
62.40009.D51 2nd = 62.40009.B71
2
1
PC3901 SCD1U50V3KX-L-GP
PD3903
1 PC3902 SC2K2P50V2KX-L-GP
2
1
K
SRN33J-7-GP-U
83.5R603.D3F
BAT1
2ND = 83.5R603.K3F AZ2025-02S-R7G-GP 75.02025.07D 3
3rd = 83.5R603.Q3F
h
1
PC3904 SC2K2P50V2KX-L-GP
2
1
AD_2ND_BATT
2
BAT_SCL_1
97 97
BAT_SDA_1 BI
For AFTE C
in
Angel-SA
B
BAT_IN#_1
97
a
2ND = 75.005V0.A7D
PC3903 SCD1U50V3KX-L-GP
97
fi
EC Protect
A
C
8 7 6 5
2
1 2 3 4
27 BAT_IN# 27,40 BAT_SCL 27,40 BAT_SDA
BI BAT_IN#_1 BAT_SCL_1 BAT_SDA_1
2 3 4 5 6 7 8 10
.c
RN3901
ACES-CON8-53-GP 9 1
x
BT+
BT+
o
20.F2132.008 Angel-SA
PD3901 MMPZ5232BPT-GP-U
m
T5
97
SML1_DATA_2
97
SML1_CLK_2
97
BAT_G_2
B
.c
Check Net and pin define 97 .. BAT_IN#_2R
Check Net ..
20.82023.008 ALP-CON8-19-GP BAT2
9 1
RN3902
5 6 7 8
w
4 3 2 1
27 BAT_IN#_2 27 SML1_CLK_KBC 27 SML1_DATA_KBC
AD_2ND_BATT_CHR
BAT_G_2
BAT_IN#_2R SML1_CLK_2 SML1_DATA_2
2 PR3903 0R0402-PAD
1
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
w
75.02025.07D
w
PD3904 AZ2025-02S-R7G-GP
2
1 A
83.5R603.D3F 2ND = 83.5R603.K3F 3rd = 83.5R603.Q3F
K
SRN33J-7-GP-U
PD3902 MMPZ5232BPT-GP-U
2 3 4 5 6 7 8 10
3
A
A
Wistron Corporation 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
2ND = 75.005V0.A7D
Title
BATT CONN 5
4
http://vinafix.vn 3
2
Size A3
Document Number
Date:
Monday, April 22, 2013
Rev
1
Angel-CY Sheet 1
39
of
102
AD+_TO_SYS
1 2 3
G
2 PWR_CHG_ACP_R
1 2 3 PC4023 SC1U25V3KX-1-GP
2 2
1
5 6 7 8
SA
VEE +IN1 -IN1 OUT1
PWR_CHG_BAT_SDA 1 GAP-CLOSE-PWR-3-GP
PC4022 SCD1U25V2KX-L-GP
4 3 2 1
2 PG4009
74.10393.A21
1
1 PWR_CHG_ACN_R 2
6 5 4 +
2
B
1
2
27,39 BAT_SDA
2 PG4008
+IN2 -IN2 OUT2 VCC
1
2
2 BAT_SCL
PWR_CHG_BAT_SCL 1 GAP-CLOSE-PWR-3-GP
R3
R4
40W
2.1A 147K
49.9K
65W
3.4A 47K
49.9K
DC detect current : DC output current = 50 x ( PWR_CHG_ACP - PWR_CHG_ACN ) / 20mohm
2
3
PWR_2ND_BATT_CHR_G_2
1
2
1 AC_IN#
5
PWR_2ND_BATT_CHR_G_1 B
PR4038
1
470KR2F-GP
2N7002BKS-GP-U
CHN222GP-GP
6
2
84.2N702.E3F 2nd = 84.2N702.A3F 3rd = 84.2N702.F3F
4
2 2
4
1
PWR_ADP_CMPOUT
3
8 7 6 5
TPCC8131-GP
84.08131.037 2nd = 84.07129.037 PWR_2ND_BATT_CHR_G
A
Wistron Confidential document, Anyone can not Duplicate, Modify, Forward or any other purpose application without get Wistron permission
3rd = 84.03604.B37
PQ4008 DRA9115E0L-GP
Wistron Corporation
1
PWR_2ND_BATT_CHR_G_1
2
1
PQ4009
200KR2F-L-GP
2ND_BATT_CHR_OFF_R 1 PR4039 100KR2J-4-GP
PU4007 D D D D
S S S G
PD4003
SA
AD_2ND_BATT_CHR 1 2 3
PR4018 PC4024
12/25 Raymond PR4040 100KR2J-4-GP
E
3D3V_AUX_S5
DCBATOUT
2nd Battery charger 2
2ND_BATT_CHR_OFF_R
3D3V_AUX_S5 1
SA
PR4034 1 2 0R0402-PAD
27 2ND_BATT_CHR_OFF
2
PR4047 10KR2F-L1-GP
C
w 1
1 2
2
1 2
modify circuit for 2nd battery
DY
SC1U50V5ZY-1-GP
SA
PC4026 SCD1U10V2KX-L-GP
SA
SENSE>0.5V(Vit+) SENSE_OUT#:LOW
PC4029
SCD1U10V2KX-L-GP
PC4028 SCD1U10V2KX-L-GP
DY
27,39
5V_AUX_S5
SA
SA
TPS3896PDRYR-GP
74.03896.073
1
1
AC_OK_TYPE AC_OK_TYPE_CD
DY
9Vx10K/(169+10)K=0.503V