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• Guillermo Segura

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1

1

Compal Confidential 2

2

PAV70 DDR3 Schematics Document Intel Pineview Processor with Tigerpoint + DDRIII

2010-06-25 3

3

REV: 1.0

4

4

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A

B

C

D

Title

Cover Page Size B Date:

Document Number

Rev 0.1

LA-6421P Friday, June 25, 2010

Sheet E

1

of

39

A

B

C

D

Clock Generator CK505 page 8

Compal Confidential Model Name : PAV50 File Name : LA-6421P

E

CRT Conn page 10

1

1

ZZZ

RGB DA60000I610

LVDS

LCD Conn.

page 7 1.5V DDRIII 667

22x22mm

page 9

Thermal Sensor

Memory BUS(DDRIII) DDRIII-SO-DIMM

Pineview FCBGA 559

PCB

page 4,5,6

EMC1402 page 5

DMI X2 mode GEN1

PCI-Express

2

USB HDA

Tigerpoint PCBGA360

MINI Card x1 3G page 15

WLAN page 26

BlueTooth page 15

17x17mm

page 27

page 11,12,13,14

10/100 Ethernet

2

page 20

SATA

LPC BUS TPM

USB Port x2(L)

CMOS CAM HDD

AR8152

page 9

page 16

page 25

3G page 15

LPC BUS

Transfermer

USB Port x1(R) 3

RJ45

ALC272

Power ON/OFF

3

page 20

Aralia Codec page 22

Card Reader ENE6252

DC/DC Interface page 29

page 18

Int.KBD

3VALW/5VALW page 33

DC IN

ENE KBC KB926page

page 19

page 30

page 25

SPI 17

1.5VP/VCCP AMP & INT Speaker

page 34

BATT IN

page 31

SPI ROM

0.89VP/1.8VP 0.75VS

CHARGER

page 32

Light Sensor

page 35

4

Touch Pad

page27

INT MIC

HeadPhone & MIC Jack

SD/MMC/MS CONN

page 17

page19

4

CPU_CORE

page 36 2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A

B

C

D

Title

Block Diagrams Size B Date:

Document Number

Rev 0.1

LA-6421P Friday, June 25, 2010

Sheet E

2

of

39

A

B

C

D

E

1

1

Voltage Rails

2

External PCI Devices

Power Plane

Description

S1

S3

S5

VIN

Adapter power supply (19V)

N/A

N/A

N/A

DEVICE

B+

AC or battery power rail for power circuit.

N/A

N/A

N/A

+CPU_CORE

Core voltage for CPU

ON

OFF

OFF

+0.75VS

0.75V switched power rail for DDR terminator

ON

OFF

OFF

+VCCP

VCCP switched power rail

ON

OFF

OFF

+1.5VS

1.5V switched power rail

ON

OFF

OFF

+1.5V

1.5V power rail for DDR

ON

ON

OFF

+0.89V

Graphic core power rail

ON

OFF

OFF

+3VALW

3.3V always on power rail

ON

ON

ON*

+3VS

3.3V switched power rail

ON

OFF

OFF ON*

+5VALW

5V always on power rail

ON

ON

+5VS

5V switched power rail

ON

OFF

OFF

+VSB

VSB always on power rail

ON

ON

ON*

+RTCVCC

RTC power

ON

ON

ON

SIGNAL

SLP_S3# SLP_S4# SLP_S5#

PIRQ

2

EC SM Bus1 address

+VALW

+V

+VS

Clock

Full ON

HIGH

HIGH

HIGH

ON

ON

ON

ON

S1(Power On Suspend)

HIGH

HIGH

HIGH

ON

ON

ON

LOW

LOW

HIGH

HIGH

ON

ON

OFF

OFF

S3 (Suspend to RAM)

REQ/GNT #

No PCI Device

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

STATE

IDSEL #

S4 (Suspend to Disk)

LOW

LOW

HIGH

ON

OFF

OFF

OFF

S5 (Soft OFF)

LOW

LOW

LOW

ON

OFF

OFF

OFF

EC SM Bus2 address

Device

Address

Device

Address

Smart Battery

0001 011X b

EMC1402

100_1100

ICH7M SM Bus address

3

BOARD ID Table(Page 17) VCC Ra

3.3V 100K

ID BRD ID PAV50

0 1 2 3 4 5 6 7

R01 (EVT) R02 (DVT) R03 (PVT) R10A (MP) R01 (EVT) R02 (DVT) R03 (PVT) R10A (MP)

Rb

Vab-Min

Vab-Typ

Vab-Max

0 8.2K 18K 33K 56K 100K 200K NC

0V 0.216V 0.436V 0.712V 1.036V 1.453V 1.935V 2.500V

0V 0.250V 0.503V 0.819V 1.185V 1.650V 2.200V 3.3V

0V 0.289V 0.538V 0.875V 1.264V 1.759V 2.341V 3.3V

Device

Address

Clock Generator (SLG8SP556VTR)

1101 001Xb

DDR DIMMA

1010 000Xb

3

4

4

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A

B

C

D

Title

Notes List Size B Date:

Document Number

Rev 0.1

LA-6421P Monday, May 03, 2010

Sheet E

3

of

39

5

4

3

2

1

(7) DDR_A_DQS#[0..7] PINEVIEW_M

U71

PINEVIEW_M

(7) DDR_A_D[0..63]

N475@

N475@

U71A

U71B

REV = 1.1

(7) DDR_A_DM[0..7] REV = 1.1

DMI_RX0_R DMI_RX#0_R DMI_RX1_R DMI_RX#1_R

F3 F2 H4 G3

DMI_RXP_0 DMI_RXN_0 DMI_RXP_1 DMI_RXN_1

N7 N6

EXP_CLKINN EXP_CLKINP

DMI_TXP_0 DMI_TXN_0 DMI_TXP_1 DMI_TXN_1

G2 G1 H3 J2

AH19 AJ18 AK18 AK16 AJ14 AH14 AK14 AJ12 AH13 AK12 AK20 AH12 AJ11 AJ24 AJ10

DDR_A_MA_0 DDR_A_MA_1 DDR_A_MA_2 DDR_A_MA_3 DDR_A_MA_4 DDR_A_MA_5 DDR_A_MA_6 DDR_A_MA_7 DDR_A_MA_8 DDR_A_MA_9 DDR_A_MA_10 DDR_A_MA_11 DDR_A_MA_12 DDR_A_MA_13 DDR_A_MA_14

DDR_A_WE# DDR_A_CAS# DDR_A_RAS#

AK22 AJ22 AK21

DDR_A_WE# DDR_A_CAS# DDR_A_RAS#

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

AJ20 AH20 AK11

DDR_A_BS_0 DDR_A_BS_1 DDR_A_BS_2

DDR_CS#0 DDR_CS#1

AH22 AK25 AJ21 AJ25

DDR_A_CS#_0 DDR_A_CS#_1 DDR_A_CS#_2 DDR_A_CS#_3

DDR_CKE0 DDR_CKE1

AH10 AH9 AK10 AJ8

DDR_A_CKE_0 DDR_A_CKE_1 DDR_A_CKE_2 DDR_A_CKE_3

M_ODT0 M_ODT1

AK24 AH26 AH24 AK27

DDR_A_ODT_0 DDR_A_ODT_1 DDR_A_ODT_2 DDR_A_ODT_3

(7) DDR_A_DQS[0..7]

DMI_TX0 (13) DMI_TX#0 (13) DMI_TX1 (13) DMI_TX#1 (13)

(7) DDR_A_MA[0..14]

DMI

N455@

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14

D

(8) CLK_CPU_EXP# (8) CLK_CPU_EXP

R10 R9 N10 N9

EXP_RCOMPO EXP_ICOMPI EXP_RBIAS

L10 L9 L8

RSVD_TP RSVD_TP

N11 P11

EXP_TCLKINN EXP_TCLKINP RSVD RSVD

R162 R203 49.9_0402_1% 750_0402_1% T38 T39

Must be placed within 500 mils from Pineview-M pins (7) DDR_A_WE# (7) DDR_A_CAS# (7) DDR_A_RAS#

U71 K2 J1 M4 L3

RSVD RSVD RSVD RSVD

N550@

RSVD RSVD RSVD RSVD

K3 L2 M2 N2

(7) DDR_A_BS0 (7) DDR_A_BS1 (7) DDR_A_BS2

(7) DDR_CS#0 (7) DDR_CS#1

JP16 (5) (5)

XDP_PREQ# XDP_PRDY#

(5) (5) (13)

DMI_RX0

(13)

DMI_RX#0

C436

DMI_RX0_R

1

2 0.1U_0402_10V7K

1

DMI_RX#0_R 2 0.1U_0402_10V7K

1

DMI_RX1_R 2 0.1U_0402_10V7K

C

(13) (13)

C437

DMI_RX1

C438

DMI_RX#1

(5) (5)

XDP_BPM#3 XDP_BPM#2

XDP_BPM#1 XDP_BPM#0

XDP_BPM#1 XDP_BPM#0

(8) (8) +VCCP (5,13,15,17,25,26,27)

R354 1 R347 1 CPU_ITP CPU_ITP#

@2 1K_0402_5% @2 1K_0402_5%

PLTRST# 1 R348 @2 1K_0402_1%

PLTRST# (5) (5) (5) (5)

Close to CPU

XDP_PREQ# XDP_PRDY#

XDP_BPM#3 XDP_BPM#2

(5,13) H_PWRGD (13) SLPIOVR#

DMI_RX#1_R 2 0.1U_0402_10V7K

1

XDP_TDO XDP_TRST# XDP_TDI XDP_TMS

(5)

XDP_TCK

XDP_TDO XDP_TRST# XDP_TDI XDP_TMS XDP_TCK

2010-1-18 modify

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

CONN@

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 G1 G2

(7) DDR_CKE0 (7) DDR_CKE1

(7) M_ODT0 (7) M_ODT1

(7) (7) (7) (7)

M_CLK_DDR0 M_CLK_DDR#0 M_CLK_DDR1 M_CLK_DDR#1

M_CLK_DDR0 M_CLK_DDR#0 M_CLK_DDR1 M_CLK_DDR#1

(7) DRAM_PWROK

AG15 AF15 AD13 AC13

DDR_A_CK_0 DDR_A_CK_0# DDR_A_CK_1 DDR_A_CK_1#

AC15 AD15 AF13 AG13

DDR_A_CK_3 DDR_A_CK_3# DDR_A_CK_4 DDR_A_CK_4#

AD17 AC17 AB15 AB17

RSVD RSVD RSVD RSVD

DRAM_PWROK AB4 DRAMRST#_R AK8

RSVD RSVD

DRAM_PWROK

ACES_87151-24051

2

+1.5V

XDP Reserve

1

51 +-1% 0402

XDP_TMS

R342 1

2

51 +-1% 0402

XDP_TDO

R343 1

2

51 +-1% 0402

XDP_PREQ#

R344 1

2

51 +-1% 0402

+1.5V

DRAMRST# (7)

R50

0_0402_5%

1K_0402_1%

1

2

B

XDP_TRST#

R345 1

2

51 +-1% 0402

XDP_TCK

R346 1

2

51 +-1% 0402

+5VS

FAN1 Conn

2

R142

2

Modify D38 D39 D40 Pin define 2

A

R256 10K_0402_5% 2

40mil +VCC_FAN1

(17) FAN_SPEED1 1

2

C311 3G@ 100P_0402_50V8J

JP12 1 2 3

1 2 3

G1 G2

4 5

ACES_85204-03001 CONN@

AB6 AB7 AE5 AG5 AA5 AB5 AB9 AD6

DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15

AD8 AD10 AE8

DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DM2

AG8 AG7 AF10 AG11 AF7 AF8 AD11 AE10

DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23

AK5 AK3 AJ3

DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DM3

AH1 AJ2 AK6 AJ7 AF3 AH2 AL5 AJ6

DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31

AG22 AG21 AD19

DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DM4

AE19 AG19 AF22 AD22 AG17 AF19 AE21 AD21

DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39

DDR_A_DQS_5 DDR_A_DQS#_5 DDR_A_DM_5

AE26 AG27 AJ27

DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DM5

DDR_A_DQ_40 DDR_A_DQ_41 DDR_A_DQ_42 DDR_A_DQ_43 DDR_A_DQ_44 DDR_A_DQ_45 DDR_A_DQ_46 DDR_A_DQ_47

AE24 AG25 AD25 AD24 AC22 AG24 AD27 AE27

DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47

AE30 AF29 AF30

DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DM6

AG31 AG30 AD30 AD29 AJ30 AJ29 AE29 AD28

DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55

AB27 AA27 AB26

DDR_A_DQS7 DDR_A_DQS#7 DDR_A_DM7

AA24 AB25 W24 W22 AB24 AB23 AA23 W27

DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_DQS_4 DDR_A_DQS#_4 DDR_A_DM_4 DDR_A_DQ_32 DDR_A_DQ_33 DDR_A_DQ_34 DDR_A_DQ_35 DDR_A_DQ_36 DDR_A_DQ_37 DDR_A_DQ_38 DDR_A_DQ_39

AL28 AK28 AJ26

RSVD_TP RSVD_TP DDR_VREF DDR_RPD DDR_RPU RSVD

DDR_A_DQS_6 DDR_A_DQS#_6 DDR_A_DM_6

C440 0.01U_0402_16V7K DDR_A

DDR_A_DQ_48 DDR_A_DQ_49 DDR_A_DQ_50 DDR_A_DQ_51 DDR_A_DQ_52 DDR_A_DQ_53 DDR_A_DQ_54 DDR_A_DQ_55

08/13

2

DDR_A_DQS_7 DDR_A_DQS#_7 DDR_A_DM_7 DDR_A_DQ_56 DDR_A_DQ_57 DDR_A_DQ_58 DDR_A_DQ_59 DDR_A_DQ_60 DDR_A_DQ_61 DDR_A_DQ_62 DDR_A_DQ_63

4

D

C

B

A

2 OF 6 PINEVIEW-M_FCBGA8559

Add 2009-6-17

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5

DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DM1

DDR_A_DQ_24 DDR_A_DQ_25 DDR_A_DQ_26 DDR_A_DQ_27 DDR_A_DQ_28 DDR_A_DQ_29 DDR_A_DQ_30 DDR_A_DQ_31

PJDLC05C_SOT23-3

1

D40 PJDLC05C_SOT23-3

1

C1150 1000P_0402_50V7K 1 2

1

4.7U_0603_6.3V6K

2

XDP_TRST# XDP_TDI

2

PJDLC05C_SOT23-3

4.7U_0603_6.3V6K C313 1

C1151 +3VS 0.01U_0402_16V7K

AB8 AD7 AA9

DDR_A_DQS_3 DDR_A_DQS#_3 DDR_A_DM_3

D39

1

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7

DDR_A_DQ_16 DDR_A_DQ_17 DDR_A_DQ_18 DDR_A_DQ_19 DDR_A_DQ_20 DDR_A_DQ_21 DDR_A_DQ_22 DDR_A_DQ_23

D38

2 C314

1

APL5607KI-TRG_SO8

2

3

XDP_PREQ# XDP_TDO 3

1

8 7 6 5

3

EN_FAN1

GND GND GND GND

1

(17)

+VCC_FAN1 1 2 R47 330_0402_5%

EN VIN VOUT VSET

AC4 AC1 AF4 AG2 AB2 AB3 AE2 AE3

DDR_A_DQS_2 DDR_A_DQS#_2 DDR_A_DM_2

XDP_TMS XDP_TCK

D19@ DAN217_SC59

U12 1 2 3 4

DDR_A_DQ_0 DDR_A_DQ_1 DDR_A_DQ_2 DDR_A_DQ_3 DDR_A_DQ_4 DDR_A_DQ_5 DDR_A_DQ_6 DDR_A_DQ_7

DDR_A_DQ_8 DDR_A_DQ_9 DDR_A_DQ_10 DDR_A_DQ_11 DDR_A_DQ_12 DDR_A_DQ_13 DDR_A_DQ_14 DDR_A_DQ_15

2

3

2.2U_0603_10V6K 2

AB11 AB13

AK29

2

1 1

+5VS

R370 0_0402_5% @ T40 T41

R243 R242 80.6_0402_1% 80.6_0402_1%

C439

1K_0402_1%

Modify follow KAV60 schematic 06/12

C312 1

DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DM0

DDR_A_DQS_1 DDR_A_DQS#_1 DDR_A_DM_1

+1.5V

1

DRAMRST#

2

2

0.1U_0402_10V7K

DRAMRST#_R 1

R341 1

1

R1413

2010/01/18 DDR3 add

+VCCP

XDP_TDI

2

R1412 10K_0402_5%

@

AD3 AD2 AD4

1 OF 6

PINEVIEW-M_FCBGA8559

C435

DDR_A_DQS_0 DDR_A_DQS#_0 DDR_A_DM_0

3

2

Title

Pineview(1/3) Size Document Number Custom Date:

Rev 0.1

LA-6421P

Monday, June 28, 2010

Sheet 1

4

of

39

5

4

3

2

1

Add 470PF on H_SMI# for known issue 07/08 N475@

PINEVIEW_M U71C

1

CRT_HSYNC CRT_VSYNC

M30 GMCH_CRT_HSYNC_R M29 GMCH_CRT_VSYNC_R

CRT_RED CRT_GREEN CRT_BLUE CRT_IRTN

N31 P30 P29 N30

CRT_DDC_DATA CRT_DDC_CLK

L31 L30

DAC_IREF

P28 Y30 Y29 AA30 AA31

REFCLKINP REFCLKINN REFSSCLKINP REFSSCLKINN

K29 J30 L5 AA3 W8 W9

HPL_CLKINN HPL_CLKINP

C

T22 T23 T24 T25

AA21 W21 T21 V21

RSVD_TP RSVD_TP RSVD_TP RSVD_TP

GMCH_CRT_HSYNC GMCH_CRT_VSYNC

CPU_DREFCLK CPU_DREFCLK# CPU_SSCDREFCLK CPU_SSCDREFCLK#

PM_EXTTS#1 PM_EXTTS#0 H_PW ROK PLTRST#

(10) (10)

(9) (9) (9) (9) (9) (9) (9) (9)

LVDS_ACLK# LVDS_ACLK LVDS_A0# LVDS_A0 LVDS_A1# LVDS_A1 LVDS_A2# LVDS_A2 R151 2.37K_0402_1%

CPU_DREFCLK (8) CPU_DREFCLK# (8) CPU_SSCDREFCLK (8) CPU_SSCDREFCLK# (8)

GMCH_ENBKL

(17) GMCH_ENBKL (9,17) INVT_PW M

Add INVT_PWM (9)

0_0402_5% R200

N475@

PINEVIEW_M

U71D

0_0402_5% R213 @

05/11

LVDS_SCL (9) LVDS_SDA (9) GMCH_ENVDD

PM_DPRSLPVR (13)

U25 U26 R23 R24 N26 N27 R26 R27

LA_CLKN LA_CLKP LA_DATAN_0 LA_DATAP_0 LA_DATAN_1 LA_DATAP_1 LA_DATAN_2 LA_DATAP_2

R22 J28 N22 N23 L27 L26 L23 K25 K23 K24 H26

LIBG LVBG LVREFH LVREFL LBKLT_EN LBKLT_CTL LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN

PM_EXTTS#0 (7)

C1171

2 470P_0402_50V7K

REV = 1.1

GMCH_CRT_R (10) GMCH_CRT_G (10) GMCH_CRT_B (10)

GMCH_CRT_DATA (10) GMCH_CRT_CLK (10) R201 665_0402_1%

SMI# A20M# FERR# LINT0 LINT1 IGNNE# STPCLK#

E7 H7 H6 F10 F11 E5 F8

H_SMI# H_A20M# H_FERR# H_INTR H_NMI H_IGNNE# H_STPCLK#

DPRSTP# DPSLP# INIT# PRDY# PREQ#

G6 G10 G8 E11 F15

H_DPRSTP# H_DPSLP# H_INIT# XDP_PRDY# XDP_PREQ#

THERMTRIP#

E13

H_THERMTRIP#

PROCHOT# CPUPWRGOOD

C18 W1

H_PROCHOT# H_PW RGD

GTLREF VSS

A13 H27

H_GTLREF

RSVD RSVD

L6 E17

BCLKN BCLKP

H10 J10

BSEL_0 BSEL_1 BSEL_2

K5 H5 K6

CPU_BSEL0 CPU_BSEL1 CPU_BSEL2

VID_0 VID_1 VID_2 VID_3 VID_4 VID_5 VID_6

H30 H29 H28 G30 G29 F29 E29

CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6

RSVD RSVD RSVD RSVD

L7 D20 H13 D18

RSVD_TP RSVD_TP EXTBGREF

K9 D19 K7

H_DPRSTP# (13) H_DPSLP# (13) H_INIT# (12) XDP_PRDY# (4) XDP_PREQ# (4) H_THERMTRIP# (12)

H_PW RGD (4,13)

CLK_CPU_HPLCLK# (8) CLK_CPU_HPLCLK (8)

Del R323 05/11

C

Modify 08/04

RSVD_TP RSVD_TP RSVD_TP RSVD_TP

H_PW ROK

1

R305

@ 2

VGATE

0_0402_5% R306 1 2

(4) (4) (4) (4)

(8,13,17,36)

G11 E15 G13 F13

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 T48 T49 T50 T51

PCH_POK (13,17)

0_0402_5%

(4) (4) (4) (4) (4)

XDP_TDI XDP_TDO XDP_TCK XDP_TMS XDP_TRST#

T55 XDP_TDI XDP_TDO XDP_TCK XDP_TMS XDP_TRST# H_THERMDA H_THERMDC

B

Place closed to chipset 3 OF 6

GMCH_CRT_R

PINEVIEW-M_FCBGA8559

GMCH_CRT_G GMCH_CRT_B GMCH_ENBKL

R307 2 150_0402_1% 1 R308 2 150_0402_1% 1 R309 2 150_0402_1% R34 100K_0402_5%

1

T58

XDP_TCK

T59

XDP_TDI

T60

XDP_TDO

T61

XDP_TMS

T62

XDP_TRST#

T63

H_PW RGD

BPM_1_0# BPM_1_1# BPM_1_2# BPM_1_3#

B18 B20 C20 B21

BPM_2_0#/RSVD BPM_2_1#/RSVD BPM_2_2#/RSVD BPM_2_3#/RSVD

G5 D14 D13 B14 C14 C16

RSVD TDI TDO TCK TMS TRST#

D30 E30

THRMDA_1 THRMDC_1

C30 D31

CLK_CPU_BCLK# CLK_CPU_BCLK

CLK_CPU_BCLK# (8) CLK_CPU_BCLK (8) CPU_BSEL0 (8) CPU_BSEL1 (8) CPU_BSEL2 (8) CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6

(36) (36) (36) (36) (36) (36) (36)

T26 T27 H_EXTBGREF B

THRMDA_2/RSVD THRMDC_2/RSVD 4 OF 6 PINEVIEW-M_FCBGA8559

+VCCP

+VCCP

H_THERMDA, H_THERMDC routing together. Trace width / Spacing = 10 / 10 mil

2

8

EC_SMB_CK2

DP

SMDATA

7

EC_SMB_DA2

DN

ALERT#

6

2

GND

5

VDD

H_THERMDA

2

H_THERMDC 2200P_0402_50V7K

3 4

THERM#

EC_SMB_CK2 (17,27)

Close to Processor pin

EC_SMB_DA2 (17,27)

R58 1 10K_0402_5%

2006/08/18

Deciphered Date

4

3

R156 3.3K_0402_1%

2

Compal Electronics, Inc. 2007/8/18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Address:100_1100

1

placed within 0.5" of processor pin.

placed within 0.5" of processor pin.

Compal Secret Data

Security Classification

R155 2K_0402_1%

2

+3VS

Issued Date

EMC1402-1-ACZL-TR MSOP 8P SENSOR

5

Close to Processor pin

1

@ C940

PM_EXTTS#0

SMCLK

1

H_PROCHOT#

1U_0603_10V6K

U2

2

@ C939

C80

1U_0603_10V6K

1

H_GTLREF R202 68_0402_5%

R143 10K_0402_5%

1

C79

1

H_EXTBGREF

CPU THERMAL SENSOR

2

0.1U_0402_16V4Z

A

R244 976_0402_1%

R144 1K_0402_1%

+VCCP +3VS +3VS

D

H_SMI# (12) H_A20M# (12) H_FERR# (12) H_INTR (12) H_NMI (12) H_IGNNE# (12) H_STPCLK# (12)

PLTRST# (4,13,15,17,25,26,27)

CLK_CPU_HPLCLK# CLK_CPU_HPLCLK

MISC

AA7 AA6 R5 R6

GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B

@ 1

15_0402_5% 2 2 15_0402_5%

RSVD

PM_EXTTS#_1/DPRSLPVR PM_EXTTS#_0 PWROK RSTIN#

T18 T19 T20 T21

R249 1 1 R247

ICH

R1378

REV = 1.1

CPU

L11

D

XDP_RSVD_00 XDP_RSVD_01 XDP_RSVD_02 XDP_RSVD_03 XDP_RSVD_04 XDP_RSVD_05 XDP_RSVD_06 XDP_RSVD_07 XDP_RSVD_08 XDP_RSVD_09 XDP_RSVD_10 XDP_RSVD_11 XDP_RSVD_12 XDP_RSVD_13 XDP_RSVD_14 XDP_RSVD_15 XDP_RSVD_16 XDP_RSVD_17

LVDS

T37

T2 T12 T3 T4 T13 T5 T6 T7 T14

VGA

2 T8 1K_0402_5% T15 T9 T16 T10 T17 T11 T28

D12 A7 D6 C5 C7 C6 D8 B7 A9 D9 C8 B8 C10 D10 B11 B10 B12 C11

2

Title

Pineview(2/3) Size B Date:

Document Number

Rev 0.1

LA-6421P Thursday, June 03, 2010

Sheet 1

5

of

39

A

4

3

2

1

U71F

N475@

+CPU_CORE

U71E

GFX supply current: 2.64A

PINEVIEW_M

+0.89V

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

REV = 1.1

VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX

CPU

T13 T14 T16 T18 T19 V13 V19 W14 W16 W18 W19

GFX/MCH

D

DDR supply current 2.27A

+1.5V

1

2

2

2

2

AK13 AK19 AK9 AL11 AL16 AL21 AL25

1U_0402_6.3V6K

C85 1

1U_0402_6.3V6K

C84 1

AK7 AL7

1 +VCCP

VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM

VCCCK_DDR VCCCK_DDR

1 C428 2

2

C243 2

C236 2

2

AA10 AA11

VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR

1

2

C1154

2

1

C1152

2

1

2

1

C1153

VCCSENSE VSSSENSE VCCA

VCCP VCCP

C29 B29 Y2

+ C278

C275 330U 2.5V Y 2

2

330U 2.5V Y

1U_0402_6.3V6K 22UF 6.3V M X5R 0805

1U_0402_6.3V6K

PLACE IN CAVITY

+VCCP

C1161 1

1

C1160 0.1U_0402_10V6K

2

C86 1 1U_0402_6.3V6K

0.1U_0402_10V6K 2 2 Close U71.D4

1

R20

+RING_EAST

2 1

0_0603_5% +CPU_CORE VCCSENSE

1

VSSSENSE

1

R32

2 R21

100_0402_1%

VCCSENSE VSSSENSE

R31 2 100_0402_1%

1

+RING_WEST

2 1

0_0603_5%

VCCSENSE (36) VSSSENSE (36) +1.5VS

+VCCPProcessor

C242 1U_0603_10V6K

2

R28 1 2 0_0805_5%

VCCACK_DDR VCCACK_DDR

1

+

22UF 6.3V M X5R 0805

C64 1U_0603_10V6K

VCCP

AA19

2

1 C431

2 x 330uF(9mohm/2)

POWER

1

1U_0603_10V6K

C55

1

1 C430

22UF 6.3V M X5R 0805

DDR

@

1

4.7U_0603_6.3V6K

2

22UF 6.3V M X5R 0805

C238

2

U10 U5 U6 U7 U8 U9 V2 V3 V4 W10 W11

1U_0402_6.3V6K 1 C429

DDR analog supply current: 1.32A

1U_0402_6.3V6K

22UF 6.3V M X5R 0805

C267

2

C83 1 1U_0402_6.3V6K

+1.5V C

1U_0402_6.3V6K

22UF 6.3V M X5R 0805

C268 C82 1 1

+CPU_CORE

1U_0402_6.3V6K

A23 A25 A27 B23 B24 B25 B26 B27 C24 C26 D23 D24 D26 D28 E22 E24 E27 F21 F22 F25 G19 G21 G24 H17 H19 H22 H24 J17 J19 J21 J22 K15 K17 K21 L14 L16 L19 L21 N14 N16 N19 N21

A11 A16 A19 A29 A3 A30 A4 AA13 AA14 AA16 AA18 AA2 AA22 AA25 AA26 AA29 AA8 AB19 AB21 AB28 AB29 AB30 AC10 AC11 AC19 AC2 AC21 AC28 AC30 AD26 AD5 AE1 AE11 AE13 AE15 AE17 AE22 AE31 AF11 AF17 AF21 AF24 AF28 AG10 AG3 AH18 AH23 AH28 AH4 AH6 AH8 AJ1 AJ16 AJ31 AK1 AK2 AK23 AK30 AK31 AL13 AL19 AL2 AL23 AL29 AL3 AL30 AL9 B13 B16 B19 B22 B30 B31 B5 B9 C1 C12 C21 C22 C25 C31 D22 E1 E10 E19 E21 E25 E8 F17 F19

1

2

2

C241 1U_0603_10V6K

+VCC_DMI 1 1 1U_0603_10V6K C68 C237 1U_0603_10V6K 2 2

1 Core analog supply current: 0.08A C391 2 0.01U_0402_16V7K

D4 B4 B3

Legacy I/O supply current: 0.42A

VCCD_AB_DPL

B

+1.8VS

V11 AC31

VCCALVDS VCCDLVDS

2

+VCC_CRT_DAC T30

DAC & GIO & LGI supply current: 0.19A +RING_EAST +RING_WEST

+VCCP

T31 J31 C3 B2 C2 A21

VCCACRTDAC

VCC_GIO VCCRING_EAST VCCRING_WEST VCCRING_WEST VCCRING_WEST VCC_LGI

VCCA_DMI VCCA_DMI VCCA_DMI RSVD VCCSFR_DMIHMPLL VCCP

P2 AA1

DMI analog & PLL supply current: 0.54A

+DMI_HMPLL

2

+DMI_HMPLL

1 R18 2 0_0603_5%

T56

1

Display PLL & DMIHMPLL supply current: 0.18A

E2

+VCCP 1

2

C1162

2

R26 1 100NH +-5% LL1608-FSLR10J

0.1U_0402_10V6K

C239 10U_0805_10V4Z

C69 1U_0603_10V6K

2 1

1

1

1

1

1

Modify to 2.2U 05/11

2

2

2

2

2

2

2

1

2

Close Chipset pin

VSS

F24 F28 F4 G15 G17 G22 G27 G31 H11 H15 H2 H21 H25 H8 J11 J13 J15 J4 K11 K13 K19 K26 K27 K28 K30 K4 K8 L1 L13 L18 L22 L24 L25 L29 M28 M3 N1 N13 N18 N24 N25 N28 N4 N5 N8 P13 P14 P16 P18 P19 P21 P3 P4 R25 R7 R8 T11 U22 U23 U24 U27 V14 V16 V18 V28 V29 W13 W2 W23 W25 W26 W28 W30 W4 W5 W6 W7 Y28 Y3 Y4

D

C

B

T29

6 OF 6 PINEVIEW-M_FCBGA8559

Follow Intel check list change to 22uF 06/06 R27 1 2 0_0603_5%

1

del C1218 2010/04/14

2

Add C1217 2010/03/25

C235 1U_0603_10V6K

Compal Electronics, Inc.

Compal Secret Data

Security Classification 2006/08/18

Issued Date

A

+VCC_DLVD 1

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

C1155 1U_0603_10V6K

C1217

2

VSS VSS VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS VSS VSS VSS VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS VSS VSS VSS RSVD_NCTF VSS RSVD_NCTF VSS VSS VSS VSS VSS VSS VSS

1

C56

0.1U_0402_10V6K

1

C400 10U_0603_6.3V6M

1

1U_0402_6.3V6K

C77

1U_0402_6.3V6K

C78

1U_0402_6.3V6K

C75

1U_0402_6.3V6K

C76

1U_0402_6.3V6K

C70

1U_0402_6.3V6K

1

C71

1U_0402_6.3V6K

2

C81

REV = 1.1

+VCC_ALVD

2 H1.25 2 22UF 6.3V M X5R 0805

C74

2.2U_0603_10V6K

+VCC_DMI

T1 T2 T3

5 OF 6 PINEVIEW-M_FCBGA8559

+0.89V

+1.8VS

CRT DAC & LVDS supply current: 0.15A R25 +VCC_CRT_DAC 1 2 MBK1608601YZF_2P 1

LGI &DPLL supply current: 0.06A

A

+VCC_ALVD +VCC_DLVD

V30 W31

LVDS

2

VCCSFR_AB_DPL

DMI

+3VS

C189 1 1U_0603_10V6K

1U_0603_10V6K

C192 1

EXP\CRT\PLL

R321 2 1 0_0603_5%

VCCD_HMPLL

N475@

PINEVIEW_M

GND

5

4

3

2

Title

Pineview(3/3) Size Document Number Custom Date:

Rev 0.1

LA-6421P

Tuesday, June 22, 2010

Sheet 1

6

of

39

5

4

3

2

1

+1.5V

+1.5V (4) DDR_A_DQS#[0..7] (4) DDR_A_D[0..63] JDIM1

+DDR_VREF_DQ

2010/01/18 DDR3 modify

DDR_A_D0 DDR_A_D1

2.2U_0402_6.3VM

1

1

1 1

2 1

C

2

C Q39

Q38

2 B

MMBT3904_SOT23

@

DDR_A_D16 DDR_A_D17 DDR_A_DQS#2 DDR_A_DQS2

R1418 0_0402_5%

2 B

3

3

E

1K_0402_1%

C1191

2

0_0402_5%

1U_0402_6.3V4Z

(13,17) PM_SLP_S4#

@

DDR_A_DQS#1 DDR_A_DQS1 DDR_A_D10 DDR_A_D11

R1417

1K_0402_1%

R1421

DDR_A_D8 DDR_A_D9

2

2 R1416

1

DDR_A_D2 DDR_A_D3

2

1

C1192

DRAM_PWROK (4)

DRAM_PWROK

2

DDR_A_DM0

2

1

2

R1415 10K_0402_5%

C111 1 0.1U_0402_16V4Z

D

0.1U_0402_10V7K 1

1

C112

+1.5V

+5VALW

DDR_A_D18 DDR_A_D19 +1.5V_PG

DDR_A_D24 DDR_A_D25

+1.5V_PG (34)

E

DDR_A_DM3

MMBT3904_SOT23

DDR_A_D26 DDR_A_D27

R1422 1

(17,29,34) SYSON

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71

2

VREF_DQ VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS1 VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS22 DM3 VSS23 DQ26 DQ27 VSS25

VSS1 DQ4 DQ5 VSS3 DQS#0 DQS0 VSS6 DQ6 DQ7 VSS8 DQ12 DQ13 VSS10 DM1 RESET# VSS12 DQ14 DQ15 VSS14 DQ20 DQ21 VSS16 DM2 VSS17 DQ22 DQ23 VSS19 DQ28 DQ29 VSS21 DQS#3 DQS3 VSS24 DQ30 DQ31 VSS26

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

(4) DDR_A_DM[0..7] DDR_A_D4 DDR_A_D5

(4) DDR_A_DQS[0..7] (4) DDR_A_MA[0..14]

DDR_A_DQS#0 DDR_A_DQS0 DDR_A_D6 DDR_A_D7

D

DDR_A_D12 DDR_A_D13 DDR_A_DM1 DRAMRST#

DRAMRST# (4)

DDR_A_D14 DDR_A_D15 DDR_A_D20 DDR_A_D21 DDR_A_DM2 DDR_A_D22 DDR_A_D23 DDR_A_D28 DDR_A_D29 DDR_A_DQS#3 DDR_A_DQS3 DDR_A_D30 DDR_A_D31

1K_0402_1% (4)

DDR_CKE0

DDR_CKE0

DDR_A_BS2

DDR_A_BS2

C

(4)

DDR_A_MA12 DDR_A_MA9 DDR_A_MA8 DDR_A_MA5 DDR_A_MA3 DDR_A_MA1

Layout Note: Place near JDIMM1

+1.5V

1

(4) DDR_A_BS0

DDR_A_MA10 DDR_A_BS0

(4) DDR_A_WE# (4) DDR_A_CAS#

DDR_A_WE# DDR_A_CAS#

(4)

DDR_A_MA13 DDR_CS#1

DDR_CS#1

C1197

2

C1196

2

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C107

C108

2

1

0.1U_0402_16V4Z

C105

2

1

0.1U_0402_16V4Z

C106

C1195

2

1

0.1U_0402_16V4Z

1

0.1U_0402_16V4Z

2

C130

C109

2

1

2.2U_0603_6.3V6K~D

1

2.2U_0603_6.3V6K~D

2

C110

2

1

2.2U_0603_6.3V6K~D

1 C129

C128

2

2.2U_0603_6.3V6K~D

1

2.2U_0603_6.3V6K~D

2

2.2U_0603_6.3V6K~D

+ C1194

330U 2.5V Y

1

M_CLK_DDR0 M_CLK_DDR#0

(4) M_CLK_DDR0 (4) M_CLK_DDR#0

DDR_A_D32 DDR_A_D33

2

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D40 DDR_A_D41 DDR_A_DM5 +1.5V R1424

R1425

C115

1

1K_0402_1%

2

DDR_A_D50 DDR_A_D51

Layout Note: Place near JDIMM1.1

DDR_A_D56 DDR_A_D57 DDR_A_DM7

Change C116,C141 to SE076104K80 2010/04/06

+1.5V +3VS C116

+DDR_VREF_CA

1 2 1K_0402_1% 2

1

R1427

C117

1

1K_0402_1%

4

0.1U_0402_16V4Z

2

5

2 10K_0402_5%

1

1

2

Layout Note: Place near JDIMM1.126

1

2

205

G1

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

G2

206

DDR_CKE1

2006/08/18

C

DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 M_CLK_DDR1 M_CLK_DDR#1

M_CLK_DDR1 (4) M_CLK_DDR#1 (4)

DDR_A_BS1 DDR_A_RAS#

DDR_A_BS1 (4) DDR_A_RAS# (4)

DDR_CS#0 M_ODT0

DDR_CS#0 (4) M_ODT0 (4)

M_ODT1

M_ODT1

(4) +DDR_VREF_CA

DDR_A_D36 DDR_A_D37 DDR_A_DM4 C1199 1

DDR_A_D38 DDR_A_D39 DDR_A_D44 DDR_A_D45 DDR_A_DQS#5 DDR_A_DQS5

1 C1198

2

2

B

DDR_A_D46 DDR_A_D47 DDR_A_D52 DDR_A_D53 DDR_A_DM6 DDR_A_D54 DDR_A_D55 DDR_A_D60 DDR_A_D61 DDR_A_DQS#7 DDR_A_DQS7 DDR_A_D62 DDR_A_D63 PM_EXTTS#0 CLK_SMBDATA CLK_SMBCLK

FOX_AS0A626-U4RN-7F

PM_EXTTS#0 (5) CLK_SMBDATA (8,15,27) CLK_SMBCLK (8,15,27)

+0.75VS

A

DIMM_A(REV) 4H Compal Electronics, Inc.

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 3

DDR_CKE1 (4)

DDR_A_MA14

Compal Secret Data

Security Classification Issued Date

R66 10K_0402_5% 2 1

R1426 A

DDR_A_D58 DDR_A_D59 R65

.1U_0402_16V7K

1

C1204

2

0.1U_0402_16V4Z C1203

2

0.1U_0402_16V4Z C1202

0.1U_0402_16V4Z C1201

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

1

DDR_A_DQS#6 DDR_A_DQS6

1

2

+0.75VS

1

DDR_A_D48 DDR_A_D49

+DDR_VREF_DQ

1 2 1K_0402_1%

.1U_0402_16V7K C141

Layout Note: Place near JDIMM1.203 & JDIMM1.204

DDR_A_D42 DDR_A_D43

CKE1 VDD2 A15 A14 VDD4 A11 A7 VDD6 A6 A4 VDD8 A2 A0 VDD10 CK1 CK1# VDD12 BA1 RAS# VDD14 S0# ODT0 VDD16 ODT1 NC2 VDD18 VREF_CA VSS28 DQ36 DQ37 VSS30 DM4 VSS31 DQ38 DQ39 VSS33 DQ44 DQ45 VSS35 DQS#5 DQS5 VSS38 DQ46 DQ47 VSS40 DQ52 DQ53 VSS42 DM6 VSS43 DQ54 DQ55 VSS45 DQ60 DQ61 VSS47 DQS#7 DQS7 VSS50 DQ62 DQ63 VSS52 EVENT# SDA SCL VTT2

2.2U_0402_6.3VM

DDR_A_D34 DDR_A_D35

CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1

0.1U_0402_16V4Z

B

73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

2

Title

DDR3-SODIMMA Size B Date:

Document Number

Rev 0.1

LA-6421P Tuesday, June 22, 2010

Sheet 1

7

of

39

5

4

3

2

1

Change C174 C175 to 10U_0603 05/14

FSB

FSA

CLKSEL2

CLKSEL1

CLKSEL0

CPU MHz

SRC MHz

PCI MHz

REF MHz

DOT_96 USB MHz MHz

R137 1 2 0_0603_5%

+3VS

C1145

0

0

0

266

100

33.3

14.318

96.0

48.0

0

0

1

133

100

33.3

14.318

96.0

48.0

0

1

0

200

100

33.3

14.318

96.0

48.0

+3VS

1

1

47P_0402_50V8J 2

1

C174

1

C172

10U_0603_6.3V6M 0.1U_0402_16V4Z 2 2

C138

2 0.1U_0402_16V4Z

1

2

C148

R72

0.1U_0402_16V4Z

+1.05VM_CK505

0

1

1

166

100

33.3

14.318

96.0

C1146

48.0

1

1 1

D

1

0

0

333

100

33.3

14.318

96.0

47P_0402_50V8J 2

48.0

1

0

1

100

100

33.3

14.318

96.0

48.0

1

1

0

400

100

33.3

14.318

96.0

48.0

1

1

1

0.1U_0402_16V4Z 2 10U_0603_6.3V6M 2

1 R1348

@

+3VM_CK505

1 R1349

+1.5VS

1

1

CLK_EN

55 0.1U_0402_16V4Z 1 1 C140 C160

47P_0402_50V8J

1 C1119

6 1 C169

12

1

C1147

2

Q31

10U_0603_6.3V6M 2

0.1U_0402_16V4Z 2 2

0.1U_0402_16V4Z 2

72 19

2

27 DTC115EUA_SC70-3

R1350 1

3

+VCCP

0_0402_5% @ 2

R1351 1

+1.5VS +VCCP

+1.05VM_CK505

66

0_0402_5% 2

1

1

Change C1350 C1351 to 0402 type 06/24

2

CPU_BSEL0

1 2 R69 0_0402_5%

del C1219 R1442 04/14

2

1 C1221

0.1U_0402_16V4Z

(13) CLK_PCH_14M

1 C390

1K_0402_5% @

(5,13,17,36)

SCL VDD_PCI

CPU_0

VDD_CPU

CPU_0#

VDD_48

CPU_1

VDD_PLL3

CPU_1#

LCDCLK/27M VDD_SRC_IO LCDCLK#/27M_SS VDD_SRC_IO

SRC_2 SRC_2#

2 7 8

CLK_EN

1 2 R371 0_0402_5%

1 11

1

53

(13) H_STP_CPU#

R86 @

(13)

R113

USB_0/FS_A SRC_3 FS_B/TEST_MODE

54

H_STP_PCI#

SRC_3# REF_1

SRC_4 SRC_4#

TPM@ 1 R1443

2 2

(27) CLK_PCI_TPM

1

2

: : : :

DOT96 / DOT96# LCDCLK / LCDCLK# SRC_0 / SRC_0# 27M/27M_SS

1

2

10P_0402_50V8J

1 1 2 R84 0_0402_5%

For PCI4_SEL, 0 = Pin24/25 Pin28/29 1 = Pin24/25 Pin28/29

470_0402_5%

4

1 1

R86 R80

PCI2_TME

14

2 22_0402_5% 2 33_0402_5% 2 33_0402_5%

15 PCI4_SEL

16

ITP_EN

17

NC

SRC_6

2

3 22 26 69 30

R87

34

CLK_XTAL_IN 33P 50V J NPO 0402 Y1

2

R85

R95

R71

10K_0402_5% @

10K_0402_5% @

10K_0402_5%

ITP_EN

PCI4_SEL

73

CLK_SMBCLK

71

CLK_CPU_BCLK

70

CLK_CPU_BCLK#

68

CLK_CPU_HPLCLK

67

CLK_CPU_HPLCLK#

24

CLK_CPU_DREFCLK

25

CLK_CPU_DREFCLK#

28

CPU_SSCDREFCLK

29

CPU_SSCDREFCLK#

CLK_SMBDATA (7,15,27)

SRC PORT LIST

CLK_SMBCLK (7,15,27) CLK_CPU_BCLK

(5)

CLK_CPU_BCLK#

PORT SRC1 SRC2 SRC3 SRC4 SRC6 SRC7 SRC8 SRC9 SRC10 SRC11

(5)

CLK_CPU_HPLCLK# CPU_DREFCLK

(5)

(5)

CPU_DREFCLK#

DEVICE

(5)

CLK_CPU_HPLCLK

(5)

CPU_SSCDREFCLK

(5)

CPU_SSCDREFCLK#

(5)

32 33

CPU_SSCDREFCLK C

PCIE_WLAN PCIE_SATA PCIE_PCH CPU_ITP CLK_CPU_EXP PCIE_LAN PCIE_WWAN

35 36 39

CLK_PCIE_WLAN

40

CLK_PCIE_WLAN#

57

CLK_PCIE_SATA

56

CLK_PCIE_SATA#

61

CLK_PCIE_PCH

60

CLK_PCIE_PCH#

CLK_PCIE_WLAN

(26)

CLK_PCIE_WLAN#

(26)

PCI_STOP# XTAL_IN SRC_8/CPU_ITP XTAL_OUT

PCI_1

SRC_9

PCI_2

SRC_9#

PCI_3 SRC_10 PCI_4/SEL_LCDCL SRC_10#

CLK_PCIE_SATA (12) CLK_PCIE_SATA# CLK_PCIE_PCH CLK_PCIE_PCH#

64

CPU_ITP

63

CPU_ITP# (4)

44

CLK_CPU_EXP

45

CLK_CPU_EXP#

50

CLK_PCIE_LAN

51

CLK_PCIE_LAN#

48

CLK_PCIE_WWAN

47

CLK_PCIE_WWAN#

(12)

Modify CLK SRC Port list 05/12

(13) (13)

B

(4) +3VS

CLK_CPU_EXP (4)

Add R107 05/04

CLK_CPU_EXP# (4) CLK_PCIE_LAN

(25)

CLK_PCIE_LAN#

(25)

WLAN_CLKREQ#

R121 2

1 10K_0402_5%

LAN_CLKREQ#

R1430 2

1 4.7K_0402_5%

WWAN_CLKREQ#

R107 2

1 10K_0402_5%

PCIF_5/ITP_EN

VSS_PCI

SRC_11#

CLK_PCIE_WWAN

REQ PORT LIST

(15)

CLK_PCIE_WWAN#

(15)

PORT

VSS_REF CLKREQ_3#

37

VSS_IO

CLKREQ_4#

41

VSS_CPU

CLKREQ_6#

VSS_PLL3

CLKREQ_7#

VSS_SRC

CLKREQ_9#

VSS_SRC

SLKREQ_10#

VSS_SRC

CLKREQ_11#

VSS_48

VSS

USB_1/CLKREQ_A#

Add WWAN_CLKREQ# WLAN_CLKREQ#

WLAN_CLKREQ#

(26)

58 65 43 49

LAN_CLKREQ#

46

WWAN_CLKREQ#

LAN_CLKREQ#

(25)

WWAN_CLKREQ#

DEVICE

REQ_3# REQ_4# PCIE_WLAN REQ_6# REQ_7# REQ_9# REQ_10# PCIE_WWAN REQ_11# REQ_A#

05/04

(15)

21

A

SLG8SP556VTR_QFN72_10X10 PCI2_TME

2 R90

@ R77

10K_0402_5%

10K_0402_5%

10K_0402_5%

Issued Date

2007/10/15

Deciphered Date

2008/10/15

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Routing the trace at least 10mil 4

Compal Electronics, Inc.

Compal Secret Data

Security Classification

1

R89

1

33P 50V J NPO 0402

2

2 CLK_XTAL_OUT

1

2

14.31818MHZ L5020-14.31818-20 C164

42

CLK_SMBDATA

10

1

C161

59

1

1

Follow Intel check list change to 27P 06/05 Follow Vendor check change to 22P 10/16 Follow Vendor check change to 33P 05/24

+3VS

2

+3VS

2

2

+3VS

1

0_0402_5%

5

SRC_7

SRC_11 18

@

A

CPU_STOP#

C388

For PCI2_TME:0=Overclocking of CPU and SRC allowed (ICS only) 1=Overclocking of CPU and SRC NOT allowed

1

CPU_BSEL2

R98 10K_0402_5% 2 1

C389

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP# R92 @

15P 50V J NPO 0402

(11) CLK_PCI_PCH

+VCCP

(5)

5

CLK_XTAL_OUT

13

Add R1443 for TPM 2010/03/25

(17) CLK_PCI_LPC

FSC

CLK_XTAL_IN

9

CKPWRGD/PD#

SRC_7#

TPM@

R110 @ 0_0402_5%

CLK_SMBCLK

D

3

REF_0/FS_C/TEST_

SRC_8#/CPU_ITP#

1 2 R119 0_0402_5%

4

+3VS

0.1U_0402_16V4Z

VDD_IO

SRC_6#

1

CPU_BSEL1

C165

VDD_REF

VDD_SRC_IO

20

FSC

VGATE

SDA VDD_SRC

62

23

2 10P_0402_50V8J

470_0402_5%

(5)

2

Change Q10 to SB00000DH00 2010/04/06

SRC_0#/DOT_96#

@

R52 1K_0402_1% FSB 1 2

0.1U_0402_16V4Z

(13) ICH_SMBCLK

+VCCP

B

1

C146

VDD_PLL3_IO

0.1U_0402_16V4Z

1 R104 2 33_0402_5%

R73

Add 1K follow Intel check list 05/11

2

31

52

2 10P_0402_50V8J FSA 1 2 R75 33_0402_5% FSB

(13) CLK_PCH_48M

2

1

C137

SRC_0/DOT_96

38

1

(5)

2

VDD_CPU_IO

C173

R68 @ 470_0402_5%

1

U4

+1.5VM_CK505

2 0_0603_5%

10K_0402_5%

R76 2.2K_0402_5% FSA 2 1

0.1U_0402_16V4Z

CLK_SMBDATA

Realtek: SA00003H730

2 0_0603_5%

2 R435

Rename 06/06

C167

IDT: SA00003H610 Change co-lay net name to +1.5VM_CK505 07/03

C

2

1

Q10B 2N7002DW-T/R7_SOT363-6

Reserved

+3VS

(36) CLK_ENABLE#

1

C139

C175

Add C1145 C1146 C1147 for EMI 06/12

+3VS

6

(13) ICH_SMBDATA

2.2K_0402_5%

2

R138 1 2 0_0603_5%

+VCCP

R91

2.2K_0402_5% 2N7002DW-T/R7_SOT363-6 Q10A

5

FSC

+3VM_CK505

3

2

Title

Clock Generator CK505 Size

Document Number

Rev 0.1

LA-6421P Date:

Thursday, June 03, 2010

Sheet 1

8

of

39

5

4

3

2

1

LCD POWER CIRCUIT Change R577 to 0402 SIZE 06/16

J1 +LCDVDD Q3

2

C1108

100K_0402_5% 1

Q4

1

R578

2

0.047U_0402_16V4Z

D

2 G

2N7002W-T/R7_SOT323-3

2

1

2 G

C1106 1 4.7U_0603_6.3V6K

1 +LCDVDD_R

2

2

C1105 1 0.1U_0402_16V4Z

2

3

+CAM_VCC

2

D

1

1

C1107 4.7U_0603_6.3V6K

C1113 0.1U_0402_16V4Z

2

2

PJUSB208_SOT23-6

R579 4.7K_0402_5%

S

2

@

470_0402_5%

1

JUMP_43X39 @

W=20mils

3

S

1

D

1

W=20mils +3VS

R577 D

1

+3VS

+3VS

NTR4101PT1G 1P SOT-23-3

+LCDVDD

Change C1106 to 4.7U_0603

USB20_N3_1

05/14

1

+CAM_VCC

6

CH3

5

Vp

4

CH4

CH2

3

Vn

2

CH1

1

Q5 DTC115EUA_SC70-3

USB20_P3_1

D6 @

2

Add D6

05/14

2

(5) GMCH_ENVDD

C

1

C

3

R174 100K_0402_5%

2 0_0402_5%

Modify 05/11

1 R1182 @

USB20_N3_1

2

USB20_P3_1

3 1

+3VS

MIC@ 1 R1444

JLVDS1 2 CMIC@ 1 R1445

camera

LVDS_ACLK LVDS_ACLK#

2

4

1

WCM2012F2S-900T04_0805

2

0_0402_5%

USB20_N3

4

USB20_P3

USB20_N3 (13) USB20_P3 (13)

2

2

1 R1183

LVDS_SCL (5)

LVDS_SDA

B

LVDS_SDA (5)

LVDS_ACLK (5) LVDS_ACLK# (5)

LVDS_A2 LVDS_A2#

LVDS_A2 (5) LVDS_A2# (5)

LVDS_A1 LVDS_A1#

INVT_PWM

LVDS_A1 (5) LVDS_A1# (5)

LVDS_A0 LVDS_A0#

BKOFF#

C1156 220P_0402_50V7K 3G@

BKOFF# (17) INVT_PWM (5,17)

1

LVDS_A0 (5) LVDS_A0# (5)

LVDS_SDA LVDS_SCL BKOFF# INVT_PWM +LCDVDD_L

3

1

Add for RF 07/02

LVDS_SCL

+CAM_VCC DMIC_CLK (22) DMIC_DATA (22)

C1109 1000P 50V K X7R 0402 3G@

For RF

+3VS

1 2 L2 FBMA-L11-201209-221LMA30T_0805

+LEDVDD

+LCDVDD L1 2

2

ACES_88341-3000B001 CONN@

+3VS

2

B

0_0402_5% USB20_P3_1 USB20_N3_1

1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 3628 3329 3230

2

2

1

Add R1444 R1445 2010/03/25 0_0402_5%

R1181 2.2K_0402_5%

R1180 2.2K_0402_5% 1 2

Modify JLVDS1 08/04

1

C1168

10P_0402_50V8J @

CMOS & LCD/PANEL BD. Conn.

10P_0402_50V8J @

C1167

L3

2

1

(20 MIL) 1

B+

FBMA-L11-201209-221LMA30T_0805 1 C1111 330P_0402_50V7K 3G@

2

C1112 100P_0402_50V8J 3G@

A

A

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5

4

3

2

Title

LVDS /INVERTER Size B Date:

Document Number

Rev 0.1

LA-6421P Friday, June 25, 2010

Sheet 1

9

of

39

A

B

C

D

E

D18

2

3

2

3

Close to CRT CONN for ESD.

D17 @

@

1

Change L12. L14, L15 to SM01000C600 2010/04/06

L15 1

(5) GMCH_CRT_R

L14 (5) GMCH_CRT_G

1

(5) GMCH_CRT_B

1

1 C308

2

CHENG-HANN MBK1005470YZF 0402 2

GREEN

CHENG-HANN MBK1005470YZF 0402 2

BLUE

1

C303 2

1

C307 10P_0402_50V8J 2

2

C306 10P_0402_50V8J 2

1 C304 10P_0402_50V8J

2

JVGA_HS

2 0.1U_0402_16V4Z 1

P 2

2

U11 CRT_HSYNC_1

4

Y

3

G

A

OE#

5

JVGA_VS

2

(5) GMCH_CRT_HSYNC

RED

CHENG-HANN MBK1005470YZF 0402 2

1 10P_0402_50V8J

+5VS 1 C301

1 10P_0402_50V8J

C310

10P_0402_50V8J

R250

150_0402_1% 2 1

R253

150_0402_1% 2 1

R255

150_0402_1% 2 1

L12

1

1

1

PJDLC05C_SOT23-3

0615

PJDLC05C_SOT23-3

Modify C31- C308 C303 C307 C306 C304 BOM Structure

SN74AHCT1G125DCKR_SC70-5

+3VS

CRT_VSYNC_1

4

1

(13)

3

1

Y

G

A

High: CRT Plugged CRT_DET

CRT_DET

SN74AHCT1G125DCKR_SC70-5 CRT_DET#

1

2

(5) GMCH_CRT_VSYNC

R149 10K_0402_5% @

U10

D

3

P

5

2 0.1U_0402_16V4Z

OE#

1 C298

2

+5VS

S

2 G

Q11 2N7002W-T/R7_SOT323-3 @

CRT PORT +CRT_VCC

12/29

+5VS

0.1U_0402_16V4Z

3

D3 2

+3VS

W=40mils 1

RB491D_SC59-3

2

1

JCRT1 6 11 1 7 12 2 8 13 3 9 14 4 10 15 5

1

1

RED 2.2K_0402_5%

R248

VGA_DDC_DAT GREEN 1

2

2

1

+3VS R245 R246

R251

JVGA_HS BLUE

2.2K_0402_5%

JVGA_VS

2

5

2

2.2K_0402_5%

VGA_DDC_CLK 4 2

(5) GMCH_CRT_DATA

(5) GMCH_CRT_CLK

1

3

Change JCRT1 P/N to SP010906182 06/22

2

1.1A_6VDC_FUSE

+CRT_VCC

2.2K_0402_5%

3

C142

F1 1

VGA_DDC_DAT

CONN@

16 17

SUYIN_070546FR015M21RZR

Q24B 2N7002DW-T/R7_SOT363-6 VGA_DDC_CLK 6

CRT_DET# 2

Q24A 2N7002DW-T/R7_SOT363-6

R1103 100K_0402_5%

Change Q24 to SB00000DH00 2010/04/06

4

1

4

+CRT_VCC

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A

B

C

D

Title

CRT PORT Size B Date:

Document Number

Rev 0.1

LA-6421P Tuesday, June 22, 2010

Sheet E

10

of

39

5

4

3

2

1

D

1

D

CLK_PCI_PCH R336 33_0402_5%

@

+3VS

TGP

U72A

2

1

@

2

C432 22P_0402_50V8J

8.2K_0402_5%

R233

8.2K_0402_5%

R235

8.2K_0402_5% 8.2K_0402_5% 8.2K_0402_5% 8.2K_0402_5% 8.2K_0402_5% 8.2K_0402_5%

R236 R229 R207 R231 R230 R237

(8) CLK_PCI_PCH

For EMI, close to TigerPoint

PCI_DEVSEL# CLK_PCI_PCH PCI_IRDY# PCI_SERR# PCI_STOP# PCI_PLOCK# PCI_TRDY# PCI_PERR# PCI_FRAME#

A5 B15 J12 A23 B7 C22 B11 F14 A8 A10 D10 A16

PAR DEVSEL# PCICLK PCIRST# IRDY# PME# SERR# STOP# PLOCK# TRDY# PERR# FRAME#

A18 E16

GNT1# GNT2#

G16 A20

REQ1# REQ2#

G14 A2 C15 C9

GPIO48/STRAP1# GPIO17/STRAP2# GPIO22 GPIO1

B2 D7 B3 H10 E8 D6 H8 F8

PIRQA# PIRQB# PIRQC# PIRQD# PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

D11 K9 M13

STRAP0# RSVD01 RSVD02

C

8.2K_0402_5% 8.2K_0402_5%

(27) G_SENSOR_INT

R232 R209

PCI_PIRQE# R362 10K_0402_5% @

Add for G-sensor interrupt 2010/03/11

B

10K_0402_5% 10K_0402_5%

R291 R292

R363 10K_0402_5% @ 8.2K_0402_5% 8.2K_0402_5% 8.2K_0402_5% 8.2K_0402_5% 8.2K_0402_5% 8.2K_0402_5% 8.2K_0402_5% 8.2K_0402_5%

R238 R205 R206 R208 R210 R211 R212 R204

8.2K_0402_5% 8.2K_0402_5%

R364 R365

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

A

STRAP1# GPIO48

B22 D18 C17 C18 B17 C19 B18 B19 D16 D15 A13 E14 H14 L14 J14 E10 C11 E12 B9 B13 L12 B8 A3 B5 A6 G12 H12 C8 D9 C7 C1 B1

C/BE0# C/BE1# C/BE2# C/BE3#

H16 M15 C13 L16

C

1

R366 10K_0402_5% @

STRAP2# GPIO17

PCI

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

B

TIGERPOINT_ES1_BGA360

Boot BIOS

0

1

SPI

1

0

PCI

1

1

LPC

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification 2006/08/18

Issued Date

Deciphered Date

2007/8/18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5

4

3

2

Title

Tigerpoint(1/4) Size

Document Number

Rev 0.1

LA-6421P Date:

Thursday, June 03, 2010

Sheet 1

11

of

39

5

4

3

2

1

D

D

TGP

U72C

AA14 V14 AD16 AB11 AB10

+3VS B

R294 8.2K_0402_5%

AD23

SATA_ITX_C_DRX_N0_R SATA_ITX_C_DRX_P0_R

Del

SATA_DTX_C_IRX_N0 (16) SATA_DTX_C_IRX_P0 (16) 0.01U_0402_16V7K C32 0.01U_0402_16V7K C31

SATA_ITX_C_DRX_N0 (16) SATA_ITX_C_DRX_P0 (16)

C

SATA1 04/30

SATA_CLKN SATA_CLKP

RSVD19 RSVD20 RSVD21 RSVD22 RSVD23

SATARBIAS# SATARBIAS SATALED#

AD4 AC4

CLK_PCIE_SATA# (8) CLK_PCIE_SATA (8)

AD11 AC11 AD25

Placed within 500 mils of Tiger point chipset pin. +3VS R45

SATARBIAS R154 24.9_0402_1% SATA_LED# SATA_LED# (16)

SATA_LED# 10K_0402_5%

RSVD24 RSVD25 RSVD26

R293

GATEA20

10K_0402_5%

RSVD27 RSVD28 RSVD29 RSVD30 RSVD31 GPIO36

A20GATE A20M# CPUSLP# IGNNE# INIT3_3V# INIT# INTR FERR# NMI RCIN# SERIRQ SMI# STPCLK# THRMTRIP#

U16 Y20 Y21 Y18 AD21 AC25 AB24 Y22 T17 AC21 AA16 AA21 V18 AA20

GATEA20 H_A20M# H_IGNNE# H_INIT# H_INTR H_FERR# H_NMI KB_RST# SERIRQ H_SMI# H_STPCLK#

R312

SERIRQ

GATEA20 (17) H_A20M# (5)

10K_0402_5%

H_IGNNE# (5)

+VCCP

H_INIT# (5) H_INTR (5) H_FERR# (5) H_NMI (5) KB_RST# (17) SERIRQ (17,27) H_SMI# (5) H_STPCLK# (5)

1

AB16 AE24 AE23

AE6 AD6 AC7 AD7 AE8 AD8 AD9 AC9

R164 56_0402_5%

56 ohm±5% pull-up resistor has to be within 1" from the Tiger Point chipset.

B

2

AC17 AB13 AC13 AB15 Y14

SATA0RXN SATA0RXP SATA0TXN SATA0TXP SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA

C

RSVD03 RSVD04 RSVD05 RSVD06 RSVD07 RSVD08 RSVD09 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18

HOST

R12 AE20 AD17 AC15 AD18 Y12 AA10 AA12 Y10 AD15 W10 V12 AE21 AE18 AD19 U12

H_THERMTRIP# (5)

3

ESD request

TIGERPOINT_ES1_BGA360

C450 @ 1

2 100P_0402_50V8J

H_IGNNE# C451 @ 1

2 100P_0402_50V8J

H_INIT#

C452 @ 1

2 100P_0402_50V8J

H_INTR

C453 @ 1

2 100P_0402_50V8J

H_FERR# C454 @ 1

2 100P_0402_50V8J

C455 @ 1

2 100P_0402_50V8J

C456 @ 1

2 100P_0402_50V8J

H_STPCLK# C457 @ 1

2 100P_0402_50V8J

H_A20M#

+VCCP

R198 56_0402_5%

H_NMI H_SMI#

H_FERR#

Close to TigerPoint pin

A

A

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5

4

3

2

Title

Tigerpoint(2/4) Size Document Number Custom Date:

Rev 0.1

LA-6421P

Thursday, June 03, 2010

Sheet 1

12

of

39

5

4

3

2

1

USB Port List PCIE

Port List

1 2

LAN WLAN WWAN

3 4

D

0 1 2 3 4 5 6 7

USB Left1 USB Left2 USB Right2 CMOS CardReader WWAN BT WIMAX

11/26

R2 T1 M8 P9 R4

SMBALERT#/GPIO11 SMBCLK SMBDATA LINKALERT# SMLINK0 SMLINK1 SPI_MISO SPI_MOSI SPI_CS# SPI_CLK SPI_ARB

EC_THERM# VGATE MCH_SYNC# PBTN_OUT# ICH_RI#

SLP_S3# SLP_S4# SLP_S5# BATLOW# DPRSTP# DPSLP# RSVD31

2 ICH_PCIE_WAKE# 1 SYS_RST#

R314

GPIO12

8.2K_0402_5%

R315

GPIO14

R316

GPIO15

R301

SMBALERT#

8.2K_0402_5% 8.2K_0402_5%

1

R37 1 R38 1

T_PWROK EC_RSMRST#R

GPIO38 +3VS

EC_LID_OUT#

10K_0402_5% 2 8.2K_0402_5% 8.2K_0402_5% 8.2K_0402_5%

R295 R300

1

EC_THERM#

10K_0402_5% 2

R241 1 PM_CLKRUN#

D37

OSC

1

NC

OSC

4

1U_0603_10V6K

Change C230 to SE080105K80 04/06 5

32.768KHZ_12.5PF_Q13MC14610002

R288 10M_0402_5% 2 1

NC

3

2

1

2

4

EC_RSMRST#R

USB

@ MMBT3906_SOT23-3 1 2 +3VALW R373 @ 4.7K_0402_5%

D28B @ D28A BAV99DW-7_SOT363

@

charge@ C1148 0.1U_0402_16V4Z

1

R375

A

2

@ 2.2K_0402_5%

Add +RTCVCC circuit 06/12

Issued Date RTCX2

1

12P 50V J NPO 0402

R374 @ 2.2K_0402_5% +CHGRTC

2

1

1

BAV99DW-7_SOT363

+RTCVCC

Compal Electronics, Inc.

Compal Secret Data

Security Classification

C371

modify 05/14

Q30 3

(17) EC_RSMRST#

charge@

R1379 10K_0402_5% NON3G@

RTCX1

2

10K_0402_5% 10K_0402_5% 10K_0402_5%

R372 0_0402_5% 2

1

BAS40-04_SOT23-3

Routing the trace at least 10mil

2

R46 R49 R48

B

RSMRST circuit

R1370 1K_0402_5% charge@

1

12P 50V J NPO 0402 2 1

USB_OC#0_1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7

(17,32)

1 2 1 @ R222 0_0402_5% 100K_0402_5%

+3VS

GPIO0

Change Y3 to SJ132P7KW10 2010/04/06

C368

ACIN

2 R223

R1380 10K_0402_5% 3G@

C230

Change J3 to R1184 4/29

+3VALW

B

R368 R302

Y3

1

TIGERPOINT_ES1_BGA360

(5,8,17,36)

E

8.2K_0402_5%

RTCRST#

2 R1184 @1 0_0402_5%

DMI_CLKN DMI_CLKP

+RTCBATT

GPIO34 A

W23 W24

PCH_POK (5,17)

R1377 10K_0402_5% @

MCH_SYNC# GPIO7 GPIO39

1 R197 2 INTVRMEN 332K_0402_1% 1 R196 2 20K_0402_5%

VGATE

D25 RB751V_SOD323 2 1 ACIN

ACIN_C @ R1376 +3VALW 10K_0402_5%

CLK_PCH_48M (8)

R434 @ 22P_0402_50V8J 2 For EMI, Close to TigerPoint

DMI_ZCOMP DMI_IRCOMP

C

1M_0402_5% 1 R146 2 INTRUDER#

R42

CLK_PCH_48M

F4

2

VGATE

1 R311 2 0_0402_5%

10K_0402_5% 2 10K_0402_5% 2

+RTCVCC

+RTCVCC

H24 J22

+3VS

2

R36

8.2K_0402_5%

T_PWROK

TIGERPOINT_ES1_BGA360

ICH_RI#

10K_0402_5% 2

0_0402_5% 1 R310 2 @

C

1

R153 24.9_0402_1% 1 2

(8) CLK_PCIE_PCH# (8) CLK_PCIE_PCH

H_DPRSTP# (5) H_DPSLP# (5)

USB_OC#0_1 (20) USB_OC#2 (20)

USBRBIAS R152 22.6_0402_1%

+1.5VS

For ESD

2

R39 R240

G2 G3

220P_0402_50V7K SB_SPKR (19)

1

10K_0402_5% 2 8.2K_0402_5%

USBRBIAS USBRBIAS#

1 2

PM_BATT_LOW#

R145

USB_OC#0_1 USB_OC#0_1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7

2

R239

1K_0402_5% 1

D4 C5 D3 D2 E5 E6 C2 C3

(20) (20) (20) (20) (20) (20) (9) (9) (21) (21) (15) (15) (15) (15) (26) (26)

6

SMLINK1

OC0# OC1# OC2# OC3# OC4# OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 USB20_N5 USB20_P5 USB20_N6 USB20_P6 USB20_N7 USB20_P7

R338 33_0402_5% @

4

SMLINK0

1

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 USB20_N5 USB20_P5 USB20_N6 USB20_P6 USB20_N7 USB20_P7

CLK48

C1158

PM_SLP_S3# (17) PM_SLP_S4# (7,17) PM_SLP_S5# (17) PM_BATT_LOW# H_DPRSTP# H_DPSLP#

PLTRST#

5

1

R43

EC_CLK (17) PLTRST# (4,5,15,17,25,26,27) ICH_PCIE_WAKE# (15,26)

H7 H6 H3 H2 J2 J3 K6 K5 K1 K2 L2 L3 M6 M5 N1 N2

3

R44

10K_0402_5% 2 8.2K_0402_5%

SYS_RST# PLTRST# ICH_PCIE_WAKE# INTRUDER# T_PWROK EC_RSMRST#R INTVRMEN SB_SPKR

2

LINKALERT#

(15) (15)

PBTN_OUT# (17)

H20 E25 F21 B25 AB23 AA18 F20

(26) (26)

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P

1

ICH_SMBDATA

1

H_PWRGD (4,5) EC_THERM# (17)

PERN1 PERP1 PETN1 PETP1 PERN2 PERP2 PETN2 PETP2 PERN3 PERP3 PETN3 PETP3 PERN4 PERP4 PETN4 PETP4

2

ICH_SMBCLK

2

R40

2

AB17 V16 AC18 E21 H23 G22 D22 G18 G23 C25 T8 U10 AC3 AD3 J16

DMI0RXN DMI0RXP DMI0TXN DMI0TXP DMI1RXN DMI1RXP DMI1TXN DMI1TXP DMI2RXN DMI2RXP DMI2TXN DMI2TXP DMI3RXN DMI3RXP DMI3TXN DMI3TXP

1 1

2

R148

1

AB22

THRM# VRMPWRGD MCH_SYNC# PWRBTN# RI# SUS_STAT#/LPCPD# SUSCLK SYS_RESET# PLTRST# WAKE# INTRUDER# PWROK RSMRST# INTVRMEN SPKR

(25) (25)

2

R147

GPIO34 GPIO38 GPIO39

K21 K22 C565 0.1U_0402_10V7K PCIE_ITX_C_DRX_N1_RJ23 C566 0.1U_0402_10V7K PCIE_ITX_C_DRX_P1_RJ24 M18 M19 C53 0.1U_0402_10V7KPCIE_ITX_C_DRX_N2_RK24 C49 0.1U_0402_10V7K PCIE_ITX_C_DRX_P2_RK25 L23 L24 C52 0.1U_0402_10V7K PCIE_ITX_C_DRX_N3_RL22 C54 0.1U_0402_10V7K PCIE_ITX_C_DRX_P3_RM21 P17 P18 N25 N24

(25) PCIE_DTX_C_IRX_N1 (25) PCIE_DTX_C_IRX_P1 PCIE_ITX_C_DRX_N1 PCIE_ITX_C_DRX_P1 (26) PCIE_DTX_C_IRX_N2 (26) PCIE_DTX_C_IRX_P2 PCIE_ITX_C_DRX_N2 PCIE_ITX_C_DRX_P2 (15) PCIE_DTX_C_IRX_N3 (15) PCIE_DTX_C_IRX_P3 PCIE_ITX_C_DRX_N3 PCIE_ITX_C_DRX_P3

3

2.2K_0402_5% 1 2.2K_0402_5% 1 10K_0402_5% 2 10K_0402_5% 2

PM_CLKRUN#

CPUPWRGD/GPIO49

+3VALW

B

1 R367 2 1K_0402_5%

H_PWRGD

SPI

Change EC_LID_OUT# From GPIO13 to GPIO11 06/08

RTCX1 RTCX2 RTCRST#

(4) DMI_TX#0 GPIO0 (4) DMI_TX0 +3VS CRT_DET CRT_DET (10) (4) DMI_RX#0 GPIO7 SLPIOVR# (4) (4) DMI_RX0 EC_SMI# EC_SMI# (17) (4) DMI_TX#1 EC_SCI# EC_SCI# (17) (4) DMI_TX1 ACIN_C R1390 (4) DMI_RX#1 GPIO12 (4) DMI_RX1 EC_LID_OUT# 10K_0402_5% EC_LID_OUT# (17) GPIO14 GPIO15 0_0402_5% 2 R17 1 PM_DPRSLPVR (5) R1391 @ 0_0402_5% 2 1 H_STP_PCI# (8) H_STP_CPU# (8)

1

E20 H18 E23 H21 F25 F24

D

2

SMBALERT# ICH_SMBCLK ICH_SMBDATA LINKALERT# SMLINK0 SMLINK1

USB20_SIM_P (15)

TGP

U72B

R23 R24 P21 P20 T21 T20 T24 T25 T19 T18 U23 U24 V21 V20 V24 V23

PCI-E

W4 V5 T5

LAN_CLK LANR_RSTSYNC LAN_RST# LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2

SMB

(8) ICH_SMBCLK (8) ICH_SMBDATA

RTCX1 RTCX2 RTCRST#

EPROM

RTC

2

For EMI, Close to TigerPoint

EE_CS EE_DIN EE_DOUT EE_SHCLK

LAN

T4 P7 B23 AA2 AD1 AC2 W3 T7 U4

C433 22P_0402_50V8J

USB20_P7

1 R313 2 3G@ 0_0402_5%

1

2

1

@

1 R322 2 @ 0_0402_5%

2

U3 AE2 T6 V3

R337 33_0402_5%

@ C

R159 2 R157 2

HDA_BIT_CLK HDA_RST# HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDOUT HDA_SYNC CLK14

T15 W16 W14 K18 H19 M17 A24 C23 P5 E24 AB20 Y16 AB19 R3 C24 D19 D20 F22 AC19 U14 AC1 AC23 AC24

2

1 1

P6 U2 W2 V2 P8 AA1 Y1 AA3

USB20_P6

USB20_SIM_N (15)

1

33_0402_5% 33_0402_5%

2 2

1

(22,24) HDA_SDOUT_AUDIO (22,24) HDA_SYNC_AUDIO (8) CLK_PCH_14M

R160 R158

MISC

1 1

BMBUSY#/GPIO0 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO12 GPIO13 GPIO14 GPIO15 DPRSLPVR STP_PCI# STP_CPU# GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 CLKRUN# GPIO33 GPIO34 GPIO38 GPIO39

AUDIO

33_0402_5% 33_0402_5%

1 R323 2 3G@ 0_0402_5%

DMI

(17,27) LPC_FRAME# (22,24) HDA_BITCLK_AUDIO (22,24) HDA_RST_AUDIO# (22) HDA_SDIN0

LDRQ1#/GPIO23 LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 LDRQ0# LFRAME#/FWH4

LPC

AA5 V6 AA6 Y5 W8 Y8 Y4

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

1 R324 2 @ 0_0402_5%

USB20_N7

TGP

U72D

(17,27) (17,27) (17,27) (17,27)

USB20_N6

2006/08/18

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 3

2

Title

Tigerpoint(3/4) Size Document Number Custom Date:

Rev 0.1

LA-6421P

Thursday, June 03, 2010

Sheet 1

13

of

39

5

4

3

2

1

TGP U72E D

D

VCC5REF

F12

+V5REF_RUN

6mA

F5

+V5REF_SUS

10mA

Y6

+SATAPLL

45mA

U72F

+5VS

VCC5REF_SUS

+3VS

AA8 M9 M20 N22

1.422A

VCC1_05_1 VCC1_05_2 VCC1_05_3 VCC1_05_4

J10 K17 P15 V10

0.955A

H25 AD13 F10 G10 R10 T9

0.216A

F18 N4 K7 F1

0.092A

5

1

2

1

2

2

1

2

1

C461

2

1

2

1U_0603_10V6K

C61 C460

2

1

2

1

2

+1.5VS

+VCCP

10U_0805_10V4Z

1

1U_0603_10V6K

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C45 C63 C38

2

1U_0603_10V6K

1

1U_0603_10V6K

C60

2

1U_0603_10V6K

C48 C39

VCCSUS3_3_1 VCCSUS3_3_2 VCCSUS3_3_3 VCCSUS3_3_4

2

1

2

C463

2

1

1

1

2

+3VS

+3VALW

1U_0603_10V6K

C40 0.1U_0402_16V4Z

2

C37

2 VCC3_3_1 VCC3_3_2 VCC3_3_3 VCC3_3_4 VCC3_3_5 VCC3_3_6

C43

1

1

0.1U_0402_16V4Z

+V5REF_SUS

1

C44

2

1

10_0402_5%

2

C46

R35

1

0.1U_0402_16V4Z

D10 RB751V-40_SOD323-2

2

0.1U_0402_16V4Z

POWER

2

+3VALW

1

C

0.1U_0402_16V4Z

1U_0603_10V6K

1U_0603_10V6K

C41 2

2

10U_0805_10V4Z

VCC1_5_1 VCC1_5_2 VCC1_5_3 VCC1_5_4

2 1

C47

14mA

V_CPU_IO

C59

0.1U_0402_16V4Z

1

1

+RTCVCC

0.01U_0402_16V7K

W18

1

+VCCP

C459

10mA

1U_0603_10V6K

F6

+V5REF_RUN

1U_0603_10V6K

VCCUSBPLL

C42

+DMIPLL

Y25

0.1U_0402_16V4Z

1

2

AE3

VCCDMIPLL

C62

VCCRTC

D12 RB751V-40_SOD323-2

C462

R33 100_0402_5%

+5VALW

VSS01 VSS02 VSS03 VSS04 VSS05 VSS06 VSS07 VSS08 VSS09 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56

2

1

VCCSATAPLL

TGP

TIGERPOINT_ES1_BGA360 B

A1 A25 B6 B10 B16 B20 B24 E18 F16 G4 G8 H1 H4 H5 K4 K8 K11 K19 K20 L4 M7 M11 N3 N12 N13 N14 N23 P11 P13 P19 R14 R22 T2 T22 V1 V7 V8 V19 V22 V25 W12 W22 Y2 Y24 AB4 AB6 AB7 AB8 AC8 AD2 AD10 AD20 AD24 AE1 AE10 AE25

C

B

Place closely pin Y25 within 100mlis. +1.5VS

VSS57 VSS58 VSS59

R30 0_0805_5% C58 10U_0805_10V4Z

0.01U_0402_16V7K 1 1 C28

+DMIPLL 1

C464

2

2

RSVD32

G24 AE13 F2 AE16

2 4.7U_0603_6.3V6K TIGERPOINT_ES1_BGA360

Place closely pin Y6 within 100mlis. +1.5VS R29 +SATAPLL 0_0805_5% C57 10U_0805_10V4Z

1

1

2

2

C27 0.1U_0402_16V4Z

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/04/15

Issued Date

Deciphered Date

2010/04/15

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5

4

3

2

Title

Tigerpoint(4/4) Size Document Number Custom Date:

Rev 0.1

LA-6421P Sheet

Thursday, March 25, 2010 1

14

of

39

B

C

Add C1163 C1164 C1165 C1166 1

0.1U_0402_16V4Z

2

1

1 MCP@C1165 MCP@ C1165

C1164

2

0.01U_0402_25V7K

MCP@ C1163

2

C1166 MCP@

E

06/23

1

2

4.7U_0603_6.3V6K

+1.5VS MCP@1

D

47P_0402_50V8J

A

+3VS

Add C850 06/12

MCP@1

1MCP@

C505

0.1U_0402_16V4Z 1 C507

C506 2

2 1 MCP@

1 MCP@ C508

MCP@

0.1U_0402_16V4Z

2 10U_0805_10V4Z

2

2

0.01U_0402_25V7K

2

1

1

+3VS_WWAN

C411 BT@ 0.1U_0402_16V4Z

R501

C850 47P_0402_50V8J

(17,26)

2

BT_ON#

BT MODULE CONN

1

10K_0402_5% BT@ +3VS

@ 1 R504

2 0_1206_5%

@

2 0_1206_5%

+

C403

(13,26) ICH_PCIE_WAKE# (8) WWAN_CLKREQ#

WWAN_CLKREQ#

1 3 5 7 9 11 13 15

(8) CLK_PCIE_WWAN# (8) CLK_PCIE_WWAN

2

17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

(13) PCIE_DTX_C_IRX_N3 (13) PCIE_DTX_C_IRX_P3

Change to PCIE_P3 05/13 (13) PCIE_ITX_C_DRX_N3 (13) PCIE_ITX_C_DRX_P3 +3VS_WWAN D15 @ CM1293-04SO_SOT23-6 1 CH1 CH4 4

UIM_VPP

2

Vn

Vp

5

10U_0805_10V4Z MCP@ 1 2 C504 WWAN_WAKEUP_R# UIM_DATA

53 55

+UIM_PWR

1 3 5 7 9 11 13 15

2 4 6 8 10 12 14 16

2 4 6 8 10 12 14 16

17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 GND1 NC

0.1U_0402_16V4Z

2

Close to WWAN CONN

JBT1 +1.5VS

+UIM_PWR UIM_DATA UIM_CLK UIM_RST UIM_VPP

(13) (13)

USB20_P6 USB20_N6

1 2 3 4

USB20_P6 USB20_N6

1 2 3 GND 4 GND

5 6

2

ACES 88266-04001 CONN@

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

1

+3VS_BT

150U_B_6.3VM_R40M

Change C847 to SE000000K80 2010/04/06

JMINI1 ICH_PCIE_WAKE#

2

2

1 R405

1

G

06/29

3 1

BT@ C502

D

Change JMINI1 to FOX_AS0B246-S50U-7F_52P-T

+3VS_WWAN

+3VALW

S

+3VS_WWAN

+3VS

BT@ +3VS_BT Q35 AO3413_SOT23-3

WXMIT_OFF# R506 1

2 0_0402_5%

R507 1 1 R508

1 R511

0_0402_5% NON3G@ 2 NON3G@ 2 0_0402_5%

WXMIT_OFF# (17) PLTRST# (4,5,13,17,25,26,27) MINI_SMBCLK (26) CLK_SMBCLK (7,8,27) CLK_SMBDATA (7,8,27) MINI_SMBDATA (26) USB20_N5 (13) USB20_P5 (13)

(9~16mA)

WWAN_LED# (16,26) WLAN_LED# (16,26)

2 0_0402_5%

54 56

GND2 NC

BELLW_80052-1021 CONN@ UIM_RST

3

CH2

CH3

6

UIM_CLK

JP3

2

2

2

2

2

Add C1115 C1114 C1116 C1117 C1118 Change C512 to 1U_0402 05/14

1

1 3G@

C1115

3G@ 1

1

R509 10K_0402_5%

3G@

2

2

@

1 3G@ C512 3G@

56P_0402_50V8

2

1

C1114 56P_0402_50V8

TAITW_PMPAT2-08GLBS7N14N0 CONN@

2

@

1

C513 0.1U_0402_16V4Z

@ 10K_0402_5%

Modifiy 05/11 +UIM_PWR

1

1

1U_0402_6.3V6K

10 11

C1116

3G@ GND GND

22P_0402_50V8J

D+ D-

3

+3VALW

22P_0402_50V8J

8 9

+UIM_PWR UIM_RST UIM_CLK

1 2 3

C510

1

(13) USB20_SIM_P (13) USB20_SIM_N

VCC RST CLK

22P_0402_50V8J C511

2

GND VPP I/O DET

R12

@

4 5 6 7

2

2

1 C509

C1118 56P_0402_50V8

3G@ 1

22P_0402_50V8J

UIM_VPP UIM_DATA

C1117 56P_0402_50V8

3

(17) WWAN_WAKEUP#

1 R510

WWAN_WAKEUP_R# 2 0_0402_5%

@

05/11

Reserve for SIM card does not meet rise time and pull-up is needed.

4

4

2006/08/05

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2007/8/18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A

B

C

D

Title

Mini-Card/BT CONN Size

Document Number

Rev 0.1

LA-6421P Date:

Monday, June 28, 2010

Sheet E

15

of

39

A

B

C

D

E

F

G

H

ADD LED PCB CONN 06/12 Change JP18 to NEW P/N

LED PCB CONN

06/23

09/03 Change +5VALW , +5VS to +3VALW +3VS JP18

1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

+3VALW (17) PWR_LED# (17) PWR_SUSP_LED# (17) BATT_GRN_LED# (17) BATT_AMB_LED#

MEDIA_LED#

+3VS (15,26) WWAN_LED# (15,26) WLAN_LED#

1

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

GND GND

+CHGRTC

+RTCVCC

17 18

+RTCBATT1

D46 2 1 3

1 R1456

DAN202UT106_SC70-3 noncharge@

ACES_85201-1605N

2 1K_0402_5% noncharge@

CONN@

+3VS

1

4

+

1 Y

A

MEDIA_LED#

@ JBATT1

2

G

SATA_LED#

SATA_LED#

3

(12)

P

U29 2 B

(21) CARD_LED#

2

5

+RTCBATT1

NC7SZ08P5X_NL_SC70-5

2

-

Add U29 5/14

SUYIN_060003HA002G202ZL

20100503 add

3

3

SATA HDD Conn. JHDD1 (12) SATA_ITX_C_DRX_P0 (12) SATA_ITX_C_DRX_N0 (12) SATA_DTX_C_IRX_N0 (12) SATA_DTX_C_IRX_P0

SATA_DTX_C_IRX_N0

1

SATA_DTX_C_IRX_P0

1

SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_N0

SATA_DTX_IRX_N0 2 C380 0.01U_0402_16V7K SATA_DTX_IRX_P0 2

C383 0.01U_0402_16V7K

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

+3VS

+5VS +5VS

0.1U_0402_16V4Z 1

C423

2

1

2

1

1

C422 1U_0402_6.3V6K 2

2

C426

1 2 3 4 5 6 7

C419 10U_0603_6.3V6M

1000P_0402_50V7K 4

GND A+ AGND BB+ GND V33 V33 V33 GND GND GND V5 V5 V5 GND Reserved GND GND V12 V12 GND V12

24 23 4

SUYIN_127043FR022G263ZR_NR CONN@

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification 2006/08/18

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A

B

C

D

E

F

Title Size B

SATA CONN./LED/B CONN./BATT CONN. Document Number

Rev 0.1

LA-6421P

Date:

Thursday, June 03, 2010 G

Sheet

16 H

of

39

+3VALW

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

C1159 220P_0402_50V7K KSO[0..15] (19)

KSO[0..15]

(19)

KSI[0..7]

KSI[0..7]

For ESD

KSO1 WLAN_OFF#

v

WXMIT_OFF#

v

KSI1

KSI5

GPIO15

v

High v

v

High

v

Low (31) (31) (5,27) (5,27)

KSO1 KSI1

WL_BTN#

KSI5

3G_BTN#

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI#

(13) PM_SLP_S3# (13) PM_SLP_S5# (13) EC_SMI#

Change INVT_PWM from Pin21 to Pin25 06/24 (5,9)

0_0402_5% R67 INVT_PWM2 1 FAN_SPEED1 (4) FAN_SPEED1 EC_TX_P80_DATA (26) EC_TX_P80_DATA EC_RX_P80_CLK (26) EC_RX_P80_CLK (18) ON/OFF# PWR_SUSP_LED# (16) PWR_SUSP_LED#

INVT_PWM

XCLKI XCLKO

6 14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

1 R1459

1

100K_0402_5%

R1460 @

1 @

2

Reserve EC_CLK for KBC 2010/06/01 XCLKI

1

C525

OSC

2

SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47

2

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D TP_CLK/PSCLK3/GPIO4E TP_DATA/PSDAT3/GPIO4F

PS2 Interface

SDICS#/GPXOA00 SDICLK/GPXOA01 SDIDO/GPXOA02 SDIDI/GPXID0

BATT_TEMP BATT_OVP

SPI Flash ROM

GPIO

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C GPIO EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A

SPIDI/RD# SPIDO/WR# SPICLK/GPIO58 SPICS#

CIR_RX/GPIO40 CIR_RLC_TX/GPIO41 FSTCHG/SELIO#/GPIO50 BATT_CHGI_LED#/GPIO52 CAPS_LED#/GPIO53 BATT_LOW_LED#/GPIO54 SUSP_LED#/GPIO55 SYSON/GPIO56 VR_ON/XCLK32K/GPIO57 AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04 EC_ON/GPXO05 EC_SWI#/GPXO06 ICH_PWROK/GPXO06 GPO BKOFF#/GPXO08 WL_OFF#/GPXO09 GPXO10 GPXO11

BRD_ID 2

63 64 65 66 75 76

PWR_PWM_LED# BEEP# (19)

ACOFF

ACOFF

(32)

R1292 33K +-5% 0402

1 0_0402_5%

2 R1389

BOARD ID Table

+0.89V_PG (35)

@ 68 70 71 72

EN_FAN1 IREF

83 84 85 86 87 88 97 98 99 109 119 120 126 128

VCC Ra

EN_FAN1 (4) IREF (32) CALIBRATE# (32)

USB_ON#

EC_MUTE# (22,23) USB_ON# (20)

TP_CLK TP_DATA

PWR_LED1# (18) TP_CLK (19) TP_DATA (19)

LID_SW# 1 R1293

EC_ID

WWAN_WAKEUP# (15)

0 1 2 3 4 5 6 7

PAV50

LID_SW#

2 47K_0402_5% FRD#SPI_SO FWR#SPI_SI SPI_CLK FSEL#SPICS#

GPI

XCLK1 XCLK0

V18R

3.3V 100K

ID BRD ID

NAV60

(18)

+3VALW

R01 (EVT) R02 (DVT) R03 (PVT) R10A (MP) R01 (EVT) R02 (DVT) R03 (PVT) R10A (MP)

100 101 102 103 104 105 106 107 108

FSTCHG (32) R1446 BATT_GRN_LED# (16) 1 2 0_0402_5% @ BATT_AMB_LED# (16) Add for PWR_LED# (16) SYSON (7,29,34) VR_ON (36) ACIN (13,32)

BATT_GRN_LED# BATT_AMB_LED# PWR_LED# SYSON

BKOFF# (9) R1295 1 2 WL_OFF# (26) WXMIT_OFF# (15) 0_0402_5% BT_ON# (15,26)

110 112 114 115 116 117 118

0V 0.289V 0.538V 0.875V 1.264V 1.759V 2.341V 3.3V

1 R320

124

20mil 1

1

2

@ 2

C1178

2

Del R1294 06/08 PCH_POK (5,13)

1 2 +3VS R1296 10K_0402_5% @

@ D30

PCH_POK

2

1

VGATE

(5,8,13,36)

RB751V-40TE17_SOD323-2

+3VALW U75 SPI_CS#

+3VALW

100K_0402_5%

EC_ID

R327 100K_0402_5% @

PM_SLP_S4# (7,13) GMCH_ENBKL (5) EAPD (22) EC_THERM# (13) SUSP# (29,34,35) PBTN_OUT# (13) LAN_WAKE# (25)

EC_THERM# SUSP# PBTN_OUT#

C524

1 3 7 4

+3VALW

CS# WP# HOLD# GND

VCC SCLK SI SO

8 6 5 2

SPI_CLK_R SPI_SI SPI_SO

MX25L512AMC-12G_SO8 @

+3VALW

8M SPI ROM 1

20mils

0.1U_0402_16V4Z

U76

2

Add JP23 2010/03/25

+5VS

Vab-Max

0V 0.250V 0.503V 0.819V 1.185V 1.650V 2.200V 3.3V

Light-sensor interrupt 2010/03/11

8

Del JP23 2010/06/07

1 R1301 TP_DATA 1 R1303

Vab-Typ

0V 0.216V 0.436V 0.712V 1.036V 1.453V 1.935V 2.500V

R328 @ 100K_0402_5%

Add 0 ohm R1309 06/08 0_0402_5% R1309 1 2 EC_RSMRST# (13) EC_LID_OUT# EC_LID_OUT# (13) EC_ON RB751V-40TE17_SOD323-2 EC_ON (18) D29 @ ICH_POK_EC 1 2 PCH_POK

EC DEBUG PORT TP_CLK

Vab-Min

0 8.2K 18K 33K 56K 100K 200K NC

LIGHT_SENSOR_INT# (27)

C526

27P_0402_50V8J

Rb

+3VALW 73 74 89 90 91 92 93 95 121 127

Change BT_ON# from Pin98 to Pin108 06/24 PM_SLP_S4#/GPXID1 ENBKL/GPXID2 GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

Rb

1

BATT_TEMP (31) BATT_OVP ADP_I (32)

BRD_ID

SPI Device Interface

SM Bus

C1222 KB926QFE0_LQFP128_14X14

PWR_PWM_LED# BEEP#

1

AVCC

67

9 22 33 96 111 125

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 Int. K/B KSO6/GPIO26 Matrix KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

4

OSC

NC

2

2

27P_0402_50V8J

NC

1

1

3

C527

XCLKO

DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D IREF/DA2/GPIO3E DA3/GPIO3F

ECAGND

2 0_0402_5%

BATT_TEMP/AD0/GPIO38 BATT_OVP/AD1/GPIO39 ADP_I/AD2/GPIO3A Input AD3/GPIO3B AD4/GPIO42 SELIO2#/AD5/GPIO43

DA Output

22P 50V J NPO 0402

EC_CLK

2

(13) EC_SMB_CK1 2 2.2K_0402_5% EC_SMB_DA1 2 2.2K_0402_5% KSO1 2 47K_0402_5% KSO2 2 47K_0402_5%

AD

PCICLK PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D

GND GND GND GND GND

@

+3VALW 1 R1297 1 R1298 1 R1299 1 R1300

77 78 79 80

PWM Output

21 23 26 27

2

1

INVT_PWM/PWM1/GPIO0F BEEP#/PWM2/GPIO10 FANPWM1/GPIO12 ACOFF/FANPWM2/GPIO13

1

2

1

PLTRST#

EC_RST# EC_SCI#

EC_SCI#

R1291 100K_0402_5%

2

0.1U_0402_16V4Z

(13)

2

12 13 37 20 38

Ra

1

C523

(8) CLK_PCI_LPC (4,5,13,15,25,26,27) PLTRST#

GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1 LAD0 LPC & MISC

U6

470P_0402_50V7K

2 1 R1289 @ 10_0402_5% @ 22P_0402_50V8J 1 2 +3VALW R1290 47K_0402_5%

LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

+3VALW

2

4.7U_0603_6.3V6K

(12,27) SERIRQ (13,27) LPC_FRAME# (13,27) LPC_AD3 (13,27) LPC_AD2 (13,27) LPC_AD1 (13,27) LPC_AD0

C522 2 1

Swap to WLAN

1 2 3 4 5 7 8 10

GATEA20

KB_RST#

2

VCC VCC VCC VCC VCC VCC

10K_0402_5% 1 (12)

WXMIT_OFF#

2

AGND

+3VS

(12)

2

69

R41

2

2

Change R1292 to 8.2K ohm for BRD ID R02 (DVT) 2010/05/03

1

11 24 35 94 113

05/14

2

1

C519 1000P_0402_50V7K

Change to R_0402

2

1

C521 1000P_0402_50V7K

C520 0.1U_0402_16V4Z 1 ECAGND 2 1 R1288 0_0402_5%

+EC_AVCC C518 @ 1000P_0402_50V7K

1

C517 0.1U_0402_16V4Z

1

1

C516 0.1U_0402_16V4Z

2

1

C515 0.1U_0402_16V4Z

1 2 MBK1608121YZF_0603

C514 0.1U_0402_16V4Z

+3VALW

Change R1292 to 0 ohm for BRD ID R01 (EVT) 2010/03/25

+EC_AVCC

L16

2 4.7K_0402_5% 2 4.7K_0402_5%

X1 32.768KHZ_12.5PF_Q13MC14610002

FSEL#SPICS# 2 R1302 SPI_CLK 2 R1304 FWR#SPI_SI 2 R1305

SPI_CS# 22_0402_5% SPI_CLK_R 1 22_0402_5% SPI_SI 1 22_0402_5% 1

VCC

3

W

7

HOLD

1 6 5

VSS

4

S C D

Q

2

SPI_SO 2 R1306

1

FRD#SPI_SO 22_0402_5%

16M W25Q16BVSSIG SOIC 8P

+3VS 1 R1307 1 R1308

2 2

EC_SMB_CK2 2.2K_0402_5% EC_SMB_DA2 2.2K_0402_5%

Change X1 to SJ132P7KW10 2010/04/06

C528 BATT_OVP

2 R1392 1

BATT_TEMP

C530 1

ACIN

C531 1

3G@

2 1K_0402_5% 2 3G@ 100P_0402_50V8J 2 100P_0402_50V8J

3G@ SPI_CLK_R 10P_0402_50V8J

Compal Electronics, Inc.

Compal Secret Data

Security Classification Issued Date

1

2006/08/04

Deciphered Date

2007/8/18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

KB926/BIOS Size Document Number Custom Date:

Rev 0.1

LA-6421P

Monday, June 28, 2010

Sheet

17

of

39

Add For NAV50 07/06 09/03 Change +5VS to +3VS

ON/OFF Button +3VS 3

SW1

4

TOP Side

(BLUE)

ON/OFFBTN#

1

1

2

2

51 +-5% 0402 R1403

EVQPLMA15 SPST PANASONIC H1.5

@ R194 2 1 0_0805_5%

R1347 100K_0402_5%

FOR EMI

ON/OFF#

2

ON/OFFBTN#

1

51ON#

3

1

50@

D14

Bottom Side

LED2 HT-191NB5-DT BLUE 0603

1

2

2

50@

+3VALW

@ R186 2 1 0_0805_5%

ON/OFF#

(17)

51ON#

(30)

PWR_LED1#

C1169 1

2 @ 100P_0402_50V8J

ON/OFFBTN#

C1170 1

2 @ 100P_0402_50V8J

1

DAN202U_SC70 PWR_LED1#

PWR_LED1# (17)

C4

10mil

2

D1 @ RLZ20A_LL34

ON/OFFBTN#

EC_ON

EC_ON

S

Q1 2N7002W-T/R7_SOT323-3

2

3

R3 D42

D

2 G

2

(17)

1

PWR_LED1#

3

2

1000P_0402_50V7K 1

10K_0402_5%

1

1

PJSOT24C_3P_C/A_SOT-23

Add For PAV70 2010/04/09

Add For PAV70 2010/04/09

LID Switch +3VS

+3VS

Del R103 05/12 +3VALW

(BLUE)

2 2

@

LED3 HT-191NB5-DT BLUE 0603

70@

VDD C155 0.1U_0402_16V4Z

1

2 LED4 HT-191NB5-DT BLUE 0603

OUTPUT

3

LID_SW# (17) 1 C150

U5

2

1

1

APX9132ATI-TRL SOT-23 3P

10P_0402_50V8J

2 2

51 +-5% 0402 R1455

GND

70@

51 +-5% 0402 R1454

1

@

1

1

2

(BLUE)

PWR_LED1#

10mil

PWR_LED1# (17)

PWR_LED1#

PWR_LED1# (17)

10mil

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification 2006/08/18

Deciphered Date

2007/8/18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title Size B Date:

ON/OFF / PWR SW/ LID SW Document Number

Rev 0.1

LA-6421P Thursday, June 03, 2010

Sheet

18

of

39

5

4

3

2

1

To TP/B Conn. D

D

KSI[0..7]

KSI[0..7]

1 2 3 4 5 6

+5VS JKB1

KSI0

C136 1

2

100P_0402_50V8J

KSO4

C104 1

2

100P_0402_50V8J

KSI1

C135 1

2

100P_0402_50V8J

KSO5

C103 1

2

100P_0402_50V8J

KSI2

C134 1

2

100P_0402_50V8J

KSO6

C102 1

2

100P_0402_50V8J

KSI3

C133 1

2

100P_0402_50V8J

KSO7

C101 1

2

100P_0402_50V8J

KSI4

C132 1

2

100P_0402_50V8J

KSO8

C100 1

2

100P_0402_50V8J

KSI5

C131 1

2

100P_0402_50V8J

KSO9

C99

1

2

100P_0402_50V8J

KSI6

C127 1

2

100P_0402_50V8J

KSO10

C98

1

2

100P_0402_50V8J

KSI7

C126 1

2

100P_0402_50V8J

KSO11

C97

1

2

100P_0402_50V8J

KSO0

C125 1

2

100P_0402_50V8J

KSO12

C96

1

2

100P_0402_50V8J

KSO1

C124 1

2

100P_0402_50V8J

KSO13

C95

1

2

100P_0402_50V8J

KSO2

C114 1

2

100P_0402_50V8J

KSO14

C93

1

2

100P_0402_50V8J

KSO3

C113 1

2

100P_0402_50V8J

KSO15

C92

1

2

100P_0402_50V8J

(17) (17)

G2 G1 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

TP_CLK TP_DATA

TP_CLK TP_DATA

2

KSI0 KSI1 KSI2 KSO0 KSO1 KSO2 KSI3 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSI4 KSO9 KSI5 KSI6 KSO10 KSO11 KSI7 KSO12 KSO13 KSO14 KSO15

26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

3

KSO[0..15] (17)

1 2 3 4 5 6

GND GND

8 7

ACES_85201-0605N D22 @

CONN@

PJDLC05C_SOT23-3

1

KSO[0..15]

C

INT_KBD Conn.

(17)

JP11

Chage JP11 Pin define & Add D22

05/14

Update TP/B Conn 05/04

C

ACES_85202-24051 CONN@

+VCC_4IN1

2

6/26 Add circuit @ R1447 100K_0402_5%

1

B

1 C1220 10U_0805_10V4Z

(17)

BEEP#

2

1

(21) (21) (21) (21) (21)

CARD_D0 CARD_D1 CARD_D2 PIN3 SDCDZ

D3 CMD VSS1 VDD CLK VSS2

(13)

SB_SPKR

1

R1327

B

MONO_IN (22,24)

2

1

2

C123 100P_0402_50V8J

47K_0402_5%

1

2

R1324

C1009

1

10K_0402_5%

7 8 9 10 11

D0 D1 D2 WP CD

12 13

GND1 GND2

0.1U_0402_6.3V4Z

2

(21) SMALE_CLK

1 2 3 4 5 6

C1020 0.1U_0402_6.3V4Z 1 2

2

47K_0402_5% JREAD2

(21) CARD_D3 (21) SMBSYZ_SDCMD

R1326

Modify MONO_IN schematic,move some parts to I/O Board , Add the

MONO_IN_R on M/B

06/25

TAITW _PSDBTC09GLBS1N14N0 CONN@

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification 2006/08/18

Issued Date

Deciphered Date

2007/8/18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5

4

3

2

Title

KB Conn/TP/CR Conn Size B Date:

Document Number

Rev 0.1

LA-6421P Tuesday, June 22, 2010

Sheet 1

19

of

39

A

B

C

D

E

+5VALW

+USB_VCCC U13 C244 0.1U_0402_16V4Z 2 1 2

1 2 3 4

R224 100K_0402_5%

1

GND VOUT VIN VOUT VIN VOUT EN FLG

8 7 6 5

USB_OC#0_1 (13)

APL3510BKI-TRG SOP 8P PWR SWITCH 1

(17)

1

1 USB_ON#

USB_ON#

C245 @ 1000P_0402_50V7K

2

Change JUSB1 JUSB2 to NEW P/N SP010906181

USB CONN.2

06/23

USB CONN.1 +USB_VCCC

+USB_VCCC

W=40mils

+USB_VCCC 1 C315

1

+

C316 C317

2

150U 6.3V M B LESR45M T520 H1.9 2

W=40mils

+USB_VCCC 1

1

+

470P_0402_50V7K

2

150U 6.3V M B LESR45M T520 H1.9 2

C318 470P_0402_50V7K

JUSB1

2

2

3 D21

JUSB2

1 2 3 4

VCC DD+ GND

5 6 7 8

GND1 GND2 GND3 GND4

2

(13) USB20_N1 (13) USB20_P1 3

(13) USB20_N0 (13) USB20_P0

D23

1 2 3 4

VCC DD+ GND

5 6 7 8

GND1 GND2 GND3 GND4

SUYIN_020133GB004M25MZL

+5VALW

(17)

1

W=80mils

U78 1 2 3 4

USB_ON#

GND VOUT VIN VOUT VIN VOUT EN FLG

8 7 6 5

1

R1 0_0402_5% 2

USB_OC#2 (13)

3

APL3510BKI-TRG SOP 8P PWR SWITCH

1 C1 0.1U_0402_16V4Z

CONN@

+USB_VCCC1

W=80mils

3

CONN@ 1

PJDLC05C_SOT23-3

2

SUYIN_020133GB004M25MZL PJDLC05C_SOT23-3

1 2

L31 @

+USB_VCCC1 C2 @ 1000P_0402_50V7K

W=80mils

2

USB CONN. 3

1 C10

1

+

150U 6.3V M B LESR45M T520 H1.9 2

2

(13) USB20_N2

1

(13) USB20_P2

4

1

2

4

3

2

USB20_N2_1

3

USB20_P2_1

WCM2012F2S-900T04_0805

C8 1 2 R2 0_0402_5%

470P_0402_50V7K

JUSB3 USB20_N2_1 USB20_P2_1

1 2 3 4 5 6 7 8

D4 USB20_N2_1

4

+USB_VCCC1

6

5

4

CH3

Vp

CH4

@ CH2

Vn

CH1

VCC DD+ GND GND1 GND2 GND3 GND4 SUYIN_020133GB004M25MZL CONN@

3

4

2

1

USB20_P2_1

CM1293-04SO_SOT23-6

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A

B

C

D

Title

USB PORTS Size B Date:

Document Number

Rev 0.1

LA-6421P Thursday, June 03, 2010

Sheet E

20

of

39

5

4

3

2

1

J14 U28

2

+3VS

2

1

1

@ JUMP_43X39

08/06 Add R32

U1 close to JREAD1 U28

VCC33

、R33

6252@

J13 2

+3VALW

6250@

2

+3VS_READER

1

1

D

(19) CARD_D3 (19) SMBSYZ_SDCMD

1

(19) SMALE_CLK 2 (19) (19) (19) (19) (19)

R1345 12K_0402_1% 1 2

1 C1054 10U 6.3V M X5R 0603 H0.8

28 29 30 31 33

+VCC_4IN1 +3VS_READER VCC33 VCC18

@ JUMP_43X39

C1055 0.1U_0402_25V4K 2 @

(13) (13)

XTLI

Clock from M/B

CARD_D0 CARD_D1 CARD_D2 PIN3 SDCDZ

08/06 Add R1347

C1048

HW TRAP JUMPER

、C1049 close to U1 +VCC_4IN1

VCC18

20mils

20mils

14 13 REXT 12 8

USB20_P4 USB20_N4

CARD_D0 CARD_D1 CARD_D2 CARD_D3 CARD_D4 CARD_D5 CARD_D6 CARD_D7

、R1348

SMCEZ

SMREZ

R1395 6252@ 470_0402_5% 1 2

D+ DRref EClkin

xDData0 xDData1 xDData2 xDData3 xDData4 xDData5 xDData6 xDData7

VddA VccA

15 10

xDCeZ xDCle xDAle xDBsyZ

7 23 24 22

SMCEZ SMCLE SMALE_CLK SMBSYZ_SDCMD

xDWeZ xDReZ xDWpZ SdCdZ xDCdZ

3 25 32 26 27

PIN3 SMREZ SMWPZ SDCDZ SMCDZ_MSINSZ

2

SMCEZ_C

1

6252@ R1346 100_0402_1% 2

SMREZ_C

1

D

2

VCC33

R1357 4.7K_0402_5% @

16 11 9

VssA GndA NC

6252@ R1344 100_0402_1% 2

CARD_LED_R#

1

LedZ ResetZ

1

XTLO

UB6252NF A2-110 QFN 32P

0: NC, 1: Short R1394 6252@ 470_0402_5% 1 2

17 18 20 21 19 4 5 6

CrdVcc SysVcc Vcc33O Vcc18O Thermo Pad

If use external crystal(Y4), U1 will change UB6252 VCC33 VCC33

C

1

、R1348 is NC

@ R1353 10K_0402_5%

R1360 10K_0402_5%

0_0402_5% R1359

@ R1361 0_0402_5%

R1354 10K_0402_5%

@ R1358 0_0402_5% 1 2

G

R1344 VCC33

2

2

2

when you use UB6250 ,R1347

@

2

2

+3VS

VCC33

VCC33

1

C1059 4.7U_0603_6.3V6K

1

2

1

@ C1058 0.1U_0402_25V4K

2

2

1 C1057 10U 6.3V M X5R 0603 H0.8

1

1

2

2

@ C1056 10P 50V J NPO 0402

1

1 C

+VCC_4IN1

R1346

D31 3

1 D

CARD_LED_R#

S

20mils

1

Q37 2N7002W-T/R7_SOT323-3 2

1

@ C1060 0.01U_0402_16V7K

1

2

1 C1061 0.1U_0402_25V4K

2

C1062 4.7U_0603_6.3V6K

2

CARD_LED# (16)

RB751V_SOD323

6250@

6250@

1

2

0_0402_5% R1355 @

07/02 Update JREADER1 07/02 Revised C1053 to 0.01u

ByPass Capacitors

Card Reader Connector B

B

JREAD1 +VCC_4IN1

4/30 Add CLK_SD_48M 6250@ 2 0_0402_5%

R1397 33_0402_5% 2

@

1 @ 2

C1065 18P 50V J NPO 0402 6252@ Y6 12MHZ_16PF_7A12000026~D 6252@

C1066 22P_0402_50V8J 1

EMI A

2

Change Y6 to SJ100005900 2010/04/06

CARD_D0 CARD_D1 CARD_D2 CARD_D3 CARD_D4 CARD_D5 CARD_D6 CARD_D7

30 29 28 27 26 25 24 23

PIN3 SMWPZ SMALE_CLK SMCDZ_MSINSZ SMBSYZ_SDCMD SMREZ_C SMCEZ_C SMCLE

33 32 34 39 38 37 36 35

Only UB6252 need to use XTLI and XTLO

31 40

XD-VCC XD10-D0 XD11-D1 XD12-D2 XD13-D3 XD14-D4 XD15-D5 XD16-D6 XD17-D7 XD07-WE XD08-WP XD06-ALE XD01-CD XD02-R/B XD03-RE XD04-CE XD05-CLE

41 42

XTLO

2

C1068 18P 50V J NPO 0402 6252@

SD4-VDD MS9-VCC

11 18

SD5-CLK SD7-DAT0 SD8-DAT1 SD9-DAT2 SD1-DAT3 SD2-CMD SD-CD SD-WP

9 4 3 21 19 16 1 2

SD6-VSS SD3-VSS

MS8-SCLK MS4-DATA0 MS3-DATA1 MS5-DATA2 MS7-DATA3 MS6-INS MS2-BS MS1-VSS MS10-VSS

XD GND XD GND

2

1

1

XTLI

1

1 R1396

CLK_48M_CR

22

SD CD/WP GND SD CD/WP GND

+VCC_4IN1 SMALE_CLK CARD_D0 CARD_D1 CARD_D2 CARD_D3 SMBSYZ_SDCMD SDCDZ PIN3

2 10P 50V J NPO 0402

6 13

SMALE_CLK CARD_D0 CARD_D1 CARD_D2 CARD_D3 SMCDZ_MSINSZ PIN3

17 10 8 12 15 14 7 5 20

@ C1064 1 2 10P_0402_25V8K

SMCDZ_MSINSZ

1

2

C1067 0.1U_0402_25V4K

T-SOL_144-1300302600_NR CONN@

2009/01/22

Issued Date

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/11/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5

C1063 1

4

3

2

Title

Card reader Size Document Number Custom Date:

Rev 0.1

LA-6421P

Thursday, June 03, 2010

Sheet 1

21

of

39

5

4

3

HDA_SDIN0_AUDIO

(24) MIC1_C_R (24) N17000410 (24) N18130106 (24) (24) D

SENSE_A SENSE_B

(24) N16999461 (24) N18122593

PVDD1_AUDIO N18123238

MIC1_C_R

N18123244

N17000410 N18130106

PVDD1_AUDIO (24) N18123238 (24)

N18123239 SENSE_A SENSE_B

+3VS JP4

N17000325 (24)

CODEC_VREF

PVDD2_AUDIO (24)

(24)

N18123190 (24)

N17000325

N18123244 (24)

PVDD2_AUDIO

HDA_SDIN0_AUDIO

N18123190

1

DMIC_CLK1 DMIC_DATA1

CODEC_VREF (24)

N16999452

1 2 3 4

8mil

N16999452 (24)

N18123239 (24)

N18123242

1 2 3 4

5 6

G1 G2

ACES_88266-04001 CONN@

N18123242 (24)

N16999461

MIC@ D20 PJDLC05C_SOT23-3

N18122593

3

(24) MIC1_C_L

N18123167 MIC1_C_L

2

(24) N18123167

2

MIC@ C604

1

2 22P 50V J NPO 0402

MIC@ C603

1 D

2 22P 50V J NPO 0402

For ESD 12/22

Change U26 to SA00001N000 2010/04/06 J8 2

1

1

1

2

@ JUMP_43X39 U26 @ +5VS

40mil

L21 1 2 FBMA-L11-201209-221LMA30T_0805 1 C1179 0.1U_0402_16V4Z

2

2

1

2

1

C458 0.1U_0402_16V4Z

3

(output = 300 mA) IN OUT

5

40mil

GND SHDN

BYP

4

+VDDA C1180 1 @

APL5151-475BC-TRL_SOT23-5

4.75V

+3VS_DVDD

2 +3VS_DVDD

2.2U_0603_6.3V6K 1

HD Audio Codec 2

1

1 C468 0.1U_0402_16V4Z

2

L23 MBK1608121YZF_0603 2

+3VS

1 C1181 0.1U_0402_16V4Z

2

C465 10U 6.3V M X5R 0603 H0.8

+AVDD_HDA PVDD1_AUDIO

L24 MBK1608121YZF_0603 1 2

20mil

2

36

20

1 C472

2 4.7U_0603_6.3V6K 2 4.7U_0603_6.3V6K

@ 10P_0402_50V8J 2 1

MIC1_C_R 22 12 11

(13,24) HDA_RST_AUDIO#

10

(13,24) HDA_SYNC_AUDIO

5

(13,24) HDA_SDOUT_AUDIO (9) (23) HP_PLUG# (23) MIC_PLUG# (23) HP_PLUG#

39.2K +-1% 0402 2 R1332 20K_0402_1% 2 R376 5.11K_0402_1% 2 R1404 2 1

19

MIC1_C_L 21

(19,24) MONO_IN

7/04 Add C23 C23

B

1 C471

MIC1_R

MIC1_R

1 271@ 1 1 272@

DMIC_DATA DMIC_DATA1

C1053 271@ 2.2U_0402_6.3VM

(17)

1 MIC@ 1

CMIC@ R438 2 FBMA-11-100505-401T 0402 R439 2 FBMA-11-100505-401T 0402 SENSE_A SENSE_B 1 R377 1 R1334 1 R1335

EAPD

(17,23) EC_MUTE#

2 0_0402_5% 2 0_0402_5% 2 0_0402_5%

MIC2_L

HP_OUT_R

LINE1_L

NC

LINE1_R

DMIC_CLK

CD_L

NC

CD_R

NC

39 41 45 46 43 44

(9)

PVDD1_AUDIO 271@

BIT_CLK

20mil

1 0_0402_5% 2 R1398

271@ C1044 0.1U_0402_16V4Z

1

2

271@ C1045 10U 6.3V M X5R 0603 H0.8

1

2

1

271@ C1046 0.1U_0402_16V4Z

2

C 271@ C1047 10U 6.3V M X5R 0603 H0.8

DMIC_CLK

AMP_RIGHT (23,24) SPKL-

(23)

SPKR+

20mil

20mil 271@

1

2

R1329 0_0402_5%

2 22_0402_5% 1

SPKR-

2 C470

6

L30 271@ MBK1608121YZF_0603 1 2

PVDD2_AUDIO

+5VS

(23) 1

271@ 10_0402_5%2 R1399 DMIC_CLK1 1 MIC@ 2 PVDD2_AUDIO FBMA-11-100505-401T 1 0402 2 R442 DMIC_CLK (9) FBMA-11-100505-401T 0402 CMIC@R441 271@ 0_0402_5% 1 2 R1400

R1401 1

CD_GND

2

271@ C1051 0.1U_0402_16V4Z

1

2

271@ C1048 10U 6.3V M X5R 0603 H0.8

1

2

271@ C1049 0.1U_0402_16V4Z

(23)

1

271@

2

C1050 10U 6.3V M X5R 0603 H0.8

22P_0402_50V8J

HDA_BITCLK_AUDIO (13,24)

MIC1_L MIC1_R

SDATA_IN

PCBEEP

MONO_OUT LINE1_VREFO

RESET# GPIO1 SYNC MIC1_VREFO_L SDATA_OUT MIC1_VREFO_R GPIO0 GPIO3 SENSE A SENSE B

47

EAPD

48

SPDIFO

4 7

HP_OUT_L

MIC2_R

2 3 13 34

271@ 272@

9 35

LINE_OUT_R

18

1 20K_0402_1%

1

LINE_OUT_L

NC

24

MIC1_L

38

NC

23

(23) 20mil (23) 20mil

+5VS

AMP_LEFT (23,24)

15

17

MIC1_L

1

2

14

16

271@ R1330 2

DVDD

2

U27

DVDD_IO

2

20mil

1 C467 0.1U_0402_16V4Z

25

1 C466 0.1U_0402_16V4Z

AVDD2

1 C1182 10U 6.3V M X5R 0603 H0.8

AVDD1

C

L29 271@ MBK1608121YZF_0603 2

40mil

HDA_SDIN0_AUDIO

29

10mil

MIC1_VREFO_L

2 HDA_SDIN0 (13) 33_0402_5% 1 2 R1331 0_0402_5% 271@ 1

R1352 1

1 271@ C1052 1

28

10mil

32

HP_RIGHT

10mil

27

CODEC_VREF

JDREF

40

NC

33

20mil 26 42

C491 2.2U_0402_6.3VM 272@

HP_RIGHT (23,24)

MIC1_VREFO_R

1 HP_LEFT

B

2

2 10U 6.3V M X5R 0603 H0.8 MIC1_VREFO

20mil

272@ C490 2.2U_0402_6.3VM 2

2 0_0402_5% @

31

30

AVSS1 AVSS2

1 R1402

37

VREF

MIC2_VREFO

DVSS1 DVSS2

8

HP_LEFT (23,24)

2 SPKL+ R1333 0_0402_5% 20mil 271@

(23)

2

272@

1

1

1

+VDDA

1

C473 4.7U_0603_6.3V6K

2

C474 0.1U_0402_16V4Z

ALC272-GR_LQFP48_9X9

Sense Pin

Impedance

DGND

Codec Signals

AGND

2

20K_0402_1%

R378

Follow Vendor ckeck change to 4.7uF 2010/05/24

2

1 0_0603_5%

2

1 0_0603_5%

2

1 0_0603_5%

R380

SENSE A

39.2K

PORT-A (PIN 39, 41)

20K

PORT-B (PIN 21, 22)

10K

PORT-C (PIN 23, 24)

5.1K

PORT-D (PIN 35, 36)

39.2K

PORT-E (PIN 14, 15)

20K

PORT-F (PIN 16, 17)

10K

PORT-G (PIN 43, 44)

Change to SA00002CI20

ALC272-VA2-GR

A

SENSE B

2 R382

1 0_0402_5%

R379

2 R384

1 0_0402_5%

R381

GND

GNDA

GND

A

GNDA

Compal Electronics, Inc. Title

PORT-H (PIN 45, 46)

5.1K

Date: 5

HD Audio Codec ALC272

Size Document Number CustomLA-6421P 4

3

2

Rev 0.1

LA-6222P

Thursday, June 03, 2010

Sheet 1

22

of

39

5

4

3

2

1

+5VAMP_J

272@ C384 10U 6.3V M X5R 0603 H0.8

J12 2

+5VS

2

1

1

+5VAMP_J

1

1

2

2

272@ C385 0.1U_0402_16V4Z

@ JUMP_43X39 D

D

Int. Speaker Conn.

16 15 6

GAIN1

3

GAIN1

18

SPKR+

14

SPKR-

4

SPKL+

8

SPKL-

ROUT-

2 R83

AMP_C_LEFT 0_0402_5%

5

LINLOUT-

2

272@ R1407 100K_0402_5%

SPK_R-

SPK_R+

SPK_L-

D44 PJDLC05C_SOT23-3

EC_MUTE#

BYPASS

5 6

SPK_L+

12 10

Keep 10 mil width

SHUTDOWN

2

GND5 GND1 GND2 GND3 GND4

(17,22) EC_MUTE#

19

G1 G2

D45 PJDLC05C_SOT23-3

1 C

1 2 3 4

272@ R319 100K_0402_5%

20081029 Update to 6dB NC

1 2 3 4

ACES_88266-04001 CONN@

LIN+ LOUT+

SPK_L+ SPK_LSPK_R+ SPK_R-

3

9

JP20 0_0603_5% 0_0603_5% 0_0603_5% 0_0603_5%

2

ROUT+

2 2 2 2

1

RIN-

272@ 1

2

R1336 1 R1338 1 R1337 1 R1339 1

SPKL+ SPKLSPKR+ SPKR-

3

272@ 2 0.47U_0603_10V7K

17

GAIN0

GAIN0

1

R94

2 AMP_C_RIGHT 0_0402_5%

(22) (22) (22) (22)

2

272@ 1 2 C397 0.47U_0603_10V7K

2

272@ 1

C1185 1

(22,24) AMP_LEFT

RIN+

2

272@ 1 2 C1184 0.47U_0603_10V7K

7

20mil

@ R1406 100K_0402_5%

1

C1183 0.47U_0603_10V7K 1 2

(22,24) AMP_RIGHT

@ R1405 100K_0402_5%

VDD PVDD1 PVDD2

272@

2

272@ U79

1

1

+5VAMP_J

@

21 20 13 11 1

1

C

@ 272@ C398 0.47U_0603_10V7K

TPA6017A2_TSSOP20

Headphone JACK JHP1

(22,24) HP_LEFT (22,24) HP_RIGHT

HP_RIGHT

HPOUT_L_1 2 56.2_0402_1% HPOUT_R_1 2 56.2_0402_1%

1 R1393 1 R1408

3

20mil

272@ HP_LEFT

1

2 FBM-11-160808-700T_0603 2 FBM-11-160808-700T_0603

L26 1 L25

HPOUT_L_2

1

HPOUT_R_2

2 5

20mil

272@

1

B

C485 330P_0402_50V7K

(22)

1

2

2

HP_PLUG#

HP_PLUG#

6 B

C486 330P_0402_50V7K

4 SHLD1

SINGA_2SJ2285-112252 CONN@ MIC1_VREFO

6/19 Update Headphone connector

2

2

MIC1_VREFO

1

1 1

272@ D27 RB751V-40TE17_SOD323-2

1

272@ D26 RB751V-40TE17_SOD323-2

2

JMIC1

20mil (22)

MIC1_L

(22)

MIC1_R

1 R1411 1 R404

2 1K_0603_1% 2 1K_0603_1%

MIC2_L_1

1

MIC2_R_1

1

20mil

A

MIC JACK

R1410 4.7K_0402_5% 2

R1409 4.7K_0402_5%

L28 FBM-11-160808-700T_0603 2

3

2 L27 FBM-11-160808-700T_0603

C488 220P_0402_50V8J

1

1

2

2

MIC2_L_2

1

MIC2_R_2

2 5 (22) MIC_PLUG#

C489 220P_0402_50V8J

A

MIC_PLUG# 6 4 SHLD1

SINGA_2SJ2285-112252

Compal Electronics, Inc.

CONN@ Title

6/19 Update MIC connector

Amplifier & Audio Jack

Size Document Number CustomLA-6421P

Rev 0.1

LA-6222P

Date: 5

4

3

2

Tuesday, June 22, 2010

Sheet 1

23

of

39

5

4

3

2

1

D

D

HD Audio Codec +3VS_DVDD

+AVDD_HDA +3VS_DVDD

40mil

14 15 16

C

17 23 24 18 20 (22) N18123167 (22) MIC1_C_L (22) MIC1_C_R

N18123167 MIC1_C_L

21

MIC1_C_R

22 12

(19,22) MONO_IN (13,22) HDA_RST_AUDIO#

11

(13,22) HDA_SYNC_AUDIO

10 5

(13,22) HDA_SDOUT_AUDIO

(22) (22)

SENSE_A SENSE_B

(22) N17000410 N18130106 SENSE_A SENSE_B (22) N16999461

B

19

N17000410 N18130106

N16999461

2 3 13 34 47 48

(22) N18122593

N18122593

4 7

DVDD

9

20mil

1

38

271@

AVDD2

AVDD1

U80

25

20mil

DVDD_IO

+AVDD_HDA

NC

LINE_OUT_L

NC

LINE_OUT_R

MIC2_L

HP_OUT_L

MIC2_R

HP_OUT_R

LINE1_L

NC

LINE1_R

DMIC_CLK

CD_L

NC

CD_R

NC

CD_GND BIT_CLK

35

AMP_LEFT (22,23)

36

AMP_RIGHT (22,23)

39

PVDD1_AUDIO

41

N18123238

45

N18123244

46

PVDD2_AUDIO N18123239

43 44

N18123242

20mil

PVDD1_AUDIO (22)

C

20mil

N18123238 (22)

20mil

N18123244 (22)

PVDD2_AUDIO (22) N18123239 (22) N18123242 (22)

6

HDA_BITCLK_AUDIO (13,22)

MIC1_L MIC1_R

SDATA_IN

PCBEEP

MONO_OUT LINE1_VREFO

RESET# GPIO1 SYNC MIC1_VREFO_L SDATA_OUT MIC1_VREFO_R GPIO0 GPIO3 SENSE A SENSE B

MIC2_VREFO VREF

EAPD

JDREF

SPDIFO DVSS1 DVSS2

HDA_SDIN0_AUDIO

8 37

N18123190

29

N17000325

31

10mil

28

10mil

32

HP_RIGHT

30

10mil

33

AVSS1 AVSS2

26 42

HP_LEFT

20mil

N17000325 (22)

MIC1_VREFO

20mil

N16999452

40

NC

(22)

MIC1_VREFO_L

CODEC_VREF

27

HDA_SDIN0_AUDIO N18123190 (22)

HP_RIGHT (22,23) MIC1_VREFO_R CODEC_VREF (22) N16999452 (22)

B

HP_LEFT (22,23)

ALC271X-GR QFN 48P CODEC

DGND

Sense Pin

SENSE A

Impedance

AGND

Codec Signals

39.2K

PORT-A (PIN 39, 41)

20K

PORT-B (PIN 21, 22)

10K

PORT-C (PIN 23, 24)

5.1K

PORT-D (PIN 35, 36)

39.2K

PORT-E (PIN 14, 15)

20K

PORT-F (PIN 16, 17)

10K

PORT-G (PIN 43, 44)

5.1K

PORT-H (PIN 45, 46)

A

A

SENSE B

Compal Electronics, Inc. Title

Rev 0.1

LA-6222P

Date: 5

HD Audio Codec ALC271

Size Document Number CustomLA-6421P 4

3

2

Thursday, June 03, 2010

Sheet 1

24

of

39

5

4

3

Change LAN chip to AR8152-L

for NAV70/80 DDR3

2

1

2010/01/22

U14 30

TX_P

LED_ACT#

38

LAN_ACTIVITY#

29

TX_N

LED_LINK10_100#

39

LAN_SK_LAN_LINK#

(13) PCIE_ITX_C_DRX_P1

35

RX_P

(13) PCIE_ITX_C_DRX_N1

36

RX_N

TRXP0 TRXN0 TRXP1 TRXN1

11 12 14 15

RBIAS

10

LAN_MDI0+ R629 LAN_MDI0R630 LAN_MDI1+ R631 LAN_MDI1R632 R635 2.37K_0402_1% 2 1

33 32

0_0402_5% 2 LAN_CLKREQ#_R

23

PLTRST#

PLTRST#

2

LAN_WAKE#

(17) LAN_WAKE#

3 25 26

Change Y5 to SJ100003300 2010/04/06 LAN_X1

Y5 1

2

28 27 41

LAN_X2 LAN_X1 LAN_X2

25MHZ_20PF_7A25000012 2

1

7 8

2 C852 27P_0402_50V8J

1

16 17 18 19 20 21 13

C853 27P_0402_50V8J

REFCLK_P REFCLK_N CLKREQ#

VDD33 PERST# LX

1

1 1 1 1

2 2 2 2

49.9_0402_1% 49.9_0402_1% 49.9_0402_1% 49.9_0402_1%

VDDCT VDDCT_REG

TEST_RST TESTMODE GND

W=40mils

NC NC NC NC NC NC NC

2 C839 0.1U_0402_16V4Z D

R635 keep away other singal (25mil) +3V_LAN

LX

40

W=40mils

If SWR mode applied,

W=40mils

5 4

Mount L10, C881, C861, C393, C860, C877. No mount R680, C876.

+VDDCT

VDDCT_REG +DVDDL

W=30mils

AVDDH AVDDH_REG

22 9

+AVDDH

W=30mils

AVDDL AVDDL AVDDL_REG

31 34 6

+AVDDL

W=30mils

Mount C881, C393, R680, C876, C877. No mount L10, C861, C860.

LX 1 2 +VDDCT L10 4.7UH_1008HC-472EJFS-A_5%_1008 SWR@

AR8152-AL1E

AR8152L

Place L10 close to Pin40.

If LDO mode applied,

24 37

DVDDL DVDDL_REG

XTLO XTLI

2 C838 0.1U_0402_16V4Z

1

close to Lan chip

WAKE# SMCLK SMDATA

1

1 1000P_0402_50V7K 10U_0603_6.3V6M 0.1U_0402_16V4Z 1 1 1 1 C861 C881 C399 C860 2

2 SWR@

2

2

VDDCT_REG

R680 0_0603_5% LDO@

1 C876

2 SWR@

LDO@

2

PN:SA00003JW10 close to Lan pin5

C

close to Lan pin40

1 C877 2

0.1U_0402_16V4Z

PCIE_C_RXP1 0.1U_0402_16V7K PCIE_CRXN1 0.1U_0402_16V7K

1U_0402_6.3V6K

R1428 1

(8) LAN_CLKREQ# (4,5,13,15,17,26,27)

1

CLK_PCIE_LAN CLK_PCIE_LAN#

(8) CLK_PCIE_LAN (8) CLK_PCIE_LAN#

D

1

0.1U_0402_16V4Z

2 C845 2 C851

(13) PCIE_DTX_C_IRX_P1 (13) PCIE_DTX_C_IRX_N1

C

close to Lan pin4

LAN Power circuit refer NAU00

Change C865,C870,C873,C876 to SE000000K80 2010/04/06

W=40mils +AVDDL

+AVDDH

+DVDDL

2

2

2

close to Lan pin6

close to Lan pin31

2

C872 2

close to Lan pin9

C865 1

1 C866

2

2

1 C867 2

close to Lan pin37

0.1U_0402_16V4Z

2

C871

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

C863

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

2

C868

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1 C1205

C856

1

1U_0402_6.3V6K

2 0.1U_0402_16V4Z

1 C340

1 1U_0402_6.3V6K

1

10U_0603_6.3V6M~D

C847

10U_0603_6.3V6M~D

1000P_0402_50V7K 1 1 C841 C848 2

C870

1

1U_0402_6.3V6K

+3VALW

C873

1A

2 0_0603_5%

1U_0402_6.3V6K

+3V_LAN R1429 1

close to Lan pin24

close to Lan pin22

close to Lan pin34

close to Pin 1 Change C847 to SE000000K80 2010/04/06

close to JRJ45 @ 2 1 C879 470P_0402_50V7K

B

B

JRJ45 LAN_ACTIVITY#

2 R644

1 511_0402_1%

T1 LAN_MDI1+ LAN_MDI1-

C1207

@ 2

1 2 3 4 5 6 7 8

LAN_MDI0+ LAN_MDI0-

RD+ RDCT NC NC CT TD+ TD-

12 RX+ RXCT NC NC CT TX+ TX-

350uH_NS0013LF 1

2

0.1U_0402_16V4Z

2

1

1000P_0402_50V7K C880

@ 2

1

0.1U_0402_16V4Z

2

1

1000P_0402_50V7K C882

1

C875

1U_0402_6.3V6K

close to L2

C1206

L32 +VDDCT 2 1 MURATA_BLM18AG601SN1D_0603

11

16 15 14 13 12 11 10 9

RJ45_MIDI1+ RJ45_MIDI1RJ45_CT0 RJ45_CT1 RJ45_MIDI0+ RJ45_MIDI0-

2 R640 1

75_0402_5% 2

R639 1

75_0402_5% 2

1

8

R645 5.1K_0402_5%

7 RJ45_MIDI1-

6 5

C862 1000P_1206_2KV7K

1

For EMI.

2

@ 2 1 C883 470P_0402_50V7K

+3V_LAN

4

2

Yellow LEDSHLD1 PR4DETECT PIN1

PR3PR3+

RJ45_MIDI0-

2

RJ45_MIDI0+

1

PR1+

9

Green LED+

10

13

PR2-

3

1 R643 511_0402_1%

15

PR4+

RJ45_MIDI1+

LAN_SK_LAN_LINK#

PR2+ PR1SHLD1

14

Green LEDSANTA_130452-3

@ 2 1 C884 470P_0402_50V7K

close to T1

Yellow LED+

Change C875 to SE000000K80 2010/04/06

A

A

Compal Secret Data

Security Classification Issued Date

2009/7/7

2010/7/7

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5

4

3

2

Title

Compal Electronics, Inc. LAN AR8152

Size Document Number Custom LA-6421P Date:

Rev 0.1

Thursday, June 03, 2010

Sheet 1

25

of

39

5

4

3

2

1

Mini-Express Card for WWAN D

(17) EC_TX_P80_DATA (17) EC_RX_P80_CLK

EC_TX_P80_DATA EC_RX_P80_CLK

R402 0_0402_5% 1 2 EC_TX_P80_DATA_R 1 2 EC_TX_P80_CLK_R R403 0_0402_5%

D

Mini-Express Card for WLAN

+3VS_WLAN

+1.5VS

1

2

1 C195 4.7U_0603_6.3V6K

2

1 C1189 0.1U_0402_16V4Z

2

1 C1043 47P_0402_50V8J

2

1 C1069 4.7U_0603_6.3V6K

2

1 C1070 0.1U_0402_16V4Z

2

C1071 47P_0402_50V8J

C

C

2 R1453 1 @ 0_0402_5%

(15,17) BT_ON# (8) WLAN_CLKREQ# (8) CLK_PCIE_WLAN# (8) CLK_PCIE_WLAN

(13) PCIE_DTX_C_IRX_N2 (13) PCIE_DTX_C_IRX_P2 (13) PCIE_ITX_C_DRX_N2 (13) PCIE_ITX_C_DRX_P2 +3VS_WLAN B

1

2

EC_TX_P80_DATA_R EC_TX_P80_CLK_R 1

C1072 10U_0603_6.3V6M

17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 54

1 3 5 7 9 11 13 15

2 4 6 8 10 12 14 16

17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 G1 G2

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 G3 G4

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 55 56

+3VS +1.5VS

WL_OFF# (17) PLTRST# (4,5,13,15,17,25,27)

MINI_SMBCLK (15) MINI_SMBDATA (15) USB20_N7_R USB20_P7_R

0_0402_5%1 R326 2 0_0402_5%1 R325 2

NON3G@ NON3G@

1 R1356 2 0_0402_5% R1362

USB20_N7 (13) USB20_P7 (13) B

WWAN_LED# (15,16)

@

12/09

0_0402_5%

(9~16mA)

BELLW_80052-1021 CONN@

WLAN_LED# (15,16)

2

R1325 100K_0402_5%

1 3 5 7 9 11 13 15

J9 JUMP_43X79 @ 1 1 2 2

2

(13,15) ICH_PCIE_WAKE#

+3VS_WLAN

1

JMINI2

5/12 6/1 6/12 6/26 7/01

、 、 、 、

Update WLAN connector(the same as KAV60) Revised 37 39 41 42 43 to NC Update connector to DC040006S00 Update JMINI1 footprint update pin 23,25,31,33

A

A

Compal Electronics, Inc. Title

Size Document Number CustomLA-6421P Date: 5

4

3

2

WLAN Rev 0.1

LA-6222P

Monday, June 07, 2010

Sheet 1

26

of

39

5

4

3

2

1

TPM1.2 on board R1457

Change Y7 to SJ132P7KW10 2010/04/06

1

Place closed to EC

TPM@ R1432 1 2 4.7K_0402_5%

+3VS

(13,17) LPC_AD0 (13,17) LPC_AD1 (13,17) LPC_AD2 (13,17) LPC_AD3 (13,17) LPC_FRAME# (4,5,13,15,17,25,26) PLTRST#

8/31 HP

R1450 R1451 R1448 R1449 R1452

2 C1214

2 2 2 2 2

0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5%

LPC_PD#

(12,17) SERIRQ (8) CLK_PCI_TPM @ 1 10P_0402_50V8J

+3VS C

TPM@1 TPM@ TPM@1 TPM@1 TPM@1 TPM@1

CLK_PCI_TPM

2 R1435

1 10_0402_5%

U81 TPM@ 26 23 20 17 22 16 28 27 21

LAD0 LAD1 LAD2 LAD3 LFRAME# LRESET# LPCPD# SERIRQ LCLK CLKRUN#

1

7 TPM_XTALO

14

TPM_XTALI

13

TPM@

ALS (Ambient Light Sensor)

2

TEST1 TESTB1/BADD

6 2

TPM_GPIO TPM_GPIO2

R1436 1 2 4.7K_0402_5% @

1 2 3 4 5 6 7

+3VS (5,17) EC_SMB_CK2 (5,17) EC_SMB_DA2 (17) LIGHT_SENSOR_INT#

R1433 4.7K_0402_5%

R1434 1 2 0_0402_5%

8 9

JP22

+3VS

TPC12 T86 TPC12 T87

Base I/O Address 0 = 02Eh 1 =* 04Eh

1 2 3 4 5 GND1 GND2 C

ACES_88266-05001 TPM@

TPM@

PP NC NC NC

XTALO

3 12 1

XTALI/32K IN GND GND GND GND

1

2

@

GPIO GPIO2

SLB 9635 TT 1.2

15

@ R1437 4.7K_0402_5%

2

1

1

TPM_XTALO

2

1

2

2 22P_0402_50V8J

2

1

5

1 C1213 TPM@

1

VSB

32.768KHZ_12.5PF_Q13MC14610002

TPM@

24 19 10

10M_0402_5%

C1212 0.1U_0402_16V4Z

OSC

4

C1211 TPM@ 0.1U_0402_16V4Z

NC

R1431

1

C1210 TPM@ 0.1U_0402_16V4Z

OSC

VDD VDD VDD

TPM@

NC

C1209 TPM@ 0.1U_0402_16V4Z

3

TPM_XTALI

2 22P_0402_50V8J Y7

2

D

+3VALW

TPM@ 1 C1208

2

D

2 0_0603_5%

1 TPM@

+3VS

SLB 9635 TT 1.2_TSSOP28

2

25 18 11 4

R1438 0_0402_5%

6/30 HP R1438 mount 2010/05/06

ST LIS33DE(G-Sensor) B

B

C1215

1

2

0.1U_0402_16V4Z

GSEN@

2

10U_0603_6.3V6M

GSEN@

1

C1216

R1458 1 GSEN@

1 R1439 1

2 3.4K_0402_1% I2C_DATA_GS 2 GSEN@ 0_0402_5% I2C_CLK_GS 1 2 R1441 GSEN@ 0_0402_5% 1

(7,8,15) CLK_SMBDATA

8 6

R1440

(7,8,15) CLK_SMBCLK

Add R1440, R1441 1/13

4 2 3 10 15

A

+3VS

U82 GSEN@ 14

GSEN@ +3VS

2 0_0603_5%

VDD INT_1 VDD_IO INT_2

11

G_SENSOR_INT#

G_SENSOR_INT (11)

9

CS SDA/SDI/SDO SDO/SA0 SCL/SPC NC_1 NC_2 RSVD_1 RSVD_2

GND_1 GND_2 GND_3 GND_4

7

5 12 13 16 A

LIS331DLTR_LGA16_3X3

P/N SA00003VT00 Compal Secret Data

Security Classification 2008/09/15

Issued Date

2009/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5

4

3

2

Title

Compal Electronics, Inc. TPM/G-Sensor/Light sensor

Size

Document Number

Rev 0.1

LA-6421P Date:

Thursday, June 03, 2010

Sheet 1

27

of

39

Modify Hole location by (ME Drawing 06/12) 0615 H8 H

H2 H_2P8

H23 H_2P8

H4 H_2P8

1

1

H16 H

H9 H

@

H_3P2N

H5 H_3P2N

1

1

@

1

@

H1 H

1

H_2P6

1

H_2P8

@

1

H_3P2X3P7N

H7 H

H17 H @ 1

1

@

H22 H_3P2x3P5N

H_3P2X3P5N 1

09/03 Del H12 H18 H

H_3P2

H19 H @ 1

1

@

H24 H_3P4X3P2N

1

H_3P4X3P2N

H3 H

H_3P2 1

@

H_3P3N

1

1

H11 H

FM3 @

FM1 @

@

FIDUCIAL_C40M80

1

FM4 @

1

FM2

1

@

H20 H

H_3P4X3P2N 1

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification @

2006/08/18

Deciphered Date

2007/8/18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Screw Size B Date:

Document Number

Rev 0.1

LA-6421P Thursday, March 25, 2010

Sheet

28

of

39

A

B

C

D

E

Change R51 R57 R70 R63 R317 R114 R190 to 0402 SIZE 04/30 Change C221 C218 C223 C 191 C201 C170 C392 C393 C394 to 0603 SIZE 04/30

+5VALW TO +5VS

+3VALW TO +3VS

1

1

5VS_GATE

1

+VSB

1

2

2 470_0402_5% R114 3 1

C176

1

Q12B 2N7002DW-T/R7_SOT363-6

R139 2 33K +-5% 0402

1

2

6

@

0.1U 25V K X5R 0402 Q12A SUSP 2 2N7002DW-T/R7_SOT363-6

5

SUSP

2

C179 0.1U 25V K X5R 0402

+5VALW 2

1

2

C170

10U_0603_6.3V6M 2

1

2 1

2N7002DW-T/R7_SOT363-6

1

R109 @

C208

SUSP

5

300K_0402_5% R111

Q17A 2

1

C201

10U_0603_6.3V6M 10U_0603_6.3V6M 2 2

Q17B 2N7002DW-T/R7_SOT363-6 1

300K_0402_5%

SUSP

2

1

C191

R190

4

2

C219

1 2 3

4

10U_0603_6.3V6M 2

470_0402_5%

Q15 1U_0603_10V6K

C223

1

1

1

2 10U_0603_6.3V6M

1 R187 22K +-5% 0402

SI4800BDY-T1-E3_SO8 8 7 6 5

2

1 2 3

+3VS

3

10U_0603_6.3V6M 2

+VSB

1

Q19

4

C218

+3VALW

1U_0603_10V6K

1

SI4800BDY-T1-E3_SO8 8 7 6 5

6

C221

+5VS

4

+5VALW

R141 100K_0402_5%

Change Q12,Q14,Q17,Q28 to SB00000DH00 2010/04/06 2

2

1

+1.5V to +1.5VS +1.5V

Change C176,C219,C395 to SE080105K80 2010/04/06

+1.5VS

ADD +5VS +VCCP +0.89V Cap for EMI R317

Q14A

C396

1

2

0.1U 25V K X5R 0402

@

1

C1173

@

1

C1174

@

1

C1175

C1172

@ 2

2

2

1

C1176

2

+0.75VS

0.01U_0402_25V7K

2

+1.5V

SUSP @

2N7002DW-T/R7_SOT363-6

+1.5V

0.01U_0402_25V7K

5

1

2

+0.89V

2 1

+VCCP

4 1

R112 300K_0402_5%

Q28A @ SUSP 2 2N7002DW-T/R7_SOT363-6

1

SYSON

(7,17,34) SYSON

+5VS

Q28B 2N7002DW-T/R7_SOT363-6

R318 47K +-5% 0402

6

470_0402_5%

0.01U_0402_25V7K

4

C395

2

0.01U_0402_25V7K

1

0.01U_0402_25V7K

1

1

C394

10U_0603_6.3V6M 2

3

2

6

+VSB

1

1U_0603_10V6K

2

C393

10U_0603_6.3V6M

1 10U_0603_6.3V6M

C392

Q27 1 2 3

2

SYSON# SI4800BDY-T1-E3_SO8 8 7 6 5

3

3

+3VLP

2

2

VL

+VCCP

+0.75VS

+1.5V SUSP

SUSP

3

2

2

2

2

(35)

1

+1.8VS

R173 100K_0402_5%

1

R172 100K_0402_5% @

470_0402_5%

R70

R63

Q14B 5

(17,34,35) SUSP#

2N7002DW-T/R7_SOT363-6

Q8B

SUSP

2

4

SUSP

2N7002DW-T/R7_SOT363-6

4

1

4

@

6

3

Q6A 5

@ @

Q8A 5 SUSP @ 2N7002DW-T/R7_SOT363-6

2 1

Q6B 2N7002DW-T/R7_SOT363-6

6

3

4

1

1

470_0402_5%

R57 1

470_0402_5%

R51 1

470_0402_5%

SYSON#

2N7002DW-T/R7_SOT363-6

4

Change Q6,Q8 to SB00000DH00 2010/04/06

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A

B

C

D

Title

DC INTERFACE Size B Date:

Document Number

Rev 0.1

LA-6421P Thursday, June 03, 2010

Sheet E

29

of

39

A

B

C

D

1

1

VIN PL1 HCB2012KF-121T50_0805 1 2

DC_IN_S1

1

1 PC4 100P_0402_50V8J

PC5 100P_0402_50V8J

2

PC3 1000P_0402_50V7K

2

4 3 2 1

2

GND 4 GND 3 2 1

2

1

PJP1 6 5

1

SP02000GC00 PC6 1000P_0402_50V7K

ACES 88266-04001 CONN@

2

2

-

+

PBJ1 2

1

+RTCBATT +RTCBATT

ML1220T13RE 45@

PJ2

2 1

1

JUMP_43X118

VS

1

1 2

PC14 0.1U_0402_25V6

2

2

+3VLP

@

PJ9

+0.89V

+1.8VP

2

2

1

JUMP_43X79

1

+1.8VS 1

JUMP_43X79

1 1

1

2

2 PR17 560_0603_5% 1 2

2

PC197 .1U_0402_16V7K

+

330U_B2_2.5VM_R15M

PC276

1

+CHGRTC

+VCCP

2

PJ5 2

+0.89VP

PR16 560_0603_5% 1 2

1

1

JUMP_43X118

2

TP0610K-T1-E3_SOT23-3

+VCCPP

PC198 .1U_0402_16V7K

(18) 51ON#

2

PR14 22K_0402_1% 1 2

PC13 0.22U_0603_25V7K

2

PR13 100K_0402_1%

+1.5V

1

1

2

1

2

2

3

2

2

1

+1.5VP

1

2

PJ4

PC195 .1U_0402_16V7K

BATT+

+5VALW

3

PR11 68_1206_5% PJ3

PQ1 N1

1

1

2

PR10 68_1206_5% PD3 RLS4148_LL34-2

2

JUMP_43X118

PC196 .1U_0402_16V7K

3

2

1

1

1

PD2 RLS4148_LL34-2

+5VALWP

1

JUMP_43X118

+3VALW

2

1 1

1

2

2

PC194 .1U_0402_16V7K

2

+3VALWP

PC193 .1U_0402_16V7K

PJ1

VIN

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification 2007/09/20

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A

B

C

Title

DCIN & DETECTOR Size Document Number Custom Date:

Rev 0.1

LA-6421P

Tuesday, June 22, 2010

Sheet D

30

of

39

A

B

C

D

PH1 under CPU botten side : CPU thermal protection at 92 degree C Recovery at 72 degree C VMB

@ PR23 100K_0402_1%

(33) MAINPWON

PR22 100_0402_1%

PU3 VCC TMSNS1

8

2

GND RHYST1

7

2

3

OT1 TMSNS2

6

PR31 15K_0402_1%

OT2 RHYST2

5

1

4

G718TM1U_SOT23-8 PR25 6.49K_0402_1% 2 1

PR220 1K_0402_5%

2

1

1

@ PR169 47K_0402_1%

+3VALW P

1

1

1

PR21 100_0402_1%

PR29 22.1K_0402_1%

1

1

2

2

SUYIN_200275MR008G15QZR

1

2 PR28 10K_0402_1%

VL

2

PC23 0.1U_0603_25V7K

1

PC22 0.01U_0402_25V7K

2

PC21 1000P_0402_50V7K

1

1

TS EC_SMCA EC_SMDA

1

BATT+ 1

BATT_S1 B/I

2

1

2

PH2 @

PH1

100K_0402_1%_NCP15W F104F03RC

100K_0402_1%_NCP15W F104F03RC

2

2

PR27 1K_0402_1%

2

1 2 3 4 5 6 7 8 9 10

1

1 2 3 4 5 6 7 8 GND GND

VL PL2 HCB2012KF-121T50_0805 1 2

2

PJP2

2

1

2

2

BATT_TEMP (17)

EC_SMB_CK1 (17) EC_SMB_DA1 (17)

@ PR236 0_0805_5% 1 2 PQ3 3

+VSB

1

PR30 100K_0402_1%

PR32 22K_0402_1%

2

1

D

S

1

(33) SPOK

3

1

PR34 100K_0402_1%

3

3

PC200 0.1U_0402_25V6

2

VL

2

2

TP0610K-T1-E3_SOT23-3

2

1

1

B+

PQ4 2N7002W -T/R7_SOT323-3

2 G

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification 2007/09/20

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A

B

C

Title

BATTERY CONN / OTP Size Document Number Custom Date:

Rev 0.1

LA-6421P

Tuesday, June 22, 2010

Sheet D

31

of

39

A

B

C

D

B+

CSIN

20

6

VCOMP

CSIP

19

7

ICM

PHASE

18

1

4 2 3

PL5 8.2UH_FDV0630-8R2M=P3_3.7A_20% CHG 1 2

9

CHLIM

BOOT

16

10

ACLIM

VDDP

15

11

VADJ

LGATE

14

12

GND

PGND

13

2

DH_CHG PR78 0_0603_5% BST_CHG 1

2

PC65 0.1U_0603_25V7K BST_CHGA 2 1

2

PR81 20K_0402_1%

DL_CHG

4

PD14 RB751V-40TE17_SOD323-2

6251VDDP

26251VDD

1

2

17

1

PC54 2200P_0402_25V7K 2 1

1 1

2 1

PC209 1000P_0402_25V8J 2 1

PR223 14.3K_0402_1%

2

PQ21 AON7408L_DFN8-5

UGATE

2

PQ19 AON7408L_DFN8-5

4

3 2 1

VREF

1

.1U_0402_16V7K PR79 38.3K_0402_1% 6251VREF 1 6251aclim 2

8

2 PACIN G @ PQ18 2N7002W -T/R7_SOT323-3

1

PR82 4.7_0603_5% PC70 4.7U_0603_6.3V6K

BATT+

PR74 0.05_1206_1% 4

2

3 PC68 10U_1206_25V6M 2 1

ICOMP

S

3

5

CSOP

PR84 0_0402_5% 1

D

PC67 10U_1206_25V6M 2 1

21

PC58 0.1U_0603_25V7K 2 1

CSOP

Vin1

1

CELLS

CSON

PR76 4.7_1206_5%

4

@

2

22

1

CSON

5

EN

3 2 1

3

5

23

PC53 4.7U_0805_25V6-K 2 1

1 2 ACSET ACPRN

VIN

@ PD13 1SS355TE-17_SOD323-2 2 1 2

1

PC57 ACPRN 0.22U_0603_25V7K PR68 20_0402_5% 1 2 PC59 0.047U_0402_16V7K 1 2 PR69 20_0402_5% 2 1 PR70 20_0402_5% PC62 0.1U_0603_25V7K 1 2 PR72 2_0402_5% LX_CHG 2

2

2

PR64 @ 200K_0402_1% 1 2

PC66 680P_0402_50V7K

3

6251VREF

PC64 1 2

PR80 100K_0402_1%

2

DCIN

24

2

IREF

ADP_I

DCIN

1

VIN

@ PD10 1SS355TE-17_SOD323-2 ACOFF 1 2

PQ16 DTC115EUA_SC70-3

1

ACOFF

PR73 100_0402_1% 1 2

1 2 PC63 @ 100P_0402_50V8J

PR77 62K_0402_1% 2 1

1 ACOFF

6.81K_0402_1% 2

VDD

1

0.01U_0402_25V7K

2

(17)

1

6800P_0402_25V7K 2

S

(17)

(17)

PR71

6251_EN

2

3 PQ22 DTC115EUA_SC70-3

PC61 1 2

2N7002W -T/R7_SOT323-3

PR75 22K_0402_5% 1 2

1

PACIN

PACIN

PC60 1

D

PC69 0.01U_0402_25V7K 2 1

1

PQ20 2 G

2

2

PR66 150K_0402_1%

1

5 PR58 47K_0402_1% 1 2

PR62 10K_0402_1%

ACSETIN

1

@ PC56 .1U_0402_16V7K

2

3

PQ17 2N7002W -T/R7_SOT323-3

PU5

2 PR67

1

3

1

2 G S

2

PR65 10K_0402_5% 2 1

(17) FSTCHG

D

PD1 RB751V-40_SOD323-2 PC55 2.2U_0603_6.3V6K

PR222 10_1206_5% 2 1 1

1

ACSETIN @ PD12 1SS355TE-17_SOD323-2 1 2

PQ15 DTC115EUA_SC70-3

PR221 191K_0402_1%

VIN 6251VDD

1 2 3

CSIN CSIP

1

2 1

Vin1 2

1

1

JUMP_43X118

2

1

2

PR60 200K_0402_1%

2

3

100K_0402_1%

PR59 47K_0402_1%

2

1

PQ12 DTA144EUA_SC70-3

PC51 0.1U_0603_25V7K 2 1

3

1

2

SI7121DN-T1-GE3_POW ERPAK8-5 PQ11

PJ8 2

PC50 4.7U_0805_25V6-K 2 1

5

CHG_B+

PR57 0.05_1206_1% 4

PC165 0.1U_0603_25V7K 2 1

1

4

B340A_SMA2

B+

P3

SI7121DN-T1-GE3_POW ERPAK8-5 PQ10 1 2 3

1

1

PC52 5600P_0402_25V7K 1 2

2

1

P2 PD9

VIN

ISL6251AHAZ-T_QSOP24

Iada=0~1.58A(30W)

CP = 85%*Iada ; CP = 1.343A

CP mode Vaclim=2.39*(20K/(20K+38.3K))=0.8199V

3

(17) CALIBRATE#

PR83 15.4K_0402_1% 1 2

Vth,rise(typical) = ((191K/14.3K)+1)*1.26 2

3

= 18.89V PR85 31.6K_0402_1%

Vth,fall(typical) = ((191K/14.3K)+1)*1.26 -3.4uA*191K = 17.43V

1

Iinput=(1/0.05)((0.05*Vaclm)/2.39+0.05) where Vaclm=0.8199V, Iinput=1.343A

CC=0.3~1.76A IREF=1.62*Icharge IREF=0.486V~2.85V 3.24V==>2A

PR225 100K_0402_1%

(13,17)

D

S PQ32

1

ACPRN

CV mode

1 2

Charging Voltage (0x15)

ACIN

PR226 10K_0402_1% PACIN

3

2

BATT Type

PR224 10K_0402_1% 1 2

1

1

6251VDD

2 G

PR227 20K_0402_1% 2

SSM3K7002FU_SC70-3 4

Normal 3S LI-ON Cells

12600mV

4

12.60V

VADJ-->VREF-->4.41V

Issued Date

Vcell=(0.175*VADJ+3.99)

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification

VADJ--->Ground--->3.99V

2007/09/20

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B

C

Title

CHARGER Size Document Number Custom Date:

Rev 0.1

LA-6421P

Tuesday, June 22, 2010

Sheet D

32

of

39

5

4

3

2

1

PC202 0.22U_0603_10V7K

2VREF_51125

10

DRVH2

DRVH1

21

UG_5V

LX_3V

11

LL2

LL1

20

LX_5V

LG_3V

12

DRVL2

DRVL1

19

LG_5V

5

2

B++

PC44 150U_B2_6.3VM_R45M

1 2 2

PC43 680P_0402_50V7K

1

PR38 4.7_1206_5%

3

VL

PR231 @ 0_0402_5%

PC205 4.7U_0805_10V6K

PC204 1U_0603_10V6K 2 1

2 1

1

1

1

PQ8 AON7702L_DFN8-5

B+

2

PC164 0.1U_0603_25V7K 2 1

VCLK 18

VIN

GND

SKIPSEL

VREG5 17

16

13

2

TPS51125RGER_QFN24_4X4

+5VALWP

1 +

2

B

1

+5VALWP Ipeak=7.0A Imax=4.9A Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical) Vtrip=(10E-06 * 147K)/9-24mV=151mV Ilimit=151mV/17.9m ~151mV/14.5m x 1.2 =8.467A ~ 8.710A Iocp=Ilimit+Delta I/2 =9.384A ~ 9.627A Delta I=1.834A (Freq=245KHz)

A

2

1 PR235 40.2K_0402_1% 2

5

3

2

PR234 100K_0402_1%

1

2

PL4 8.2UH_FDV0630-8R2M=P3_3.7A_20% 1 2

+3.3VALWP Ipeak=5.731A Imax=4.012A Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical) Vtrip=(10E-06 * 130K)/9-24mV=134.9mV Ilimit=134.9mV/17.9m ~134.9mV/14.5m x 1.2 =7.536A ~ 7.752A Iocp=Ilimit+Delta I/2 =8.081A ~ 8.297A Delta I=1.090A (Freq=305KHz)

1

@ PC207 0.01U_0402_16V7K

1

3 2 1

UG_3V

PQ6 AON7408L_DFN8-5

4

2N7002W -T/R7_SOT323-3

(31) MAINPWON VS

PC34 2200P_0402_50V7K 2 1

PR40 PC41 0_0603_5% .1U_0402_16V7K BST_5V 1 2 1 2

PQ34

PR233 100K_0402_1%

A

PC33 4.7U_0805_25V6-K 2 1

22

1 1

3

2

S

2 G

S

VL

3

1 2 G

2N7002W -T/R7_SOT323-3

PC32 4.7U_0805_25V6-K @ 2 1

ENTRIP1

23

VBST1

2VREF_51125 D

1

3

4

2 VFB1

VREF

VFB2

5

PGOOD

VBST2

VFB=2.0V

C

(31)

VREG3

ENTRIP2

PQ33 D

SPOK

9

2 PC206 0.1U_0603_25V7K

ENTRIP1

24

8

PR230 499K_0402_1% 1 2 PR232 100K_0402_1%

1

B

VO1

B++

BST_3V

2

PQ7 AON7702L_DFN8-5

PR229 158K_0402_1% 2

ENTRIP1

VO2

EN0

3

PC40 .1U_0402_16V7K

PR37 4.7_1206_5% 2 1 PC42 680P_0402_50V7K 2 1

2

PC39 150U_B2_6.3VM_R45M

+

PR39 2 1 2 0_0603_5%

7

15

1 2 3

1

PL3 8.2UH_FDV0630-8R2M=P3_3.7A_20% 1 2

1

P PAD

1

TONSEL

1

PU4

25

4

+3VALWP

6

PR228 143K_0402_1% 1 2

2

PC203 4.7U_0805_10V6K

5

PC30 @ 4.7U_0805_25V6-K 2 1

PC31 2200P_0402_50V7K 2 1

PQ5 AON7408L_DFN8-5

1

PR44 19.6K_0402_1% 1 2

ENTRIP2

PR43 20K_0402_1% 1 2

+3VLP PC29 4.7U_0805_25V6-K 2 1

C

PR42 30K_0402_1% 1 2

14

PL11 HCB2012KF-121T50_0805 1 2 PC163 0.1U_0603_25V7K 2 1

B+

PR41 13K_0402_1% 1 2

ENTRIP2

B++

D

2

D

PQ35 DTC115EUA_SC70-3

Compal Electronics, Inc.

Compal Secret Data

Security Classification 2007/11/12

Issued Date

Deciphered Date

2008/11/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4

3

2

Title

+5V/+3V Size Document Number Custom Date:

Rev 0.1

LA-6421P

Tuesday, June 22, 2010

Sheet 1

33

of

39

A

B

C

D

PL12 HCB2012KF-121T50_0805 1 2 PC166 0.1U_0603_25V7K 2 1

PC75 @ 4.7U_0805_25V6-K 2 1

PC73 2200P_0402_50V7K 2 1

5 PR90 1K_0402_1% 1 2

4

PR91 0_0603_5% BST_1.5V 1 2

1

PQ23 AON7408L_DFN8-5

DL_1.5V

1 2

2

PC82 4.7U_0805_10V6K

1 + 2

+1.5V

1

2

2

PR97 3.48K_0402_1% PL13 HCB2012KF-121T50_0805 1 2

PR98 300K_0402_5% 1 2

PC167 0.1U_0603_25V7K 2 1

PC85 @ 4.7U_0805_25V6-K 2 1

B+

4

PR100 0_0603_5% BST_1.05V 1 2

PQ25 AON7408L_DFN8-5 3 2 1

PR99 4.7K_0402_1% 1 2

PC84 4.7U_0805_25V6-K 2 1

5

PC83 2200P_0402_50V7K 2 1

+VCCP_B+

2 PR104 14K_0402_1%

LGATE

9

DL_1.05V

+5VALW

2 1

PGND

RT8209BGQW _W QFN14_3P5X3P5 2

8

GND 7

2

PC89 4.7U_0603_6.3V6K

1

PC92 4.7U_0805_10V6K

3

1 + 2

PC88 220U_B2_2.5VM_R15M

10

1

NC

14

11

PR102 4.7_1206_5%

PGOOD

CS VDDP

+VCCPP

2

6

LX_1.05V

1

FB

12

2

VDD

5

PHASE

PC90 680P_0603_50V7K

4

DH_1.05V

PQ26 AON7702L_DFN8-5

VOUT

13

3

3

UGATE

PL7 1UH_FDV0630-1R0M-P3_10.3A_20% 1 2

1

TON

1

+5VALW

PR103 100_0603_1% 1 2

2

PC87 0.1U_0603_25V7K BST_1.05V-1 1 2

BOOT

3

1

PU7

EN/DEM

PC86 1U_0402_6.3V6K

2

2

PR101 100K_0402_5%

15

1

1

17,22,36 SUSP#

+1.5VP

PC78 220U_B2_2.5VM_R35

9

1

PGND

LGATE

RT8209BGQW _W QFN14_3P5X3P5

8

GND 7

1 PR216 2

PR96 3.48K_0402_1% 1 2

Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m Ipeak=4.97A, Imax=3.479A, Iocp=5.964A Delta I=((19-1.8)*(1.8/19))/(2.2u*328K)=2.259A =>1/2DeltaI=1.129A Vtrip=Rtrip*10uA=8.66K*10uA=0.0866V Iocpmin=Vtrip/(Rdsonmax)+1.129 =0.0866/(0.0179)+1.129=5.967A Iocpmax=(0.0866/(0.0145*1.2))+1.129A=6.106A Iocp=5.967A~6.106A

PGOOD

10K_0402_5%

VFB=0.75V Vo=VFB*(1+PR96/PR97)=0.75*(1+3.48K/3.48K)=1.5V Fsw=328KHz

2

6

(7) +1.5V_PG 2

PC79 4.7U_0603_6.3V6K

+5VALW

2

10

2 PR95 8.66K_0402_1%

PR93 4.7_1206_5%

VDDP

LX_1.5V 1

1

15 NC

14

11

2

FB

12

CS

0.1U_0603_25V7K

PC80 680P_0603_50V7K

5

PHASE

DH_1.5V

PQ24 AON7702L_DFN8-5

VDD

13

3

VOUT

4

BOOT

3

UGATE

PL6 2.2U_FDV0630-2R2M-P3_7.2A_20% 1 2

PC76 1 2

1

PR94 100_0603_1% 1 2

TON

BST_1.5V-1

1

+5VALW

2

1

PU6

EN/DEM

PC77 1U_0402_6.3V6K

2

2

PR92 30K_0402_5%

1

1

(7,17,29) SYSON

PR89 300K_0402_5% 1 2

B+

3 2 1

1

PC74 4.7U_0805_25V6-K 2 1

1.5V_B+

1

PR105 3.48K_0402_1% 1 2

4

2

PR106 8.25K_0402_1%

VFB=0.75V Vo=VFB*(1+PR105/PR106)=0.75*(1+3.48K/8.25K)=1.05V Fsw=280KHz Cout ESR=15m ohm Rdson(max)=17.9m Rdson(typical)=14.5m Ipeak=3.124A, Imax=2.187A, Iocp=3.749A Delta I=((19-1.05)*(1.05/19))/(1.5u*280K)=3.549A =>1/2DeltaI=1.774A Vtrip=Rtrip*10uA=14K*10uA=0.14V Iocpmin=Vtrip/(Rdsonmax)+1.774 =0.14/(0.0179)+1.774=9.596A Iocpmax=(0.14/(0.0145*1.2))+1.774A=9.820A Iocp=9.596A~9.820A

A

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification 2007/09/20

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

C

Title

1.5VP / +VCCPP Size Document Number Custom Date:

Rev 0.1

LA-6421P

Tuesday, June 22, 2010

Sheet D

34

of

39

5

4

3

2

1

(17) +0.89V_PG

2

+3VALW

1

@ PR215 100K_0402_1%

PR115 61.9K_0402_1%

1 2

2 SY8033BDBC_DFN10_3X3

Ipeak=2.64A, Imax=1.848A

PC208 22U_0805_6.3VAM

@

FB_SY8033B

1

1 PR114 30.1K_0402_1%

PC98 22U_0805_6.3VAM

LX_SY8033B

1

2

PR125 @ 47K_0402_5%

6

+0.89VP PC100 68P_0402_50V8J 2 1

NC

TP

7

11

EN_SY8033B

1

2

PC96 0.1U_0402_10V7K

1

PR108 200K_0402_5%

2

(17,29,34) SUSP#

FB

2

EN

LX_SY8033B

1

5

3

VFB=0.6V Vo=VFB*(1+PR114/PR115)=0.6*(1+30.1K/61.9)=0.89V

2

SVIN

2

LX

1

8

LX

PR107 4.7_1206_5%

4

PVIN

2

1

PVIN

9

2

PC99 22U_0805_6.3VAM

10

1

1

2

1

PC81 680P_0603_50V7K

2

JUMP_43X79

NC

2

PL8 1UH_FDV0630-1R0M-P3_10.3A_20% 1 2

1

+5VALW

D

PU8

PJ6

PG

D

C

C

FB_1.8V

2

SY8033BDBC_DFN10_3X3

PR120 61.9K_0402_1%

1

2

1

1 1

2

PR119 @ 47K_0402_5%

Ipeak=0.318A, Imax=0.223A

2

@

VFB=0.6V Vo=VFB*(1+PR118/PR120)=0.6*(1+124K/61.9)=1.8V

PC210 22U_0805_6.3VAM

PR118 124K_0402_1%

1

6

2

NC

TP

PR117 158K_0402_1%

7

11

EN_1.8V

1

2

PC109 0.1U_0402_10V7K

1

2

(17,29,34) SUSP#

FB

+1.8VP

PC108 22U_0805_6.3VAM

EN

LX_1.8V

PC107 22P_0402_50V8J 2 1

5

3

1

SVIN

2

LX

2

8

LX

1

PVIN

PR110 4.7_1206_5%

1

PVIN

9

2

PC106 22U_0805_6.3VAM

10

2

1

PC91 680P_0603_50V7K

1

NC

2

JUMP_43X79

PL14 1.1UH_LFA915AY-H-1R1M=P3_4.07A_20% 1 2

1

2

PG

+3VALW

4

PU10

PJ7

+1.5V

B

B

6

NC

5

3

VREF

NC

7

4

VOUT

NC

8

TP

9

+3VALW 1

VCNTL

GND

PC111 1U_0603_6.3V6M

2

2

PR121 1K_0402_1%

1

PC110 4.7U_0805_6.3V6K

VIN

2 1

2

PU11 1

1 2

PC199 .1U_0402_16V7K

2

1

+0.75VS PC114 10U_0805_6.3V6M

2

3

PR123 1K_0402_1% S 2N7002W -T/R7_SOT323-3

PC112 .1U_0402_16V7K 2 1

D

2

PC113 .1U_0402_16V7K

PQ29 2 G

1

PR122 0_0402_5% 1 2 1

(29) SUSP

1

APL5336KAI-TRL SOP

Ipeak=1A, Imax=0.7A

A

A

2007/09/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5

4

3

2

Title

+0.89VP/+1.8VP/+0.75VS Size Document Number Custom Date:

Rev 0.1

LA-6421P

Tuesday, June 22, 2010

Sheet 1

35

of

39

A

B

C

D

E

F

G

H

(5)

(5)

(5)

(5)

(5)

CPU_VID6

CPU_VID5

CPU_VID4

CPU_VID3

CPU_VID2

CPU_VID1

VR_ON (17)

CPU_VID0

(5)

1

(5)

1

1

+3VS

2

1 2

1 2

PC147 2200P_0402_50V7K

1 2

PC116 4.7U_0805_25V6-K

1 2 5

PC148 0.1U_0402_25V6

+CPU_COREP

3211_DRVL

2

+CPU_CORE

3

PR124 4.7_1206_5%

1

LL=5.9m ohm OCP=7.85A VID:0.75V~1.1V Io(max)=6.04A

2

PC186 2.2U_0603_10V6K

18

2

1

17 33

PQ31 AON7702L_DFN8-5

PC115 680P_0603_50V7K

PH4 100K_0402_1%_NCP15WF104F03RC 1

2 3

Place RTH1 close to inductor on the same layer

1

PC190 220P_0402_50V7K

PR217 75K_0402_1% 2

2

PC189 1000P_0402_50V7K

2

1

1

PR214 499K_0402_1%

PL10 2.2U_FDV0630-2R2M-P3_7.2A_20% 1 2

2

AGND

19

+5VS

PR213 35.7K_0402_1% 2 1

1

1

PR218 309K_0402_1%

2

PC191 1000P_0402_50V7K

PQ30 AON7408L_DFN8-5

1

CSCOMP

AGND

20

2

Connect to input caps

2

1

3211_SW

B+

4

3 2 1

21

2

16

CSFB 15

22

3211_DRVH

PR206 PC183 0_0603_5% 0.22U_0603_25V7K 2CPU_BOOST-1 1 2

PC121 4.7U_0805_25V6-K

1 1

25 VID6

26 VID5

27 VID4 CSREF 14

2

1 VID6

3211_VCC

1 VID5

PR204

1 VID4

PR203

1 VID3 28 VID3 LLINE 13

23 CPU_BOOST 1

3211_RAMP-1

1

PR219 1K_0402_1% 2 1

2

(6)VCCSENSE

PR202

1 VID2

1

1

+CPU_B+

(6) VSSSENSE

PR201

1 VID1

29 RAMP

RT

12

IREF 9

PR158 0_0402_5% 2

PR150 0_0402_5%

PR210 80.6K_0402_1% 3211_IREF 1 2

2

2

3.57K_0402_1%

24

3211_CSCOMP

Avoid high dV/dt

3211_CSFB

N550@ PR209

3211_CSCOMP

3211_CSCOMP 1

N4XX@ PR209 2.37K_0402_1%

3

ILIM

PR207 28K_0402_1%

2

PC188 470P_0402_50V8J

30

PGND GPU

3211_ILIM 8 PR208 1K_0402_1%

VID2

DRVL COMP

2

11

7

PVCC

FB

3211_RT

3211_COMP 6

ADP3211AMNR2G_QFN32_5X5

3211_RAMP

1

23211_COMP-1 1

FBRTN

5

2

PC187 47P_0402_50V8J 1

VID1

SW

PC182 1U_0805_25V6K

1

2

PR199

1

DRVH CLKEN#

PR211 200K_0402_1% 1 2 3211_RPM

1

31

32 EN IMON

RPM

2

3211_FB

2

VID0

1 1 2

BST

3

PL9 HCB2012KF-121T50_0805 1

PR200 10_0603_1%

PWRGD

2

(8) CLK_ENABLE#

PC185 390P_0402_50V7K

+CPU_B+

VCC

1

4 1

+5VS

PU12

PR205 10K_0402_1% PC184 1000P_0402_50V7K

PR198

1

VID0

PR196

+3VS

3211_EN

2

10

VGATE

PR212 274K_0402_1% 1 2

(5,8,13,17)

PR195 0_0402_5% 2 13211_PWRGD

PR197

2

2 0_0402_5% 2 0_0402_5% 2 0_0402_5% 2 0_0402_5% 2 0_0402_5% 2 0_0402_5% 2 0_0402_5% 2 0_0402_5%

PR194 4.7K_0402_1%

PC192 1000P_0402_50V7K

Shortest the net trace

4

4

2007/09/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2008/09/20

Title

+CPU_CORE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size C Date:

A

B

C

D

E

F

G

Document Number

Rev 0.1

LA-6421P Tuesday, June 22, 2010

Sheet

36 H

of

39

5

4

3

2

Version change list (P.I.R. List) Item

1

Page 1 of 1 for PWR

Fixed Issue

Reason for change

Rev.

PG#

Modify List

Date

Phase

1

Change power solution

For design change

0.1

34

Change PU7 from SA000031D00(S IC RT8209BGQW WQFN 14P PWM) to SA00003RU00(S IC SY8033BDBC DFN 10P SINGLE BUCK)

2010.5.03

DVT

2

Change PU8 SY8033B Pin1 net

For design change

0.1

34

Change PU8 SY8033B Pin1 connect Pin2 & Pin3

2010.5.03

DVT

34

Change PC100 NPO 0402)

2010.5.03

DVT

Change PR105 from SD034100200(S RES 1/16W 10K +-1% 0402 ) to SD034100280 (S RES 1/16W 10K +-1% 0402 )

2010.5.13

DVT

2010.6.2

PVT

2010.6.2

PVT

2010.6.8

PVT

2010.6.10

PVT

2010.6.10

PVT

D

3 4 5

Change PC100

For design change

0.1

Change PR105

For design change

0.1

32

Change PC30 & PC32 to non-pop

For cost down plan

0.1

33

D

to SE071680J80 (S CER CAP 68P 50V J

Change PL3,PL4,PL5 from SH00000JI00 to SH00000BS00 Change PL6,PL10 from SH00000FD10 to SH000000700

6

Change PL3,PL4,PL5,PL6,PL7,PL8, PL10,PL14

For TMP choke shortage issue

7

Change power solution

For design change

0.1

34

For cost down plan

0.1

33

Design change for N550 CPU

0.1

32

0.1

Change PL7,PL8 from SH00000J300 to SH000007N00 Change PL14 from SH00000IS00 to SH00000HY00

C

8

9

Change PD10.PD13.PC58.PR64. PQ18 to non-pop

Change PU7 fromSA00003RU00(S IC SY8033BDBC DFN 10P SINGLE BUCK) to SA000031D00(S IC RT8209BGQW WQFN 14P PWM)

C

Change PR84 to pop

Modify CPU CORE OCP for N550

Add PR209 = SD034357180 (3.57K_0402_1%) @N550 PR209 = SD034357180 (2.37K_0402_1%) @N4XX series

10 11 B

12

B

13 14 15 16 17 18 19 A

A

20 21

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification 2007/09/20

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5

4

3

2

Title

PIR (PWR) Size Document Number Custom Date:

Rev 0.1

LA-6421P

Tuesday, June 22, 2010

Sheet 1

37

of

39

5

4

3

2

Version change list (P.I.R. List) Item

1

Page 1 of 1 for PWR

Fixed Issue

Reason for change

Rev.

PG#

Modify List

Date

Phase

D

D

1 2 3 4 5 6 7 C

8

C

9 10 11 12 13 14 B

15

B

16 17 18 19 20 21 22 A

A

23

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification 2007/09/20

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5

4

3

2

Title

PIR (PWR) Size Document Number Custom Date:

Rev 0.1

LA-6421P

Tuesday, June 22, 2010

Sheet 1

38

of

39

5

4

. P06 - Add C1217, C1218 for +0.89V . P08 - Add R1442, R1443 . P09 - Add R1444, R1445 for DMIC . P10 - L12, L14, L15 change to SM010000200 . P23 - Add JP24 for cardreader connector

D

3

2

1

. P04 - Change C239 BOM structure to 3G@ . P17 - Change C528, C530, C531 BOM structure to 3G@

D

. P27 - Add R1448, R1449, R1450,R1451,R1452 JP22 change to SP02000H500

. P10 - Change L12. L14, L15 to SM01000C600 . P26 - Add R1453 . P21 - Change Y6 to SJ100005900 . P25 - Change Y5 to SJ100003300 Change C847,C865,C870,C873,C875,C876 SE000000K80 . P13 - Change X1,Y3,Y7 to SJ132P7KW10 . P22 - Change U26 to SA00001N000 . P29 - Change Q6,Q8,Q10,Q12,Q14,Q17,Q24,Q28 to SB00000DH00 Change C176,C219,C230,C395 to SE080105K80 . P07 - Change C116,C141 to SE076104K80

. P06 - Del C1218 2010/04/14 . P08 - Del C1219, R1442 change Y1 to SJ100009H00 . P27 - Add TPM@ GSEN@ for PAV70 C

C

. P04 - R354, R347, R348 nu-mount . P13 - Change R152 to SD034226A80(22.6ohm_0402) . P13 - Change R241 to SD028100280(10Kohm_0402) . P13 - R1376, R1377 nu-mount . P16 - Add JBATT1 CONN. . P17 - Change U76 to SA00001V400 . P17 - Change R1292 to SD028820180

. P16 - Change JBATT1 NET to +RTCBATT1 . P27 - Add J15, J16

. P10 - Change L12, L14 and L15 footprint . P27 - Del J15, J16 ; Add R1457, R1458 . P27 - U81.15 connect to GND

B

. P04 - Change . P08 - Change . P08 - Change . P22 - Change

U71 to SA00003WBA0(N475@) and C161, C164 to SE071330J80(33P C388 to SE071100J80(10P 50V J C473 to SE107475K80(4.7U 6.3V

SA00003WAB0(N455@) 50V J NPO 0402) NPO 0402) K X5R 0603)

B

. P13 - Add NET: EC_CLK . P17 - Add R1459, R1460 for Reserve EC_CLK . P17 - Change U6.36 NET to PWR_LED1# . P18 - Change NET from PWR_LED# to PWR_LED1#

. P06 - Change C239 footprint to 0805 size . P17 - Del JP23 . P26 - Change R1325 to 100k-ohm

A

. P04 - Change . P09 - Change . P15 - Change . P17 - Change . P10 - Change . P22 - Change . P23 - Change

C311 BOM configure to un-mount C1109, C1111, C1112, C1156 BOM configure to 3G@ C1163~C1166, C504~C508, C850 BOM configure to MCP@ C528, C530, C531 BOM configure to un-mount D17, D18 BOM configure to un-mount D22 BOM configure to un-mount D44, D45 BOM configure to un-mount

A

Title

Size Document Number CustomLA-6421P Date: 5

4

3

2

Monday, June 28, 2010

Rev 0.1 Sheet 1

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