• Author / Uploaded
• Airton Sousa

Citation preview

5

4

INDEX PAGE#

3

2

1

02

Power Sequence DESCRIPTION

NOTE AC IN

1

BLOCK DIAGRAM

2

SYSTEM INFORMATION

3

ONTARIO MEM & PCIE I/F(1/3)

4

ONTATIO DISPLAY/CLK/MI(2/3)

5

ONTARIO POWER & DECOUP(3/3)

6

DDR3 SO-DIMM (STD)

7

DDR3 SO-DIMM (STD)

Hudson M1 SM BUS 3V/5VPCU

8

08 -- FCH 1/5(GPIO/USB/AZ)

9

09 -- FCH 2/5(ACPI/PCI/CLK)

10

10 -- FCH 3/5(SATA/VGA/GND/SPI)

11

11 -- FCH 4/5(POWER)

12

12 -- FCH 5/5(Strap/PWRGD)

13

13-- CRT/LVDS&CCD

14

14 -- HDMI_CONN

15

15 -- CardReader AU6435-GDL

16

16 -- LAN AR8151

17

17 -- MINI PCIE

18

18 -- SATA-HDD/ODD

19

19--Codec(CX20584-21Z)

20

20--AUDIO-JACK/MDC/MIC

21

21 -- INT&EXT USB/BT

22

22 -- LED/ EMI/ Screw Hole& Nut

23

23 -- KB/TP/FAN

SB820 SMBUS

Pin NO.

PCLK_SMB

AD22

PDAT_SMB

AE22

SMBUS Function Define

NBSWON#

D

DNBSWON#

D

DDR / RFID

(+3V) S5_ON/S5 RSMRST#

SB_SMBCLK1

F5

SB_SMBDATA1

F4

not used

(+3V_S5)

PCIE_WAKE#

SB_SCLK2

D25

SB_SDATA2

F23

not used

(+3V_S5)

SUSC SUSB

SB_SCLK3

B26

SB_SDATA3

E26

not used

(+3V_S5) SUSON MAINON

SB_SCLK3

B26

SB_SDATA3

E26

not used

(+3V_S5)

VR_ON

C

B

C

24

24 -- NPCE885/FLASH

25

25 -- NPCE895L

26

26 -- Charger (BQ24707A)

27

27 -- SYSTEM 5V/3V (RT8223M)

28

28 -- CPU_CORE_Brazos (OZ8380)

29

29 -- +1.1V_S5(TPS51211)

30

30 -- +1.05V(TPS51211)

31

31 -- DDR 1.5V(TPS51216)

32

32 -- +1.8V/Discharge /Thermal

33

33--CHANGE LIST

CPU_CORE

KBC(EC) SM BUS VRM_PWRGD KBC SMBUS

Pin NO.

MBCLK

110

MBDATA

111

SMBUS Function Define

HWPG ECPWROK

Battery

(+3VPCU) SB_PWRGD_IN CPU RESET

MBCLK_THRM

115

MBDATA_THRM

116

Thermal

(+3VPCU)

CPU POWER OK

B

A

A

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

Date:

Thursday, February 23, 2012

Rev 1A

System Information 5

4

3

2

1

Sheet

2

of

32

2

3

4

5

M_A_DQ[0..63]

6

{6,7}

{6,7} M_A_BS[2..0]

M_ADD0 M_ADD1

M_DATA0

ONTARIO (2.0)

M_DATA1

PART 1 OF 5

M_ADD2

M_DATA2

M_ADD3

M_DATA3

M_ADD4

M_DATA4

M_ADD5

M_DATA5

M_ADD6

M_DATA6

M_ADD7

M_DATA7

M_A_BS0 R18 M_A_BS1 T18 M_A_BS2 F16

M_ADD9

M_DATA8

M_ADD10

M_DATA9

M_ADD11

M_DATA10

M_ADD12

M_DATA11

M_ADD13

M_DATA12

M_ADD14

M_DATA13

M_ADD15

M_DATA14

D15 B19 D21 H22 P23 V23 AB20 AA16

M_BANK1

M_DATA16

M_BANK2

M_DATA17

M_DM0

M_DATA19

M_DM1

M_DATA20

M_DM2

M_DATA21

M_DM3

M_DATA22

M_DM4

M_DATA23

M_DM6

M_DATA24

M_DM7

M_DATA25

M_A_DQSP0 M_A_DQSN0 M_A_DQSP1 M_A_DQSN1 M_A_DQSP2 M_A_DQSN2 M_A_DQSP3 M_A_DQSN3 M_A_DQSP4 M_A_DQSN4 M_A_DQSP5 M_A_DQSN5 M_A_DQSP6 M_A_DQSN6 M_A_DQSP7 M_A_DQSN7

A16 B16 B20 A20 E23 E22 J22 J23 R22 P22 W22 V22 AC20 AC21 AB16 AC16

{6} {6} {6} {6} {7} {7} {7} {7}

M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1 M_A_CLKP2 M_A_CLKN2 M_A_CLKP3 M_A_CLKN3

M17 M16 M19 M18 N18 N19 L18 L17

M_DQS_H0

M_DATA27

M_DQS_L0

M_DATA28

M_DQS_H1

M_DATA29

M_DQS_L1

M_DATA30

M_DQS_H2

M_DATA31

M_DQS_L2 M_DQS_H3 M_DQS_L3 M_DQS_H4 M_DQS_L4 M_DQS_H5 M_DQS_L5

MEMORY I/F

{6,7} {6,7} {6,7} {6,7} {6,7} {6,7} {6,7} {6,7} {6,7} {6,7} {6,7} {6,7} {6,7} {6,7} {6,7} {6,7}

M_DATA32 M_DATA33 M_DATA34 M_DATA35 M_DATA36 M_DATA37

M_DQS_H6

M_DATA38

M_DQS_L6

M_DATA39

M_DQS_L7

M_DATA40

M_CLK_H0

M_DATA42

M_CLK_L0

M_DATA43

M_CLK_H1

M_DATA44

M_CLK_L1

M_DATA45

M_CLK_H2

M_DATA46

M_CLK_L2

M_DATA47

M_A_EVENT#

L23 N17

M_CLK_L3

M_DATA48

M_RESET_L

M_DATA50

M_EVENT_L

M_DATA51 M_DATA52 M_DATA53

M_A_CKE0 M_A_CKE1

{6,7} M_A_CKE0 {6,7} M_A_CKE1

F15 E15

M_CKE0

M_DATA54

M_CKE1

M_DATA55 M_DATA56 M_DATA57

{6} {6} {7} {7}

M_A_ODT0 M_A_ODT1 M_A_ODT2 M_A_ODT3

W19 V15 U19 W15

{6} {6} {7} {7}

M_A_CS#0 M_A_CS#1 M_A_CS#2 M_A_CS#3

T17 W16 U17 V16

M0_CS_L0

{6,7} M_A_RAS# {6,7} M_A_CAS# {6,7} M_A_WE#

U18 V19 V17

M_RAS_L

M0_ODT0

M_DATA58

M0_ODT1

M_DATA59

M1_ODT0

M_DATA60

M1_ODT1

M_DATA61 M_DATA62

D

M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23

H21 H23 K22 K21 G23 H20 K20 K23

M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31

N23 P21 T20 T23 M20 P20 R23 T22

M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39

V20 V21 Y23 Y22 T21 U23 W23 Y21

M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47

{16} PCIE_RXP0_LAN {16} PCIE_RXN0_LAN

AA6 Y6

P_GPP_RXP0

P_GPP_TXP0

P_GPP_RXN0

P_GPP_TXN0

{17} PCIE_RXP1 {17} PCIE_RXN1

AB4 AC4

P_GPP_RXP1 P_GPP_RXN1

P_GPP_TXN1

AA1 AA2

P_GPP_RXP2

P_GPP_TXP2

P_GPP_RXN2

P_GPP_TXN2

Y4 Y3

P_GPP_RXP3

VDD_10

R335

2K/F_4 ON_ZVDD

Y14

ONTARIO (2.0) PART 2 OF 5

P_GPP_TXP1

P_GPP_RXN3

P_GPP_TXP3 P_GPP_TXN3

P_ZVDD_10

P_ZVSS

{9} {9}

UMI_RXP0 UMI_RXN0

AA12 Y12

P_UMI_RXP0

P_UMI_TXP0

P_UMI_RXN0

P_UMI_TXN0

{9} {9}

UMI_RXP1 UMI_RXN1

AA10 Y10

P_UMI_RXP1

P_UMI_TXP1

P_UMI_RXN1

P_UMI_TXN1

{9} {9}

UMI_RXP2 UMI_RXN2

AB10 AC10

P_UMI_RXP2

UMI_RXP3 UMI_RXN3

AC7 AB7

P_UMI_RXP3

{9} {9}

P_UMI_RXN2

P_UMI_TXP2 P_UMI_TXN2 P_UMI_TXP3

P_UMI_RXN3

P_UMI_TXN3

AB6 PCIE_TXP0_LAN_C AC6 PCIE_TXN0_LAN_C

C361 C362

0.1u/10V_4 0.1u/10V_4

PCIE_TXP0_LAN PCIE_TXN0_LAN

AB3 PCIE_TXP1_C AC3 PCIE_TXN1_C

C354 C355

0.1u/10V_4 0.1u/10V_4

PCIE_TXP1 {17} PCIE_TXN1 {17}

M_DATA63

{16} LAN {16} WLAN

Y1 Y2 V3 V4 AA14 ON_ZVSS

R345

1.27K/F_4

AB12 UMI_TXP0_C C386 AC12 UMI_TXN0_C

0.1u/10V_4 C387

0.1u/10V_4

UMI_TXP0 {9} UMI_TXN0 {9}

AC11 UMI_TXP1_C C380 AB11 UMI_TXN1_C

0.1u/10V_4 C384

0.1u/10V_4

UMI_TXP1 {9} UMI_TXN1 {9}

AA8 UMI_TXP2_C C373 UMI_TXN2_C Y8

0.1u/10V_4 C376

0.1u/10V_4

UMI_TXP2 {9} UMI_TXN2 {9}

AB8 UMI_TXP3_C C366 AC8 UMI_TXN3_C

0.1u/10V_4 C371

0.1u/10V_4

UMI_TXP3 {9} UMI_TXN3 {9}

B

SP@FT1_ONTARIO

+M_VREF

+1.5VSUS

R368 1K/F_4

R372

+1.5VSUS

R369

+1.5VSUS

*2.2K_4 *1K/F_4

M_CLK_H3 M_DATA49

{6,7} M_A_RST# {6,7} M_A_EVENT#

C23 D23 F23 F22 C22 D22 F20 F21

A

U16A

M_DQS_H7 M_DATA41

C

M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15

M_DM5

M_DATA26

B

C18 A19 B21 D20 A18 B18 A21 C20

03 This page is different AMD Nile

M_BANK0

M_DATA18

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7

M_ADD8

M_DATA15

{6,7} M_A_DM[7..0]

B14 A15 A17 D18 A14 C14 C16 D16

PCIE I/F

A

R17 H19 J17 H18 H17 G17 H15 G18 F19 E19 T19 F17 E18 W17 E16 G15

UMI I/F

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

8

+1.5VSUS {4,5,6,7,10,11,23,30} VDD_10 {5}

U16E

{6,7} M_A_A[15:0]

7

2

1

Y20 M_A_DQ48 AB22 M_A_DQ49 AC19 M_A_DQ50 AA18 M_A_DQ51 AA23 M_A_DQ52 AA20 M_A_DQ53 AB19 M_A_DQ54 Y18 M_A_DQ55

M_A_EVENT# R367 1K/F_4

AC17 M_A_DQ56 Y16 M_A_DQ57 AB14 M_A_DQ58 AC14 M_A_DQ59 AC18 M_A_DQ60 AB18 M_A_DQ61 AB15 M_A_DQ62 AC15 M_A_DQ63

C404

C403

0.1u/10V_4

1000p/50V_4

1

Q20 *MMBT3904 R370 3

*0_4

APU_MEMHOT#

C

Brazos APU B0 CKE Race condition issue workaround : a resistor of 68 ohms between M_CKE [ 1:0 ] and ground eliminates the floating signal . M_A_CKE0 M_A_CKE1

M0_CS_L1 M1_CS_L0 M1_CS_L1

M_VREF

M23

M_ZVDDIO_MEM_S

M22

R113 *68_4

+M_VREF

R125 *68_4

M_CAS_L M_WE_L

SP@FT1_ONTARIO

39.2/F_4

R366

+1.5VSUS

D

?

P/N AJ01200TT00 AJ01200TT01 AJ01800VT00 AJ01800VT01

Item Description CPU(413P)EM1200GBB22GV 1.4G(BGA) CPU(413P)EM1200GBB22GV 1.4G(BGA)STN BSQ CPU(413P)EM1800GBB22GV 1.7G(BGA) CPU(413P)EM1800GBB22GV 1.7G(BGA)STN BSQ

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

ONTARIO MEM & PCIE I/F(1/3) Date: 1

{8}

2

3

4

5

6

Thursday, February 23, 2012 7

Sheet

3

of 8

32

Rev 1A

1

+1.8V

+1.8V +3V R208 R207

1K/F_4 1K/F_4

R199

04

{5,23,31} {5,6,7,8,9,10,11,12,13,14,15,17,18,19,20,22,23,24,26,27,28,29,30,31}

APU_SVC APU_SVD

300_4

LDT_RST#

300_4

APU_PWRGD

U16B

ANALOG/DISPLAY/MISC

INT_CRT_RED R338 INT_CRT_GRE R339 INT_CRT_BLU R343

H_PROCHOT#

150/F_4 150/F_4 150/F_4

+3V [email protected]/F_4 [email protected]/F_4

R314 R304

INT_EDIDCLK INT_EDIDDATA

C372

0.1u/10V_4

C378

{14} TX0_HDMI+ {14} TX0_HDMI-

0.1u/10V_4

C381

{14} {14}

0.1u/10V_4

C385

0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

TXC_HDMI+ TXC_HDMI-

C367 C375 C379

PEG_HDMI_TXDP2 PEG_HDMI_TXDN2

A8 B8

TDP1_TXP0

PEG_HDMI_TXDP1 PEG_HDMI_TXDN1

B9 A9

TDP1_TXP1 TDP1_TXN1

PEG_HDMI_TXDP0 D10 PEG_HDMI_TXDN0 C10

C382

PEG_HDMI_TXCP PEG_HDMI_TXCN

DP_ZVSS

H3

DP_BLON

G2 H2 H1

TDP1_TXP2 TDP1_TXN2

A10 B10

TDP1_TXP3

DP_DIGON DP_VARY_BL

TDP1_TXN3

TDP1_HPD

C1

INT_HDMI_HPD

A3 B3

INT_EDIDCLK {13} INT_EDIDDATA {13}

LTDP0_TXN0

LTDP0_AUXN

{13} INT_TXLOUTP1 {13} INT_TXLOUTN1

D6 C6

LTDP0_TXP1

LTDP0_HPD

D3

{13} INT_TXLOUTP0 {13} INT_TXLOUTN0

A6 B6

LTDP0_TXP2

{13} INT_TXLCLKP {13} INT_TXLCLKN

D8 C8

LTDP0_TXP3

{9} {9}

CLK_APU_P CLK_APU_N

V2 V1

CLKIN_H

{9} {9}

CLK_DP_P CLK_DP_N

D2 D1

DISP_CLKIN_H

LTDP0_TXN2

DAC_RED DAC_REDB DAC_GREEN DAC_GREENB DAC_BLUE

LTDP0_TXN3

DAC_BLUEB

CLKIN_L

DISP_CLKIN_L

APU_SVC APU_SVD

J1 J2

SVD

APU_SIC APU_SID

P3 P4

SID

DAC_HSYNC DAC_VSYNC DAC_SCL DAC_SDA

SVC

DAC_ZVSS

SER

TEST4 SIC

TEST5 TEST6 TEST14

R255 R297

*Short_4 LDT_RST#_R *Short_4 APU_PWRGD_R

T3 T4

RESET_L

TEST15

PWROK

TEST16

H_PROCHOT# APU_THERMTRIP# APU_ALERT#

{9,24} H_PROCHOT#

U1 U2 T2

PROCHOT_L THERMTRIP_L

TEST18 TEST19

ALERT_L

TEST25_H

SB_SCLK3

R37

*0_4

R43

*Short_4

3

1

Q6 {24} APU_SIC_EC

*2N7002K

R42

*Short_4

APU_TDI

TDI

APU_TDO

TDO

APU_TCK

TEST28_L

TCK

TEST31

TMS

APU_TMS

APU_TRST#

TRST_L

DBRDY

TEST25_L TEST28_H

TEST33_H

JTAG

{8}

N2 N1 P1 P2 M4 M3 M1

APU_SIC

TEST

2

R44 1K/F_4

CTRL

TEST17

DBRDY

TEST33_L TEST34_H

DBREQ_L

TEST34_L TEST35

+3V APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# DBRDY DBREQ#

2

R45 1K/F_4

F4 G1 F3

VDDCR_NB_SENSE

F1

VSS_SENSE

TEST36

VDDCR_CPU_SENSE

TEST37

RSVD_1

DMAACTIVE_L

RSVD_2

{8}

R35

SB_SDATA3

R41

{24} APU_SID_EC

*0_4

3

INT_eDPI_HPD

C12 D13 A12 B12 A13 B13

Q7

*2N7002K

R40

*Short_4

{14}

{13}

INT_CRT_RED {13} INT_CRT_GRE {13} INT_CRT_BLU {13}

E1 E2

INT_CRT_HSYNC INT_CRT_VSYNC

F2 D4

{13} {13}

INT_DDCCLK {13} INT_DDCDATA {13}

D12 DAC_RSET

R75

499/F_4

APU_THERMDA APU_THERMDC APU_TEST6_DIRECRACKMON APU_BP0_TSTCLK_USCLK0

R1 R2 R6 T5 E4 K4 L1 L2 M2 K1 K2 L5 M5 M21 J18 J19 U15 T15 H4 N5 R5

APU_BP3_SCANSHIFTEND_USDATA1 APU_BP2_SCANSHIFTEN_USDATA0 TEST18 TEST19

T30 T28 T2 T4 T16 T27 T31

R217 1K/F_4 R220 1K/F_4 R226 510/F_4 R209 510/F_4 APU_TEST28_H_PLLCHARZ T26 APU_TEST28_L_PLLCHARZ T3 APU_TEST31_MEM_TEST T36 APU_TEST33_H_M_CLKTST_H C187 0.1u/10V_4 R81 APU_TEST33_H_M_CLKTST_L C176 0.1u/10V_4 R76 APU_TEST34_H_TSTCLKIN_H T20 APU_TEST34_L_TSTCLKIN_L T22 APU_TEST35 R223 *1K/F_4 R210 1K_4 APU_TEST36 +1.8V APU_TEST37_GIO_TSTDTM0_CLKINIT T1

+1.8V

51/F_4 51/F_4

UNNAMED_7_CAP_I337_B

APU_FDO ON_DMAACTIVE#

K3 T1

R300

*Short_4

T29 ALLOW_LDTSTP {9}

PART 3 OF 5

R206 1K/F_4

?

APU_SID

1

INT_eDPI_HPD

ONTARIO (2.0)

RSVD_3

SP@FT1_ONTARIO VSS_SENSE R295 VDDCR_CPU_SENSE R296

*Short_4 *Short_4

R299 1K/F_4

CPU_VDD0_FB_L {27} CPU_VDD0_FB_H {27}

*Short_4

A

+1.8V

+1.8V +1.8V

0831---follow AMD request for HDMI function VDDIO_SUS_SENSE

R259

*0_4

VSS_SENSE VDDCR_NB_SENSE

R294 R293

*Short_4 *Short_4

+3V

*10K/F_4 CNTR_VREF

R215

+1.5VSUS {3,5,6,7,10,11,23,30} CPU_VDDNB_FB_L CPU_VDDNB_FB_H

{27} {27}

LDT_RST#

R262 10K/F_4

1

R202 *1K/F_4

Q12 *MMBT3904 CPU_LDT_RST_HTPA# 3

Can remove on MP------>LX

2

DIFFERENTIAL ROUTING

R291

{25,26,31} SYS_SHDN#

*Short_4

Q14 MMST3904-7-F 3

APU_THERMTRIP#

1

VID Override Circuit +1.8V +3V

R292 *10K/F_4 R47 *300_4

R258 *2.2K/F_4

2

R48 *300_4

R309

{8} FCH_THERMTRIP#

*0_4

Q15 *MMST3904-7-F 3

APU_SVC

R225

0_4

APU_SVD

R224

0_4

APU_PWRGD

R256

*0_4

CPU_SVC {27}

1

for normal operation open all switches

CPU_SVD {27} CPU_PWRGD_SVID_REG

R49 *220/F_4

R46 *220/F_4

CPU_PWRGD_SVID_REG

{27}

R257 *220/F_4

+3V

R211 10K/F_4

+1.8V

+1.8V

HDT+ Connector

2

R230

*Short_4

1

R301 *10K/F_4

R234

*0_4

Q13 *MMST3904-7-F 3

HDT+ HEADER / PLACE ON TOP

R212 1K/F_4

+3V

SML1ALERT#

1

+1.8V

APU_ALERT#

H_PROCHOT#

APU_TRST#

+1.8V

+1.8V

CN9

R231 R254 R285 R310

*Short_4 HDT_TRST# 10K_4 10K_4 10K_4

1 3 5 7 9 11 13 15 17 19

CPU_VDDIO GND GND GND CPU_TRST_L CPU_DBRDY3 CPU_DBRDY2 CPU_DBRDY1 GND CPU_VDDIO

2 4 6 CPU_TDI 8 CPU_TDO 10 CPU_PWROK_BUF CPU_RST_L_BUF 12 14 CPU_DBRDY0 16 CPU_DBREQ_L 18 CPU_PLLTEST0 20 CPU_PLLTEST1 CPU_TCK

CPU_TMS

R201 R213 R216

APU_TCK APU_TMS APU_TDI

5

{23,24} SML1ALERT#

Q11 MMST3904-7-F 3

1K/F_4 1K/F_4 1K/F_4

C350 0.1u/10V_4

U15

VCC

APU_TDO

LDT_RST#_R

1 1A

APU_PWRGD

3 2A

1Y 6

LDT_RST#_BUF

R265

1K/F_4

2Y 4

APU_PWRGD_BUF R264

1K/F_4

APU_PWRGD_BUF LDT_RST#_BUF DBRDY

R315 R219 R218

DBREQ# J108_PLLTST0 J108_PLLTST1

1K/F_4 *Short_4 *Short_4

Quanta Computer Inc.

TEST19 TEST18

GND

*SN74LVC2G07DCKR

2

0830---add circuit

2

A

HDMI_DDCCLK {14} HDMI_DDCDATA {14}

VDDIO_MEM_S_SENSE

TEST38

B4 W11 V5

INT_LVDS_BLON {13} INT_LVDS_DIGON {13} INT_LVDS_PWM {13}

100K_4

TDP1_AUXN

LTDP0_TXP0

LTDP0_TXN1

*Short_4 *Short_4 *Short_4 R205

LTDP0_AUXP

B5 A5

{9,23} LDT_RST# {9,23} APU_PWRGD

150/F_4 R237 R204 R222

B2 C2

TDP1_AUXP

{13} INT_TXLOUTP2 {13} INT_TXLOUTN2

+3V

R221

TDP1_TXN0

DP MISC

0.1u/10V_4

{14} TX1_HDMI+ {14} TX1_HDMI-

2

1K/F_4

0.1u/10V_4

{14} TX2_HDMI+ {14} TX2_HDMI-

VGA DAC

R302

APU_THERMTRIP# APU_ALERT#

DISPLAYPORT 1

1K/F_4 1K/F_4

DISPLAYPORT 0

R303 R214

CLK

R298 +3V

*HDP+

PROJECT : ZQZ Size

Document Number

Date:

Thursday, February 23, 2012

ONTATIO DISPLAY/CLK/MI(2/3) 1

Sheet

4

of

32

Rev 1A

1

+1.5VSUS {3,4,6,7,10,11,23,30} +1.05V {23,29} +1.8V {4,23,31} +3V {4,6,7,8,9,10,11,12,13,14,15,17,18,19,20,22,23,24,26,27,28,29,30,31} +VCORE {23,27} +NBCORE {27} VDD_10 {3} +VCORE

+VCORE

U16C

11A 440mil viax22 E5 E6 F5 F7 G6 G8 H5 H7 J6 J8 L7 M6 M8 N7 R8

+NBCORE

VDDCR_CPU_1

VDD_18_1

VDDCR_CPU_2

VDD_18_2

VDDCR_CPU_3

VDD_18_3

VDDCR_CPU_4

VDD_18_4

VDDCR_CPU_5

VDD_18_5

VDDCR_CPU_6

VDD_18_6

VDDCR_CPU_7

VDD_18_7

2A 80mil viax4

VDD_18

U8 W8 U6 U9 W6 T7 V7

1u/6.3V_4

R200

10u/6.3V_8

*short_8

+1.8V

0.1u/10V_4 1u/6.3V_4

C70

C71

C97

C341

C80

C79 C65

1u/6.3V_4

0.1u/10V_4

10u/6.3V_8

1u/6.3V_4 C337

VDDCR_CPU_9

C340

10u/6.3V_8

VDDCR_CPU_11

C339

10u/6.3V_8 C338

10u/6.3V_8

C75

C120 10u/6.3V_8

10u/6.3V_8

VDDCR_CPU_12

VDDAN_18_DAC

VDDCR_CPU_14

+VCORE

150mA 10mil viax1

VDDCR_CPU_13

L10

+1.8V

VDDCR_CPU_15

VDDCR_NB_1

VDD_18_DAC

W9

C58 10u/6.3V_8

C18

VDDCR_NB_2

C59 10u/6.3V_8

C19

+VCORE

C107 1u/6.3V_4

1u/6.3V_4 C87 1u/6.3V_4

VDDCR_NB_3 VDDCR_NB_4

ONTARIO (2.0)

VDDCR_NB_5

0.1u/10V_4

PART 4 OF 5

0.1u/10V_4

0.1u/10V_4

C74

1u/6.3V_4 C63

C91 1u/6.3V_4

0.1u/10V_4 C89

VDDCR_NB_6 VDDCR_NB_7

C67

+1.05V

VDDCR_NB_8 VDDCR_NB_9

T15

VDDCR_NB_10

C92

C98

C64

C66

C88

C83

C68 0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

200mA 10mil viax1

POWER

VDDCR_NB_11 VDDCR_NB_12 VDDCR_NB_13 VDDCR_NB_14 VDDCR_NB_15

VDDPL_10

VDDPL_10

U11

R325

*short_6

+NBCORE

+NBCORE

0.1u/10V_4 C364

VDDCR_NB_16

C111

C110

VDDCR_NB_17

10u/6.3V_8

VDDCR_NB_18

+1.05V

1u/6.3V_4

10u/6.3V_8

VDD_10

VDDCR_NB_19

C76

VDDCR_NB_20

5.5A 220mil viax11

VDDCR_NB_21 VDDCR_NB_22

VDD_10_1 VDD_10_2

2A 80mil viax4

VDD_10_3

G16 G19 E17 J16 L16 L19 N16 R16 R19 W18 U16

C93

VDDCR_CPU_10

BLM18PG221SN1D(220_1.4A)_6

+1.5VSUS

10u/6.3V_8

VDDCR_CPU_8

10A 400mil viax20 E8 E11 E13 F9 F12 G11 G13 H9 H12 K11 K13 L10 L12 L14 M11 M12 M13 N10 N12 N14 P11 P13

05 This page is different AMD Nile

VDDIO_MEM_S_1

VDD_10_4

U13 W13 V12 T12

10u/6.3V_8 C393

VDDIO_MEM_S_2

0.1u/10V_4 C159

C134

R347 R340

*short_8 *short_8

C144

10u/6.3V_8 C62

10u/6.3V_8

10u/6.3V_8

C129 10u/6.3V_8

C112 1u/6.3V_4

C118

1u/6.3V_4 C130 1u/6.3V_4

C90

C116 1u/6.3V_4

0.1u/10V_4 C133

C135

C132

VDDIO_MEM_S_3 VDDIO_MEM_S_4

1u/6.3V_4

C147

10u/6.3V_8

1u/6.3V_4

+NBCORE

1u/6.3V_4

VDDIO_MEM_S_5 VDDIO_MEM_S_6 VDDIO_MEM_S_7

+3V

VDDIO_MEM_S_8

0.1u/10V_4

500mA 20mil viax1

VDDIO_MEM_S_9

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4 C143

VDDIO_MEM_S_10 VDDIO_MEM_S_11

VDD_33

C114

A4

C102

C119

C113

C139

C142

C141

C122 0.1u/10V_4

0.1u/10V_4 SP@FT1_ONTARIO

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

?

C356 1u/6.3V_4 +1.5VSUS +1.5VSUS

GND

1u/6.3V_4 A

C190 C153 1u/6.3V_4

C160

C209 10u/6.3V_8

C180 1u/6.3V_4

180P/50V_4

+1.5VSUS

U16D

VSS_1

ONTARIO (2.0)

VSS_50

VSS_2

PART 5 OF 5

VSS_51

VSS_3

VSS_52

VSS_4

VSS_53

VSS_5

VSS_54

VSS_6

VSS_55

VSS_7

VSS_56

VSS_8

VSS_57

VSS_9

VSS_58

VSS_10

VSS_59

VSS_11

VSS_60

VSS_12

VSS_61

VSS_13

VSS_62

VSS_14

VSS_63

VSS_15

VSS_64

VSS_16

VSS_65

VSS_17

VSS_66

VSS_18

VSS_67

VSS_19

VSS_68

VSS_20

VSS_69

VSS_21

VSS_70

VSS_22

VSS_71

VSS_23

VSS_72

VSS_24

VSS_73

VSS_25

VSS_74

VSS_26 VSS_27 VSS_28 VSS_29

GROUND

A7 B7 B11 B17 B22 C4 D5 D7 D9 D11 D14 B15 D17 D19 E7 E9 E12 E20 F8 F11 F13 G4 G5 G7 G9 G12 G20 G22 H6 H11 H13 J4 J5 J7 J20 K10 K14 L4 L6 L8 L11 L13 L20 L22 M7 N4 N6 N8 N11

VSS_75 VSS_76 VSS_77 VSS_78

VSS_30

VSS_79

VSS_31

VSS_80

VSS_32

VSS_81

VSS_33

VSS_82

VSS_34

VSS_83

VSS_35

VSS_84

VSS_36

VSS_85

VSS_37

VSS_86

VSS_38

VSS_87

VSS_39

VSS_88

VSS_40

VSS_89

VSS_41

VSS_90

VSS_42

VSS_91

VSS_43

VSS_92

VSS_44

VSS_93

VSS_45

VSS_94

VSS_46

VSS_95

VSS_47

VSS_96

VSS_48

VSS_97

VSS_49

SP@FT1_ONTARIO

A

C210 10u/6.3V_8

VSSBG_DAC

N13 N20 N22 P10 P14 R4 R7 R20 T6 T9 T11 T13 U4 U5 U7 U12 U20 U22 V8 V9 V11 V13 W1 W2 W4 W5 W7 W12 W20 Y5 Y7 Y9 Y11 Y13 Y15 Y17 Y19 AA4 AA22 AB2 AB5 AB9 AB13 AB17 AB21 AC5 AC9 AC13 A11

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4 C208

C156 C152 180P/50V_4

C177

C157

C155

C165

C188

C181 0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

place capacitors under BGA EMC CAPS +1.5VSUS

C154 180P/50V_4

C172 180P/50V_4

VDD_18

C96 180P/50V_4

+VCORE

180P/50V_4 C69

+NBCORE

180P/50V_4 C72

VDDAN_18_DAC

C82 180P/50V_4

C106 180P/50V_4

C115 180P/50V_4

VDD_10

+1.5VSUS

C128 180P/50V_4

0.1u/10V_4 C151

VDDPL_10

C131 180P/50V_4

C109 180P/50V_4

C189 0.1u/10V_4

+3V

C351 0.1u/10V_4

?

GND GND

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

Date:

Thursday, February 23, 2012

Rev 1A

ONTARIO POWER & DECOUP(3/3) 1

Sheet

5

of

32

1

2

3

4

5

6

7

+1.5VSUS

0830--P/N and footprint are follow ZR7B

8

06

{3,4,5,7,10,11,23,30}

+0.75V_DDR_VTT {7,30} +3V {4,5,7,8,9,10,11,12,13,14,15,17,18,19,20,22,23,24,26,27,28,29,30,31}

{3,7} M_A_DQSP[7:0]

{3,7} M_A_DQSN[7:0]

SM_MEM BUS ADDRESS C

SO-DIMM0

1010 000

SO-DIMM1

1010 001

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

M_A_ODT0 M_A_ODT1

116 120

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

11 28 46 63 136 153 170 187

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186

BUS1_A2

ODT0 ODT1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

CN15B 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 +3V

199 77 122 125

R106

{3,7} M_A_EVENT# {3,7} M_A_RST#

*Short_4 MEM_A_HOT#

{7} +DDR_VREF2 {7} +DDR_VREF

+DDR_VREF C242

0.1u/10V_4

C243

1000p/50V_4

C212

0.1u/10V_4

C216

*1000p/50V_4

VDDSPD NC1 NC2 NCTEST

198 30

EVENT# RESET#

1 126

VREF_DQ VREF_CA

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43

+DDR_VREF2

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

A

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

VTT1 VTT2

203 204

B

600mA +0.75V_DDR_VTT C232

DDR3-DIMM1_H=9.2_STD

GND

{3} M_A_ODT0 {3} M_A_ODT1 {3,7} M_A_DM[0..7]

109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200

+1.5VSUS

4.7u/6.3V_6

C231

C226

0.1u/10V_4

4.7u/6.3V_6

206

PCLK_SMB PDAT_SMB

M_A_BS0 M_A_BS1 M_A_BS2 M_A_CS#0 M_A_CS#1 M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1 M_A_CKE0 M_A_CKE1 M_A_CAS# M_A_RAS# M_A_WE# DIMM0_SA0 DIMM0_SA1 PCLK_SMB PDAT_SMB

{3,7}

M_A_DQ0 M_A_DQ1 M_A_DQ7 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ2 M_A_DQ8 M_A_DQ9 M_A_DQ14 M_A_DQ11 M_A_DQ13 M_A_DQ12 M_A_DQ10 M_A_DQ15 M_A_DQ20 M_A_DQ17 M_A_DQ22 M_A_DQ23 M_A_DQ21 M_A_DQ16 M_A_DQ18 M_A_DQ19 M_A_DQ24 M_A_DQ29 M_A_DQ27 M_A_DQ26 M_A_DQ28 M_A_DQ25 M_A_DQ31 M_A_DQ30 M_A_DQ36 M_A_DQ37 M_A_DQ39 M_A_DQ34 M_A_DQ32 M_A_DQ33 M_A_DQ38 M_A_DQ35 M_A_DQ40 M_A_DQ45 M_A_DQ43 M_A_DQ42 M_A_DQ44 M_A_DQ41 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ52 M_A_DQ54 M_A_DQ50 M_A_DQ53 M_A_DQ49 M_A_DQ51 M_A_DQ55 M_A_DQ60 M_A_DQ61 M_A_DQ63 M_A_DQ62 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

PC2100 DDR3 SDRAM SO-DIMM (204P)

{7,8,17,23} {7,8,17,23}

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

GND

R89 R90 B

M_A_CS#0 M_A_CS#1 M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1 M_A_CKE0 M_A_CKE1 M_A_CAS# M_A_RAS# M_A_WE# 10K/F_4 10K/F_4

98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78

205

{3,7} M_A_BS[0..2]

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

PC2100 DDR3 SDRAM SO-DIMM (204P)

A

{3} {3} {3} {3} {3} {3} {3,7} {3,7} {3,7} {3,7} {3,7}

M_A_DQ[0..63]

CN15A

{3,7} M_A_A[0..15]

+1.5VSUS C

DDR3-DIMM1_H=9.2_STD

3mA +1.5VSUS

{7,30} +SMDDR_VREF

R152 1K/F_4

+SMDDR_VREF R150

*0_6

+DDR_VREF

+1.5VSUS C239

C222

C237

0.1u/10V_4 0.1u/10V_4

C252

C219

0.1u/10V_4

0.1u/10V_4

R146 1K/F_4

C225

C218

C233

C249

C234

C220

C254

4.7u/6.3V_6

4.7u/6.3V_6

2.2u/6.3V_6

2.2u/6.3V_6

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

0.1u/10V_4

+1.5VSUS +1.5VSUS C224

C223

C236

C238

C217

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

C241

D

C235 180P/50V_4

0.1u/10V_4

C221

C253

0.1u/10V_4

0.1u/10V_4

D

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

Date:

Thursday, February 23, 2012

Rev 1A

DDR3 SO-DIMM (STD) 1

2

3

4

5

6

7

Sheet

6 8

of

32

5

4

3

2

1

08 +3V_S5

NC,no install by default R61

*2.2K_4

FCH_TEST0

R65

*2.2K_4

FCH_TEST1

R66

*2.2K_4

FCH_TEST2

U17A

FCH_TEST0 FCH_TEST1 FCH_TEST2

+3V PCLK_SMB

2.2K_4

PDAT_SMB

R375

*10K_4

GPIO65

For Dimm, WLAN, TP

{24} SIO_A20GATE {24} SIO_RCIN# {24} SIO_EXT_SCI# {24} SIO_EXT_SMI#

SIO_RCIN# SIO_EXT_SMI#

{16} PCIE_WAKE# T18 {4} FCH_THERMTRIP# +3V_S5

C99

+3V

33P/50V_4

SYS_RST# PCIE_WAKE# GEVENT20# FCH_THERMTRIP# R358 10K/F_4 W D_PW RGD PCH_RSMRST#_R

R63 R246 R245 R38 R36

*2.2K_4 2.2K_4 2.2K_4 *10K/F_4 *10K/F_4

VGA_PD SCLK1 SDATA1 SB_SCLK3 SB_SDATA3

SPKR PCLK_SMB PDAT_SMB

{19} SPKR {6,7,17,23} PCLK_SMB {6,7,17,23} PDAT_SMB

+3V_S5 R67 R288 R55 R273

10K_4 10K_4 10K_4 10K_4

FCH_THERMTRIP# OC_1# OC_0# FCH_JTAG_TCK

SCLK1 SDATA1 T37

GPIO62 PCIE_REQ_WLAN#

T38

GPIO51 VGA_PD

{17} PCIE_REQ_WLAN# VGA_PD for power control

SPI_HOLD#

{10} SPI_HOLD# C

Integrated 8.2-kΩ PU

GPIO65

FCH_BLINK GEVENT6# GEVENT17# ODD_EJ FCH_JTAG_TDO FCH_JTAG_TCK FCH_JTAG_TDI FCH_JTAG_RST#

T17 T6 T7 +3V_S5

R242 R267

10K_4 *2.2K_4

{18} ODD_EJ

PCIE_WAKE# PWR_BTN#

T33 R289 R59

{21} OC_1# {21} OC_0#

GEVENT12# ~18# are +3V_S5

R228

HDaudio interface are +3V_S5

5 4 3 2 1

PCH_RSMRST#_R

6 7 8 9 10

*short_4 R263 R247 10K_4

USB MISC

USB_FSD0P/GPIO185 USB_FSD0N USB_HSD13P USB_HSD13N USB_HSD12P USB_HSD12N USB_HSD11P USB_HSD11N USB_HSD10P USB_HSD10N

RSMRST#

AG24 AE24 AE26 AF22 AH17 AG18 AF24 AD26 AD25 T7 R7 AG25 AG22 J2 AG26 V8 W8 Y6 V10 AA8 AF25

USB_HSD9P USB_HSD9N

CLK_REQ4#/SATA_IS0#/GPIO64 CLK_REQ3#/SATA_IS1#/GPIO63 SMARTVOLT1/SATA_IS2#/GPIO50 CLK_REQ0#/SATA_IS3#/GPIO60 SATA_IS4#/FANOUT3/GPIO55 SATA_IS5#/FANIN3/GPIO59 SPKR/GPIO66 SCL0/GPIO43 SDA0/GPIO47 SCL1/GPIO227 SDA1/GPIO228 CLK_REQ2#/FANIN4/GPIO62 CLK_REQ1#/FANOUT4/GPIO61 IR_LED#/LLB#/GPIO184 SMARTVOLT2/SHUTDOWN#/GPIO51 DDR3_RST#/GEVENT7#/VGA_PD GBE_LED0/GPIO183 SPI_HOLD#/GBE_LED1/GEVENT9# GBE_LED2/GEVENT10# GBE_STAT0/GEVENT11# CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#

M7 R8 T1 P6 F5 P5 J7 T8

USB_HSD8P USB_HSD8N USB_HSD7P USB_HSD7N

111207: Vender suggestioin 10k

USB_HSD5P USB_HSD5N USB_HSD4P USB_HSD4N USB_HSD3P USB_HSD3N USB_HSD2P USB_HSD2N

BLINK/USB_OC7#/GEVENT18# USB_OC6#/IR_TX1/GEVENT6# USB_OC5#/IR_TX0/GEVENT17# USB_OC4#/IR_RX0/GEVENT16# USB_OC3#/AC_PRES/TDO/GEVENT15# USB_OC2#/TCK/GEVENT14# USB_OC1#/TDI/GEVENT13# USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#

USB_HSD1P USB_HSD1N USB_HSD0P USB_HSD0N USBSS_CALRP USBSS_CALRN

ACZ_BCLK_R ACZ_SDOUT_R ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2_R ACZ_SDIN3_R ACZ_SYNC_R ACZ_RST#_R

AB3 AB1 AA2 Y5 Y3 Y1 AD6 AE4

AZ_BITCLK AZ_SDOUT AZ_SDIN0/GPIO167 AZ_SDIN1/GPIO168 AZ_SDIN2/GPIO169 AZ_SDIN3/GPIO170 AZ_SYNC AZ_RST#

*10KX8

K19 J19 J21

{10} BOARD_ID10 T21

USB_SS_RX3P USB_SS_RX3N USB_SS_TX2P USB_SS_TX2N USB_SS_RX2P USB_SS_RX2N

PS2_DAT/SDA4/GPIO187 PS2_CLK/CEC/SCL4/GPIO188 SPI_CS2#/GBE_STAT2/GPIO166

D21 C20 D23 C22

R229 10K_4

2 G1

1

SYS_RST# *SHORT_PAD KSO_5

+3V_S5

Provided test points from checklist R349 *10K_4 G3

2

KSO_5

1

*SHORT_PAD

PS2KB_DAT/GPIO189 PS2KB_CLK/GPIO190 PS2M_DAT/GPIO191 PS2M_CLK/GPIO192

F21 E20 F20 A22 E18 A20 J18 H18 G18 B21 K18 D19 A18 C18 B19 B17 A24 D17

USB_SS_TX1P USB_SS_TX1N USB_SS_RX1P USB_SS_RX1N

+3V_S5

B

USB_HSD6P USB_HSD6N

USB_SS_TX3P USB_SS_TX3N

Note:LLB#, WAKE# and PWR_BTN need pull up to +3VPCU only if S5+ mode is supported

{23,24} PCH_RSMRST#

*short_4 *short_4

T9 T10 V9 AE22 AG19 R9 C26 T5 U4 K1 V7 R10 AF19 U2

PCIE_REQ_LAN# BOARD_ID8 BOARD_ID9

{16} PCIE_REQ_LAN# {10} BOARD_ID8 {10} BOARD_ID9

HUDSON-M3

USB_FSD1P/GPIO186 USB_FSD1N

USB 3.0

2.2K_4

R386

USB_RCOMP

HD AUDIO

R393

USBCLK/14M_25M_48M_OSC

ACPI / WAKE UP EVENTS USB 1.1

*short_4 PWR_BTN#

PCIE_RST2#/GEVENT4# RI#/GEVENT22# SPI_CS3#/GBE_STAT1/GEVENT21# SLP_S3# SLP_S5# PWR_BTN# PWR_GOOD Part 4 of 5 TEST0 TEST1/TMS TEST2 GA20IN/GEVENT0# KBRST#/GEVENT1# PME#/GEVENT3# LPC_SMI#/GEVENT23# LPC_PD#/GEVENT5# SYS_RESET#/GEVENT19# WAKE#/GEVENT8# IR_RX1/GEVENT20# THRMTRIP#/SMBALERT#/GEVENT2# WD_PWRGD

USB 2.0

D

AB6 R2 W7 T3 W2 J4 N7

GPIO

APU_MEMHOT# GEVENT22# ODD_PLUGIN# SUSB# SUSC# DNBSWON# R239 FCH_PW RGD

{3} APU_MEMHOT# T5 {18} ODD_PLUGIN# {23,24} SUSB# {23,24} SUSC# {23,24} DNBSWON# {12} FCH_PW RGD

USB OC

remove pull hi ( chip internal have pull hi )

USB_SS_TX0P USB_SS_TX0N USB_SS_RX0P USB_SS_RX0N

KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217 KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/XDB0/GPIO223 KSO_15/XDB1/GPIO224 KSO_16/XDB2/GPIO225 KSO_17/XDB3/GPIO226

SCL2/GPIO193 SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196 EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199 EC_PWM3/EC_TIMER3/GPIO200 KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208

EMBEDDED CTRL

G8 B9

USB_RCOMP_SB

R326

11.8K/F_6

H1 H3

T8 T10

H6 H5

T32 T12

D

Note: USB P/N pairs with trace lengths up to 10"

H10 G10 K10 J12

HUB3

G12 F12 USBP10+ USBP10-

USBP10+ USBP10-

{21} {21}

C10 A10

USBP7+ USBP7-

USBP7+ USBP7-

{17} {17}

WLAN

H9 G9

USBP6+ USBP6-

USBP6+ USBP6-

{13} {13}

CCD on LVDS

A8 C8

USBP5+ USBP5-

USBP5+ USBP5-

{15} {15}

Card Reader

C6 A6

USBP3+ USBP3-

USBP3+ USBP3-

{21} {21}

C5 A5

USBP2+ USBP2-

USBP2+ USBP2-

{21} {21}

USBP0+ USBP0-

{21} {21}

K12 K13

USB2.0 co-lay USB3.0 port

B11 D11 E10 F10

HUB2

F8 E8

USB2.0 daughter C

HUB1

BT

C1 C3 E1 E3

USBP0+ USBP0-

C16 A16

USBSS_CALRP USBSS_CALRN

R329 R334

U3@1K/F_4 U3@1K/F_4

USB2.0 debug port daughter +FCH_VDD_11_SSUSB_S

A14 C14 C12 A12 D15 B15 E14 F14 F15 G15 H13 G13 J16 H16

USB3_TXP0 USB3_TXN0

J15 K15

USB3_RXP0 USB3_RXN0

H19 G19 G22 G21 E22 H22 J22 H21

SMB_EC_CLK SMB_EC_DAT

USB3_TXP0 {21} USB3_TXN0 {21} USB3_RXP0 {21} USB3_RXN0 {21} R350 R346

*0_4 *0_4

MBCLK MBDATA

EC_PWM2

USB3.0 B

MBCLK {24,25} MBDATA {24,25} SB_SCLK3 {4} SB_SDATA3 {4}

GPIO193 ~196 are +3V_S5

EC_PWM2 {12}

K21 K22 F22 F24 E24 B23 C24 F18

EC

Device

FCH

I2C_Device(S)

?

I2Ce_1(M)

I2Cf_2(M)

EEPROM

I2Ce_2(M)

To Azalia R232

33_4

ACZ_SDOUT_AUDIO

ACZ_SYNC_R

R235

33_4

ACZ_SYNC_AUDIO

33_4

ACZ_BITCLK_AUDIO

ACZ_BCLK_R

R279

A

C345

ACZ_RST#_R

R236

33_4

ACZ_SDOUT_AUDIO ACZ_SYNC_AUDIO ACZ_BITCLK_AUDIO

{19}

ACZ_SDIN0

ACZ_RESET#_AUDIO ACZ_SDIN0

ALL/S5

APU

EC will Conflict with FCH, did not mount R315&R318

ALL

APU

I2Cf_3(M)

S5

{19} {19}

*22P/50V_4

ACZ_RESET#_AUDIO

Battery

VGA Thermal

I2Ce_3(M)

ACZ_SDOUT_R

Charger

I2Cf_1(M)

Lan

WLan

S5

I2Cf_0(M)

Dimm

Clk Gen

S0

A

{19}

{19}

Quanta Computer Inc. PROJECT :ZQZ Size

Document Number

Date:

Thursday, February 23, 2012

Rev 1A

FCH 1/5(GPIO/USB/AZ) 5

4

3

2

1

Sheet

8

of

32

5

4

3

2

1

09

PCIE_CALRP PCIE_CALRN

V33 V31 W30 W32 AB26 AB27 AA24 AA23

Note: CLK_FCH_SRCP/N is 100MHZ SSC Note: CLK_DP_NSSCP/N is 100MHZ non-SSC

AA27 AA26 W27 V27 V26 W26 W24 W23

Note: CLK_PCIE_TRAVISP/N is 100MHZ non-SSC Note: CLK_APU_HCLKP/N is 100MHZ SSC Note: CLK_PCIE_VGAP/N is 100MHZ SSC Note: GPP_CLK(0:8)P/N is 100MHZ SSC capable

C

R83

+1.1V_CKVDD

Ramp 0223: Remove RP3,RP4, AddR461, R462, R463, R464

2K/F_4

CLK_CALRN

INT_CLK_FCH_SRCP INT_CLK_FCH_SRCN

TP5 TP6

CLK_DP_P CLK_DP_N

{4} CLK_DP_P {4} CLK_DP_N

AF29 AF31

R461 R462

CLK_DP_P_R CLK_DP_N_R

22_4 22_4

F27 G30 G28 R26 T26 H33 H31

CLK_APU_P CLK_APU_N

{4} CLK_APU_P {4} CLK_APU_N

R463 R464

CLK_APU_P_R CLK_APU_N_R

33_4 33_4

T24 T23 J30 K29 H27 H28

{17} CLK_PCIE_WLANP {17} CLK_PCIE_WLANN

CLK_PCIE_WLANP CLK_PCIE_WLANN

RP2

2 4

1 0X2 INT_CLK_PCIE_WLANP INT_CLK_PCIE_WLANN 3

{16} CLK_PCIE_LANP {16} CLK_PCIE_LANN

CLK_PCIE_LANP CLK_PCIE_LANN

RP7

2 4

1 0X2 INT_CLK_PCIE_LANP INT_CLK_PCIE_LANN 3

J27 K26 F33 F31 E33 E31 M23 M24

UMI_RX0P UMI_RX0N UMI_RX1P UMI_RX1N UMI_RX2P UMI_RX2N UMI_RX3P UMI_RX3N PCIE_CALRP PCIE_CALRN GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N

CLK_CALRN PCIE_RCLKP PCIE_RCLKN DISP_CLKP DISP_CLKN DISP2_CLKP DISP2_CLKN APU_CLKP APU_CLKN SLT_GFX_CLKP SLT_GFX_CLKN GPP_CLK0P GPP_CLK0N

N25 N26 R23 R24 N27 R27 C418

Card Reader

15P/50V_4C

CardReader_48M

{15} CardReader_48M

R380

22_4

CLK_48M_CARD_R

J26

PCIRST# AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31 CBE0# CBE1# CBE2# CBE3# FRAME# DEVSEL# IRDY# TRDY# PAR STOP# PERR# SERR# REQ0# REQ1#/GPIO40 REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42 GNT0# GNT1#/GPO44 GNT2#/SD_LED/GPO45 GNT3#/CLK_REQ7#/GPIO46 CLKRUN# LOCK# INTE#/GPIO32 INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35

GPP_CLK1P GPP_CLK1N

GPP_CLK3P GPP_CLK3N GPP_CLK4P GPP_CLK4N GPP_CLK5P GPP_CLK5N GPP_CLK6P GPP_CLK6N

LPCCLK0 LPCCLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0# LDRQ1#/CLK_REQ6#/GPIO49 SERIRQ/GPIO48

GPP_CLK7P GPP_CLK7N GPP_CLK8P GPP_CLK8N

DMA_ACTIVE# PROCHOT# APU_PG LDT_STP# APU_RST#

25M_X2

C33

R371 1M/F_4 25M_X2

25M_X1

32K_X2

Y3

1

25M_X2 S5 PLUS

3 C411

C410 10P/50V_4

2

4 10P/50V_4

R281

*Short_4 PCI_CLK1

PCI_CLK1

{12}

R282 R284

*Short_4 PCI_CLK3 *Short_4 PCI_CLK4

PCI_CLK3 PCI_CLK4

{12} {12}

S5_CORE_EN RTCCLK INTRUDER_ALERT# VDDBT_RTC_G

D

T14

AJ3 AL5 AG4 AL6 AH3 AJ5 AL1 AN5 AN6 AJ1 AL8 AL3 AM7 AJ6 AK7 AN8 AG9 AM11 AJ10 AL12 AK11 AN12 AG12 AE12 AC12 AE13 AF13 AH13 AH14 AD15 AC15 AE16 AN3 AJ8 AN10 AD12 AG10 AK9 AL10 AF10 AE10 AH1 AM9 AH8 AG15 AG13 AF15 AM17 AD16 AD13 AD21 AK17 AD19 AH9

B2A D4 *NGC@RB500V-40

1

R100

2

*SHORT_6

+3VPCU

D5

RTC Circuitry(RTC) +3V_RTC

NGC@BAT54C

20MIL

R102

510/F_6

+3VRTC

1

2

+VCCRTC_2

D3 *NGC@RB500V-40

20MIL C230 +3V 1U/10V_4

PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PE_PWRGD HUDSON_MEMHOT#

PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 T19

20MIL R97

{12} {12} {12} {12} {12}

R312 *2.2K_4

1K/F_4

20MIL

C

Net

GPIO

I/O Power Well

PE_PWRGD

GPIO28 DGPU_PWRGD

I

+3.3V

"0->1"

PE_GPIO0

GPIO44 DGPU_RST#

O

+3.3V

"0->1"

PE_GPIO1

GPIO45 DGPU_PWREN

O

+3.3V

"0->1"

DOS

CN14

BAT_CONN

T35

T34

CLKRUN#

CLKRUN#

{24}

AF18 AE18 AC16 AD18

LPC_CLK0_R LPC_CLK1_R

B25 D25 D27 C28 A26 A29 A31 B27 AE27 AE19

R364 R359

33_4 33_4

R362 R356

22_4 22_4

LDRQ#0 LDRQ#1

T25 T23

20120110: Change R364 from 22_4 to 33_4-->for slewrate issue 20120112: Change R359 from 22_4 to 33_4-->follow vender suggestion PCLK_DEBUG {17} CLK_PCI_775 {24}

LPC_CLK0 LPC_CLK1 LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME#

IRQ_SERIRQ

For EMI

LPC_CLK0 {12} LPC_CLK1 {12} LPC_LAD0 {17,24} LPC_LAD1 {17,24} LPC_LAD2 {17,24} LPC_LAD3 {17,24} LPC_LFRAME# {17,24}

IRQ_SERIRQ

PCLK_DEBUG

C401

*15P/50V_4C

CLK_PCI_775

C396

*15P/50V_4C

B

{24}

G25 E28 E26 G26 F26

ALLOW_LDTSTP H_PROCHOT# APU_PWRGD APU_STOP# LDT_RST#

G2

32K_X1

32K_X2

G4

32K_X2

USE GROUND GUARD FOR 32K_X1 AND 32K_X2

H7 F1 F3 E6

S5_CORE_EN RTC_CLK INTRUDER_ALERT# +3V_RTC

R313

R58 560_4

*0.1U/10V_4

*1M/F_4

C348

Y2 32.768KHZ_10

R290 20M_4

LDT_RST# {4,23}

20MIL

?

32K_X1

ALLOW_LDTSTP {4} H_PROCHOT# {4,24} APU_PWRGD {4,23} T24 C402

32K_X1 C31

AB5

PCI_CLK1_R PCI_CLK3_R PCI_CLK4_R

14M_25M_48M_OSC

25M_X1 25M_X1

AF3 AF1 AF5 AG2 AF6

GPP_CLK2P GPP_CLK2N

B

M27 M26

PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38 PCICLK4/14M_OSC/GPO39

+BAT

590/F_4 2K/F_4

Part 1 of 5

1

R378 R373

+1.1V_PCIE_VDDR

HUDSON-M3

UMI_TX0P UMI_TX0N UMI_TX1P UMI_TX1N UMI_TX2P UMI_TX2N UMI_TX3P UMI_TX3N

2

AB33 AB31 AB28 AB29 Y33 Y31 Y28 Y29

PCIE_RST# A_RST#

15P/50V_4C

1 2

UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3

UMI_TXP0 UMI_TXN0 UMI_TXP1 UMI_TXN1 UMI_TXP2 UMI_TXN2 UMI_TXP3 UMI_TXN3

AE30 AE32 AD33 AD31 AD28 AD29 AC30 AC32

B2A

4 3

UMI_RXP0_C UMI_RXN0_C UMI_RXP1_C UMI_RXN1_C UMI_RXP2_C UMI_RXN2_C UMI_RXP3_C UMI_RXN3_C

PCI CLKS

0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

AE2 AD5

PCI INTERFACE

PCIE_RST#_R A_RST#_R

LPC

C417 C416 C407 C408 C414 C415 C405 C406

33_4

APU

{3} {3} {3} {3} {3} {3} {3} {3}

UMI_RXP0 UMI_RXN0 UMI_RXP1 UMI_RXN1 UMI_RXP2 UMI_RXN2 UMI_RXP3 UMI_RXN3

UMI_RXP0 UMI_RXN0 UMI_RXP1 UMI_RXN1 UMI_RXP2 UMI_RXN2 UMI_RXP3 UMI_RXN3

U17E

R280

PCI EXPRESS INTERFACES

{3} {3} {3} {3} {3} {3} {3} {3}

180P/50V_4

CLOCK GENERATOR

C347

PCIE_RST#

{16,17} PCIE_RST# {23} A_RST#_R D

T11 RTC_CLK {12} +3V_RTC +3V_RTC

C349

18P/50V_4

S5_CORE_EN is necessary to connect enable pin of +3VPCU/+5VPCU regulator for S5+ mode implementation INTRUDER_ALERT# Left not connected (FCH has 50-kohm internal pull-up to VBAT).

C61 0.1U/10V_4

1

25MHZ

2

+3V_S5

U6 TC7SH08FU R156

PLTRST#

33_4

A_RST#_L

R158

*Short_4

A

A_RST#_R

2 4 1 C293

3

{15,17,24}

*SHORT_PAD

*0.1u/10V_4

5

C296

A

G2

180P/50V_4

{24} EC_A_RST#_L

R159

*0_4

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

Rev 1A

FCH 2/5(ACPI/PCI/CLK) Date: 5

4

3

2

Thursday, February 23, 2012 1

Sheet

9

of

32

5

4

3

2

1

10 AK19 AM19

SATA_TX0P SATA_TX0N

SATA_TXP1_C SATA_TXN1_C

AN22 AL22

SATA_TX1P SATA_TX1N

AH20 AJ20

{18} SATA_RXN1 {18} SATA_RXP1

SATA_RX1N SATA_RX1P

AJ22 AH22

SATA_RX2N SATA_RX2P

AH24 AJ24

SATA_TX3P SATA_TX3N

AN24 AL24

SATA_RX3N SATA_RX3P

AL26 AN26

SATA_TX4P SATA_TX4N

AJ26 AH26

SATA_RX4N SATA_RX4P

AN29 AL28

SATA_TX5P SATA_TX5N

AK27 AM27

SATA_RX5N SATA_RX5P

AL29 AN31

NC6 NC7 NC8 NC9

AH33 AH31

R377 R80

1K/F_4

931/F_4

+3V

R183

SATA_CALRP SATA_CALRN

10K/F_4

SATA_LED#

{22} SATA_LED#

VGA_GREEN

NC10 NC11

AJ33 AJ31

+1.1V_AVDD_SATA

SPI_DI/GPIO164 SPI_DO/GPIO163 SPI_CLK/GPIO162 SPI_CS1#/GPIO165 ROM_RST#/SPI_WP#/GPIO161 VGA_RED

AL31 AL33

PLACE SATA_CAL RES VERY CLOSE TO BALL OF HUDSON-M2/M3

GBE_COL GBE_CRS GBE_MDCK GBE_MDIO GBE_RXCLK GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0 GBE_RXCTL/RXDV GBE_RXERR GBE_TXCLK GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0 GBE_TXCTL/TXEN GBE_PHY_PD GBE_PHY_RST# GBE_PHY_INTR

SATA_TX2P SATA_TX2N

AM23 AK23

C

SD CARD

0.01U/25V_4 0.01U/25V_4

Part 2 of 5

SD_CLK/SCLK_2/GPIO73 SD_CMD/SLOAD_2/GPIO74 SD_CD#/GPIO75 SD_WP/GPIO76 SD_DATA0/SDATI_2/GPIO77 SD_DATA1/SDATO_2/GPIO78 SD_DATA2/GPIO79 SD_DATA3/GPIO80

GBE LAN

C399 C400

{18} SATA_TXP1 {18} SATA_TXN1

HUDSON-M3

SATA_RX0N SATA_RX0P

SERIAL ATA

SATA_TXP0_C SATA_TXN0_C

AL20 AN20

D

SATA ODD

0.01U/25V_4X 0.01U/25V_4

SPI ROM

C392 C394

{18} SATA_TXP0 {18} SATA_TXN0 {18} SATA_RXN0 {18} SATA_RXP0

VGA_BLUE

NC12 NC13

AF28 AF27 AD22

VGA DAC

SATA HDD/SSD

20120104: Add R449, R450, R451 Add net N30960722

U17B

PLACE SATA AC COUPLING CAPS CLOSE TO HUDSON-M2/M3

VGA_HSYNC/GPO68 VGA_VSYNC/GPO69 VGA_DDC_SDA/GPO70 VGA_DDC_SCL/GPO71

SATA_CALRP SATA_CALRN

VGA_DAC_RSET

SATA_ACT#/GPIO67

AUX_VGA_CH_P AUX_VGA_CH_N AUXCAL

AF21

SATA_X1 ML_VGA_L0P ML_VGA_L0N ML_VGA_L1P ML_VGA_L1N ML_VGA_L2P ML_VGA_L2N ML_VGA_L3P ML_VGA_L3N

Integrated Clock Mode: Leave unconnected. +3V

AG21

VGA MAINLINK

SATA_X2

R332 *10K/F_4 {18} FCH_ODD_EN

B

BOARD_ID1 FCH_ODD_EN FCH_PROCHOT#_C

AH16 AM15 AJ16

BOARD_ID2 BOARD_ID3 BOARD_ID4

AK15 AN16 AL16

BOARD_ID5 BOARD_ID6 BOARD_ID7 TEMPIN3

K6 K5 K3 M6

R60 10K_4

FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54 FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58

HW MONITOR

ML_VGA_HPD/GPIO229 VIN0/GPIO175 VIN1/GPIO176 VIN2/SDATI_1/GPIO177 VIN3/SDATO_1/GPIO178 VIN4/SLOAD_1/GPIO179 VIN5/SCLK_1/GPIO180 VIN6/GBE_STAT3/GPIO181 VIN7/GBE_LED3/GPIO182

TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173 TEMPIN3/TALERT#/GPIO174

NC1 NC2 NC3 NC4 NC5

AC4 AD3 AD9 W10 AB8 AH7 AF7 AE7 AD7 AG8 AD1 AB7 AF9 AG6 AE8 AD8 AB9 AC2 AA7 W9 V6 V5 V3 T6 V1

R451

FCH_SPI_CS0# FCH_SPI_CLK FCH_SPI_SO FCH_SPI_SI

0_4

R274 R277 R278 R275

*short_4 *short_4 *short_4 *short_4

SPI_CS SPI_SCK SPI_SDO SPI_SDI

R248

D

N30960722

33_4

FCH_SPI1_SI_R

1 6 5 2

C346 *22P/50V_4

CE# SCK SI SO

HOLD#

WP#

VSS

VDD

R203 10K_4

8 7

SPI_HOLD#

{8}

4

W25Q32BVSSIG(SOIC) C49 0.1U/10V_4

N30960722

GBE_PHY_INTR

R68

10K_4

{24} {24} {24} {24}

+3V_S5

FCH_SPI_SI FCH_SPI_SO FCH_SPI_CLK FCH_SPI_CS0# FCH_SPI_WP

TP40 TP46

M29

TP47

M28 N30

TP41 TP45

M33 N32

TP35 TP36

K31

TP34

V28 V29

TP52 TP51

U28

TP39

C29

R450

*0_4

10K_4

3

L32

N2 M3 L2 N4 P1 P3 M1 M5

R449

U14

L30

T31 T33 T29 T28 R32 R30 P29 P28

+3VPCU +3V_S5

FLASH BIOS W25Q32BVSSIG

AL14 AN14 AJ12 AH12 AK13 AM13 AH15 AJ14

R276

10K_4 FCH_SPI_WP

20120111: Connect R451 net from FCH_SPI_CS0# to SPI_CS

SPI_CS SPI_SCK SPI_SDO SPI_SDI

SPI_CS SPI_SCK SPI_SDO SPI_SDI

C

+1.5VSUS

+3V_S5

R244 *1K/F_4

R243 *1K/F_4

VIN_VDDIO

TP50 TP38 TP44 TP43 TP49 TP37 TP42 TP48

VIN_VDDR R272 *1K/F_4

R270 *1K/F_4

TP4 VIN0 VIN1 VIN2 MEM_P1V5 MEM_P1V35 VIN_VDDIO VIN_VDDR VIN7

R271 R54 R56

10K_4 10K_4 10K_4

R57

10K_4

T13 T9

AG16 AH10 A28 G27 L4

+3V

R336 R317 R330 R321 R379 R365

lvds@10K_4 10K_4 10K_4 10K_4 *10K_4 *10K_4

BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID8 BOARD_ID9

R337 R316 R333 R320 R374 R363

*eDP@10K_4 *10K_4 *10K_4 *10K_4 *10K_4 *10K_4

+3V_S5

R238 R240 R241

*10K_4 10K_4 10K_4

BOARD_ID5 BOARD_ID6 BOARD_ID7

R266 R268 R269

10K_4 *10K_4 *10K_4

R341

10K_4

BOARD_ID10

R342

*10K_4

B

?

BOARD ID SETTING BOARD_ID1

LCD

BOARD_ID2

BOARD_ID3

0

eDP

0

1

1

LVDS

1

0

1

1

{8} {8} {8} {23} {23}

For TP

BOARD_ID8 BOARD_ID9 BOARD_ID10 BOARD_ID2 BOARD_ID3

BOARD_ID8 BOARD_ID9 BOARD_ID10 BOARD_ID2 BOARD_ID3

ALPS

ELAN

Synaptics

A

A

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

Rev 1A

FCH 3/5(SATA/VGA/GND/SPI) Date: 5

4

3

2

Thursday, February 23, 2012 1

Sheet

10

of

32

4

3

2

11

PLACE ALL THE DECOUPLING CAPS ON THIS SHEET CLOSE TO SB AS POSSIBLE.

U17D

VDD-- S/B CORE power

+3.3V_FCH_R

TRACE WIDTH >=15mil

C205 2.2U/6.3V_4

C206 *0.1U/10V_4

47mA

+VDDPL_3.3V L25

+3V

H24 V22 U22 T22 L18 D7 AH29 AG28

TRACE WIDTH >=15mil +FCH_VDDPL_33_SSUSB_S +FCH_VDDPL_33_SUSB_S

HCB1608KF-221T20 C204 2.2U/6.3V_4

C203 *0.1U/10V_4

11mA 14mA 11mA 12mA

+FCH_VDDPL_33_PCIE +FCH_VDDPL_33_SATA R376 C409

+1.5VSUS

*0_4 LDO_CAP *2.2U/6.3V_6

VDDPL_33_SYS VDDPL_33_DAC VDDPL_33_ML VDDAN_33_DAC VDDPL_33_SSUSB_S VDDPL_33_USB_S VDDPL_33_PCIE VDDPL_33_SATA

M31

+FCH_VDDPL_33_SSUSB_S

L19 U3@HCB1608KF-221T20

VDDAN_11_ML_1 VDDAN_11_ML_2 VDDAN_11_ML_3 VDDAN_11_ML_4

AB10

VDDIO_33_GBE_S

C184 [email protected]/10V_4

*U2@0_4

AB11 AA11

+FCH_VDDPL_33_SUSB_S

VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2

AA9 AA10

+3V_AVDD_USB C

VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_11_SATA_8 VDDAN_11_SATA_9 VDDAN_11_SATA_10

GBE LAN

R79 C193 [email protected]/6.3V_6

VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8

VDDPL_11_DAC

Y22 V23 V24 V25

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8

LDO_CAP

V21

+3V_S5

Part 3 of 5

SERIAL ATA

L24

+3V

HCB1608KF-221T20

VDDIO_33_PCIGP_1 VDDIO_33_PCIGP_2 VDDIO_33_PCIGP_3 VDDIO_33_PCIGP_4 VDDIO_33_PCIGP_5 VDDIO_33_PCIGP_6 VDDIO_33_PCIGP_7 VDDIO_33_PCIGP_8 VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10

CORE S0

D

VDDIO_GBE_S_1 VDDIO_GBE_S_2

TRACE WIDTH >=100mil

1007mA

T14 T17 T20 U16 U18 V14 V17 V20 Y17

R74

C136 0.1U/10V_4

C158 0.1U/10V_4

C137 1U/10V_4

C127 1U/10V_4

340mA

+1.1V

CKVDD_1.1V-Internal clock Generator I/O power

+1.1V_CKVDD

H26 J25 K24 L22 M22 N21 N22 P22

*short_8

C125 10U/6.3V_8

TRACE WIDTH >=30mil

L21 HCB1608KF-181T15_1.5A C175 1U/10V_4

C197 1U/10V_4

C174 0.1U/10V_4

C196 0.1U/10V_4

+1.1V

C171 22U/6.3V_8

+1.1V_PCIE_VDDR

AB24 Y21 AE25 AD24 AB23 AA22 AF26 AG27 AA21 Y20 AB21 AB22 AC22 AC21 AA20 AA18 AB20 AC19

TRACE WIDTH >=100mil

1088mA

PCIE_VDDR--PCIE I/O power L18 HCB1608KF-181T15_1.5A

C191 0.1U/10V_4

C183 0.1U/10V_4

C195 1U/10V_4

C200 1U/10V_4

+1.1V

C198 22U/6.3V_8

+1.1V_AVDD_SATA TRACE WIDTH >=100mil

1337mA

AVDD_SATA--SATA phy power L13 HCB1608KF-181T15_1.5A

C168 0.1U/10V_4

C162 0.1U/10V_4

C173 1U/10V_4

C167 1U/10V_4

+1.1V

C170 22U/6.3V_8

L35 HCB1608KF-221T20

S5_3.3--3.3v standby power

TRACE WIDTH >=50mil

470mA

L11

+3V_S5

G7 H8 J8 K8 K9 M9 M10 N9 N10 M12 N12 M11

HCB1608KF-221T20 EMI

C100 0.1U/10V_4

C84 10U/6.3V_8

L5

+1.1V_S5

C85 10U/6.3V_8

C77 1U/10V_4

+FCH_VDDAN_11_USB_S C50 2.2U/6.3V_6 C51 0.1U/10V_4

HCB1608KF-221T20

C78 1U/10V_4

TRACE WIDTH >=20mil

140mA L8

+1.1V_S5

+FCH_VDDCR_11_USB_S TRACE WIDTH >=15mil

HCB1608KF-221T20 +1.1V_S5

C56 0.1U/10V_4

+FCH_VDD_11_SSUSB_S

L36 U3@HCB1608KF-221T20

R70

*short_8

R69

*short_8

C55 0.1U/10V_4

C57 10U/6.3V_8

+FCH_VDDAN_11_SSUSB_S_R

+FCH_VDDCR_11_SSUSB_S

C148 U3@10U/6.3V_8

R71 *U2@0_4

C101 U3@1U/10V_4

C117 [email protected]/10V_4

C108 [email protected]/10V_4

C86 U3@1U/10V_4

U12 U13 T12 T13

VDDPL_11_SYS_S VDDAN_33_HWM_S

VDDAN_11_SSUSB_S_1 VDDAN_11_SSUSB_S_2 VDDAN_11_SSUSB_S_3 VDDAN_11_SSUSB_S_4 VDDAN_11_SSUSB_S_5

N16 N17 P17 M17

424mA

VDDCR_11_S_1 VDDCR_11_S_2

VDDCR_11_USB_S_1 VDDCR_11_USB_S_2

P16 M14 N14 P13 P14

282mA

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8 VDDXL_33_S

VDDAN_11_USB_S_1 VDDAN_11_USB_S_2

42mA

C145 [email protected]/10V_4

C149 U3@1U/10V_4

VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 VDDAN_33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12

USB

+3V_AVDD_USB

3.3V_S5 I/O

C369 1U/10V_4

VDDCR_11_SSUSB_S_1 VDDCR_11_SSUSB_S_2 VDDCR_11_SSUSB_S_3 VDDCR_11_SSUSB_S_4

N18 L19 M18 V12 V13 Y12 Y13 W11 G24

S5 plus mode

TRACE WIDTH >=20mil +VDDIO_33_S

59mA

C105 1U/10V_4

5mA

R64

C121 1U/10V_4

C164 2.2U/6.3V_6

*short_6

+3V_S5

C95 10u/10V_8

+VDDXL_3.3V

L22 HCB1608KF-221T20

S5_1.1V--1.1V standby power N20 M20

187mA

+VDDCR_1.1V TRACE WIDTH >=15mil

R78

*short_6 +1.1V_S5

C199 *0.1U/10V_4

+3V_S5

C207 2.2U/6.3V_6

N8 C169 1U/10V_4

J24

70mA

+VDDPL_1.1V

M8

12mA

+VDDAN_3.3V_HWM

C161 1U/10V_4

K25 H25

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64

HUDSON-M3 Part 5 of 5

VSSAN_HWM

T25 T27 U6 U14 U17 U20 U21 U30 U32 V11 V16 V18 W4 W6 W25 W28 Y14 Y16 Y18 AA6 AA12 AA13 AA14 AA16 AA17 AA25 AA28 AA30 AA32 AB25 AC6 AC18 AC28 AD27 AE6 AE15 AE21 AE28 AF8 AF12 AF16 AF33 AG30 AG32 AH5 AH11 AH18 AH19 AH21 AH23 AH25 AH27 AJ18 AJ28 AJ29 AK21 AK25 AL18 AM21 AM25 AN1 AN18 AN28 AN33

VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128

VSSPL_SYS

R6

EFUSE VDDIO_AZ_S

AA4

26mA

C

T21 L28 K33 N28

VSSPL_DAC VSSAN_DAC VSSANQ_DAC VSSIO_DAC

VSSXL

D

?

+VDDIO_AZ

Trace width >=20 mil USB SS

C368 2.2U/6.3V_6

B

A3 A33 B7 B13 D9 D13 E5 E12 E16 E29 F7 F9 F11 F13 F16 F17 F19 F23 F25 F29 G6 G16 G32 H12 H15 H29 J6 J9 J10 J13 J28 J32 K7 K16 K27 K28 L6 L12 L13 L15 L16 L21 M13 M16 M21 M25 N6 N11 N13 N23 N24 P12 P18 P20 P21 P31 P33 R4 R11 R25 R28 T11 T16 T18

+1.1V_VCC_FCH_R

HUDSON-M3

AB17 AB18 AE9 AD10 AG7 AC13 AB12 AB13 AB14 AB16

C123 0.1U/10V_4

PCI/GPIO I/O

C103 0.1U/10V_4

CLKGEN I/O

C140 0.1U/10V_4

EXPRESS

C124 22U/6.3V_8

U17C

102mA

*short_8

MAIN LINK PCI

VDDQ--3.3V I/O power R72

+3V

1

GROUND

5

R73

B

*U2@0_4 C146 [email protected]/10V_4

POWER

?

+1.1V_S5

+1.1V

+VDDPL_1.1V

+VDDIO_AZ +3V +3V_S5

R62

+3V_S5

*short_8

C94 2.2U/6.3V_6

C104 *0.1U/10V_4

+VDDPL_3.3V

+VDDAN_3.3V_HWM

L20 *U2@HCB1608KF-221T20 L16 U3@HCB1608KF-221T20

L15 HCB1608KF-221T20

L12 HCB1608KF-221T20 C194 2.2U/6.3V_6

C192 0.1U/10V_4

C81 2.2U/6.3V_6

C73 0.1U/10V_4

C179 2.2U/6.3V_6

C178 0.1U/10V_4

A

A

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

Rev 1A

FCH 4/5(POWER) Date: 5

4

3

2

Thursday, February 23, 2012 1

Sheet

11

of

32

5

4

3

2

1

12

OVERLAP COMMON PADS WHERE POSSIBLE FOR DUAL-OP RESISTORS. +3V

+3V

+3V

+3V_S5

+3V_S5

+3V_S5

+3V_S5

STRAPS PINS D

D

R250 10K_4

{9}

PCI_CLK1

PCI_CLK1

{9}

PCI_CLK3

PCI_CLK3

{9}

PCI_CLK4

PCI_CLK4

{9}

LPC_CLK0

LPC_CLK0

{9}

LPC_CLK1

LPC_CLK1

{8}

EC_PWM2

EC_PWM2

RTC_CLK

RTC_CLK

R252 *10K_4

R360 *10K_4

R355 10K_4

R352 *10K_4

R307 10K_4

+3V_S5

System PWR_OK(CLG) C344 *0.1u/10V_4

U3

5

{9}

R251 *10K_4

2 R283 10K_4

R253 10K_4

R361 10K_4

R354 *10K_4

R353 2.2K_4

R308 *2.2K_4

{8} FCH_PWRGD

EC_PWM2--> SPI ROM: 2.2-KΩ 5% pull-down LPC ROM: Pull-up to 3.3V_S5. External pull-up resistor is not required as FCH has integrated 10-KΩ pull-up to 3.3V_S5.

FCH_PWRGD

CPU_COREPG

4 1

PWROK_EC

PWROK_EC

{23,27}

{23,24}

TC7SH08FU

3

R249 *10K_4

R39 100K_4

C

C

Remove PCI_CLK2 function

--------

REQUIRED STRAPS

PULL HIGH

PULL LOW

--------

--------

PCI_CLK1 ALLOW PCIE Gen2 DEFAULT

FORCE PCIE Gen1

PCI_CLK2

--------

--------

PCI_CLK3

PCI_CLK4

LPC_CLK0

USE DEBUG STRAP

non_Fusion CLOCK MODE

EC ENABLED

IGNORE DEBUG STRAP

FUSION CLOCK MODE

EC DISABLED

DEFAULT

DEFAULT

LPC_CLK1

EC_PWM2

RTC_CLK

CLKGEN ENABLED

LPC ROM

S5 PLUS MODE DISABLED

DEFAULT

CLKGEN DISABLED

FCH PWRGD CKT

DEFAULT

SPI ROM

S5 PLUS MODE ENABLED

DEFAULT

DEFAULT

B

B

DEBUG STRAPS FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23] {9}

PCI_AD27

{9}

PCI_AD26

{9}

PCI_AD25

{9}

PCI_AD24

{9}

PCI_AD23

PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24

PULL HIGH

PCI_AD23

R287 *2.2K_4

R286 *2.2K_4

R311 *2.2K_4

R305 *2.2K_4

R306 *2.2K_4

PULL LOW

PCI_AD27

PCI_AD26

PCI_AD25

PCI_AD24

PCI_AD23

USE PCI PLL

DISABLE ILA AUTORUN

USE FC PLL

USE DEFAULT PCIE STRAPS

DISABLE PCI MEM BOOT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

BYPASS PCI PLL

ENABLE ILA AUTORUN

BYPASS FC PLL

USE EEPROM PCIE STRAPS

ENABLE PCI MEM BOOT

A

A

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

Date:

Thursday, February 23, 2012

Rev 1A

FCH 5/5(STRAP & PWRGD) 5

4

3

2

1

Sheet

12

of

32

2

3

4

5

6

OPTION SIGNAL FROM NB to LVDS/CRT for UMA

7

30V/ 1A

+5V

F1

C126

30V/ 0.5A

2

CRTVDD5_F

1

D15 2 B0520WS-7-F

8

CRTVDD5

1

SMD1206P100TF INT_DDCCLK INT_DDCDATA

{4} INT_DDCCLK {4} INT_DDCDATA

INT_CRT_HSYNC INT_CRT_VSYNC

{4} INT_CRT_RED {4} INT_CRT_GRE A

{4} INT_CRT_BLU

INT_CRT_RED

L23

BLM18BB750SN1D

CRT_R1

INT_CRT_GRE

L17

BLM18BB750SN1D

CRT_G1

INT_CRT_BLU

L14

BLM18BB750SN1D

CRT_B1

20120110: Change L14, L17, L23 from BLM18BA470SN1_6 to BLM18BB750SN1D

INT_CRT_RED

R84

R82

R77

C202

C186

C163

C166

C185

C201

150/F_4

150/F_4

150/F_4

10P/50V_4

10P/50V_4

10P/50V_4

10P/50V_4

10P/50V_4

10P/50V_4

CN11 CRT

6 1 7 2 8 3 9 4 10 5

11

CRT_11

12

DDCDAT_1

13

CRTHSYNC

14

CRTVSYNC

15

DDCCLK_1

TP33

INT_CRT_GRE

17

{4} INT_CRT_HSYNC {4} INT_CRT_VSYNC

13

.22u/10V_4

16

1

CRT

INT_CRT_BLU

+3V

+3V

U18

C388

CRTVDD5

1

.22u/10V_4 CRT_BYP

7 8

C397

2

+3V

0.1u/10V_4

A

VCC_SYNC SYNC_OUT2 SYNC_OUT1 VCC_DDC BYP SYNC_IN2 VCC_VIDEO SYNC_IN1

CRTVSYNC CRTHSYNC

16 14 15 13

INT_CRT_VSYNC INT_CRT_HSYNC

10 11

INT_DDCCLK INT_DDCDATA

R348 2.7K_4

R351 2.7K_4

C398

1000p/50V_4

C389

10P/50V_4

CRTVSYNC

CRTVDD5

C390

10P/50V_4

CRTHSYNC

C383

10P/50V_4

DDCCLK_1

C395

10P/50V_4

DDCDAT_1

C391 0.1u/10V_4

CRT_R1 CRT_G1 CRT_B1

3 4 5 6

DDC_IN1 DDC_IN2

VIDEO_1 VIDEO_2 VIDEO_3

DDC_OUT1 DDC_OUT2

GND

9 12

DDCCLK_1 DDCDAT_1

R344 R357

2.7K_4 2.7K_4

CRTVDD5

20120110: Change C398 from .1u_10V_4 to 1000p/50V_4

CM2009-02QR

LVDS(LDS)

LCD PW(LDS)

+3V

+3V LCDVCC L32 C13

VIN +3V

C18

C17

C16

C6

10P/50V_4

1000P/50V_4

4.7u/25V_8

1000P/50V_4

L2 *short_6

VIN CCD_POWER C8 *10P/50V_4

C20 *0.1u/10V_4

*short_6LCDVCC_L C324

*10P/50V_4 L1 L4 C12

*short_6 *short_6 LCD_VIN C11

C22 1U/6.3V_4

U1

6 *10P/50V_4

*10P/50V_4

4 3

{4} INT_LVDS_DIGON

*10P/50V_4

40mil

IN

OUT

IN

GND

ON/OFF

GND

LCDVCC

1 2 5

B

C7

C322

C323

1U/6.3V_4

*.1u/10V_4

.01u/16V_4

C19 B

22u/6.3V_8

IC(5P) G5243T11U R31 100K_4

20120104: Swap INT_EDIDCLK from CN1.32 to CN1.33 Swap INT_EDIDDATA from CN1.33 to CN1.32

Backlight Control(LDS)

INT_TXLOUTP2 INT_TXLOUTN2

R25 R24

INT_EDIDDATA INT_EDIDCLK R10 R20

{24} CONTRAST {4} INT_LVDS_PWM

INT_TXLOUTP1 INT_TXLOUTN1

{4} INT_TXLOUTP1 {4} INT_TXLOUTN1

+3V

*0_4 *short_4

lvds@0_4 lvds@0_4

R14 R13

LVDS_BRIGHT

R12

INT_TXLOUTP2_R INT_TXLOUTN2_R

lvds@0_4 LVDS_EDIDDATA lvds@0_4 LVDS_EDIDCLK eDP-HPD BLM15AG121SS1/0.5A/120ohm_4 BL_ON R17 *short_6 +3V LCDVCC_L

C

*15P/50V_4C

{8} {8}

C21

R29

*300_4

CCD_POWER

R19 R18

USBP6USBP6+

0_4 0_4

USBP6-_R USBP6+_R {19} MIC2_INTL1

CCD-USB

ADOGND

G_6

1 G_4

10K_4 BL_ON

2

10K_4

D2

1 BAS316

2

LID591#

{24}

3

INT_TXLOUTP0 INT_TXLOUTN0

{4} INT_TXLOUTP0 {4} INT_TXLOUTN0

R22

BL#

2

2

Q4 2N7002K

EC_FPBACK#

{24}

Q1 DTC144EUA

1

INT_TXLCLKP INT_TXLCLKN

{4} INT_TXLCLKP {4} INT_TXLCLKN

R16 *eDP@100K_4

R9 *100K R23

3

EDP_EDIDCLK EDP_EDIDDATA

1

{4} INT_TXLOUTP2 {4} INT_TXLOUTN2

*[email protected]/10V_4 *[email protected]/10V_4

+3VPCU +3V

3

C14 C15

*[email protected]/10V_4 eDP_MLP0 *[email protected]/10V_4 eDP_MLN0

2

{4} INT_LVDS_BLON

Q5 2N7002K R27

1

INT_EDIDCLK INT_EDIDDATA

{4} INT_EDIDCLK {4} INT_EDIDDATA

C10 C9

100K_4 C

G_1

G_0

R15 *eDP@100K_4

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

G_5

CN1 LCD_VIN

GS12401-1011-40P-R-NH

Ramp 0221: Remove L3 +3VPCU

C4

0.1u/10V_4

Lid Switch (HSR)

LID591#

2 R21

*short_4

eDP-HPD

R30 *10K_4

3

INT_eDPI_HPD

HE1 APX9132H AI

2

R21 stuff

1

20120104: R30, R28, Q2, Q3 unstuff, +3V

D1 *VPORT_6

3

1

EM-6781-T3: AL006781000 APX9132H AI-TRG: AL009132001 AH9249NTR-G1: AL009249000 +3V D

D

2

eDP-HPD_R

Q3 *2N7002K

R28

*0_4

eDP-HPD

R11 100K_4

1

R26 *100K_4

3

{4} INT_eDPI_HPD

2

Quanta Computer Inc.

Q2 *2N7002K

1

PROJECT : ZQZ Size

Document Number

Rev 1A

CRT/LVDS/LID Date: 1

2

3

4

5

6

Thursday, February 23, 2012 7

Sheet

13 8

of

32

5

4

3

2

HDMI SDVO I2C Control

1

HDMI HPD SENSE (HDM)

14

UMA use +3V for the detect pin Dis use +3V_DELAY for the detect pin HDMI_DDCDATA HDMI_DDCCLK

{4} HDMI_DDCDATA {4} HDMI_DDCCLK

+3V

D

D

R383

*0_4

R394 10K_4

HDMI_DET

3

INT_HDMI_HPD

+3V

HDMI_DET

2 Q21 2N7002K

C517

R388 100K_4

1

R384 10K_4

*0.01U/25V_4 3

{4} INT_HDMI_HPD

2

Ramp 0223: Change R88, R94, R103, R109 value from 100 to 120ohm and stuff

HDMI (HDM)

20120110: Add C517 for hdmi detect issue

1

C

2011/08/25: {24} Change R214 from 2000k to 100k

HDMI_HPD_EC#

Q22 2N7002K

C

EMI reserve for HDMI(EMC)

Close to HDMI Connector

Close connector

HDMI PORT (HDM)

TX2_HDMI+

+5V

HDMI_PL_MOS

R107

499/F_4

TX2_HDMI+

R111

499/F_4

TX2_HDMI-

R98

499/F_4

TX1_HDMI+

R109 120/F_4

CN13

3

TX2_HDMITX2_HDMI+

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

TX1_HDMI+

Q9 2N7002K 2

R93

499/F_4

TX1_HDMI-

R104

499/F_4

TX0_HDMI+

R101

499/F_4

TX0_HDMI-

R91

499/F_4

TXC_HDMI+

TX2_HDMITX1_HDMI+

R94 120/F_4

TX1_HDMITX0_HDMI+

TX1_HDMI1

TX0_HDMI+

B

R92

R87

499/F_4

TX0_HDMITXC_HDMI+

R103 120/F_4

TXC_HDMI-

TXC_HDMI-

TX0_HDMITXC_HDMI+

100K/F_4

+5V R88 120/F_4

DIS Stuff 499 ohm CS14992FB24

F2 SMD1206P100TF +5V_HDMI_R 2 1

TXC_HDMI-

HDMI_DDCCLK HDMI_DDCDATA D16 SBR2U30SA

+5V_HDMI HDMI_DET

SHELL1 D2+ D2 Shield D2D1+ D1 Shield D1D0+ D0 Shield D0CK+ CK Shield CKCE Remote NC DDC CLK DDC DATA GND +5V HP DET SHELL2

20

B

21

HDMI CONN C419 .22u/10V_4 C211 *1000P/50V_4 {4} {4} {4} {4} {4} {4} {4} {4}

A

TX2_HDMI+ TX2_HDMITX1_HDMI+ TX1_HDMITX0_HDMI+ TX0_HDMITXC_HDMI+ TXC_HDMI-

TX2_HDMI+ TX2_HDMITX1_HDMI+ TX1_HDMITX0_HDMI+ TX0_HDMITXC_HDMI+ TXC_HDMI-

D17 +5V

2

R381

D18 +5V

2

HDMI_DDCCLK

1 CH501H-40PT

C421 *1000P/50V_4

2K/F_4 R382 HDMI_DDCDATA

1 CH501H-40PT

A

2K/F_4

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

Rev 1A

HDMI Date: 5

4

3

2

Thursday, February 23, 2012

Sheet 1

14

of

32

A

B

C

D

E

5 in 1 CARD READER IC (SD,MMC,xD,MS)

15 +3V

C431

C429

0.1u/16V_4

0.1u/16V_4

XTALSEL

C708 close PIN48, 47

4

PIN43=Power saving mode enable. '1' for enable [Default] '0' for disable

NBMD T39 SD_WP/XD_CLE/MS_CLK SD_CD#/XD_WE# SD_D1/XD_D1/MS_D1 SD_D0/XD_D0/MS_D0 SD_D7/XD_D7

C743 close PIN46, 47

+1.8V_VDD

CTRL0, CRTL 1 trace length shorter , and surround with GND. 4

C1_IOP

{9,17,24}

R390

PLTRST# {8} {8}

*15P/50V_4C

+3V USBP5+ USBP5C420

*short_4

C424 *0.47u/10V_6 *short_6

R387

R385

R395

{9} CardReader_48M

*300_4

22_4 EXT48MHZ_R R389

330_4

+3V_VDD

C427 4.7u/10V_6

C425

C426

*5p/50V_4

*5p/50V_4

XI XO +1.8V_VDD

1 2 3 4 5 6 7 8 9 10 11 12

C428 4.7u/10V_6

36 35 34 33 32 31 30 29 28 27 26 25

SD_D6/XD_D6 SD_CLK/XD_ALE/MS_BS SD_D5/XD_D5 SD_CMD_/XD_RB# SD_D4/XD_D4 SD_D3/XD_D3/MS_D3 SD_D2/XD_D2/MS_D2 XD_WP# XD_CE# EEPDATA EEPCLK T40 TP65

+3V

C430

0.1u/16V_4

C435

2.2u/6.3V_6

C436

4.7u/10V_6

*27P/50V_4

XO

PIN45=Clock input selection '1' for 48MHz input [Default,Internal PU] '0' for 12MHz input *0_4

R396

XTALSEL

3

*0_4 R397 XD_CD# XD_RE#/MS_INS#

VCC_XD

+3V

R392 *270K_4

SD write protect 1:decided by SDWP[Default] 0:disable SD write protect

13 14 15 16 17 18 19 20 21 22 23 24 pin13 output 20mils

Y4 *12MHZ C423

C1_VDDHM DATA6 CTRL0 DATA5 CTRL2 DATA4 AU6435B52-GDL-GR DATA3 DATA2 XDWPN XDCEN EEPDATA EEPCLK

XI

*27P/50V_4

48 47 46 45 44 43 42 41 40 39 38 37

LED EXT48IN RSTN REXT VD33P DP DM VS33P XI XO VDD V18

3

C1_IOP

C422

C440 C442 0.1u/16V_4 *4.7u/10V_6

VDDHM GND VDD XTALSEL HID NBMD CTRL1 CTRL3 DATA1 DATA0 DATA7 C1_VSSHM

R391 *100K_4

C1_V33 C1_IOP AVDD5V AGND5V V33 VDDHM VSSA_SYN GND VDD CTRL4 XDCDN SDWPEN

U19 +3V

+1.8V_VDD +3V C433 0.1u/16V_4

5 IN 1 CARD READER CONN (SD/MMC) VCC_XD

SD_CLK/XD_ALE/MS_BS and SD_CLK_R trace length shorter , surround with GND.

VCC_XD SD_CLK_R

2

CN5 SD_CD#/XD_WE# SD_WP/XD_CLE/MS_CLK SD_D1/XD_D1/MS_D1 SD_D0/XD_D0/MS_D0 SD_CLK/XD_ALE/MS_BS SD_CMD_/XD_RB# SD_D3/XD_D3/MS_D3 SD_D2/XD_D2/MS_D2 SD_D7/XD_D7 SD_D6/XD_D6 SD_D5/XD_D5 SD_D4/XD_D4

R136 R137 R140 R400 R402 R403 R138 R139 R399 R401

33_4 33_4 33_4 33_4 33_4 33_4 33_4 33_4 33_4 33_4

SD_D1_R SD_D0_R SD_CLK_R SD_CMD_R SD_D3_R SD_D2_R SD_D7_R SD_D6_R SD_D5_R SD_D4_R

13 1 2 3 4 10 19 23 25 5 8 17 21 7 15 26 27

SD_WP/XD_CLE/MS_CLK

SD_CLK/XD_ALE/MS_BS SD_D1/XD_D1/MS_D1 SD_D0/XD_D0/MS_D0 SD_D2/XD_D2/MS_D2 XD_RE#/MS_INS# SD_D3/XD_D3/MS_D3 MS_CLK_R R130 *short_4

22 9 11 12 14 16 18 20

1

C262 *10P/50V_4

6 24

SD-VCC SD-CD-SW SD-WP-SW SD-DAT1 SD-DAT0 SD-CLK SD-CMD SD-DATA3 SD-DAT2 MMC-DATA7 MMC-DATA6 MMC-DATA5 MMC-DATA4 SD-GND1 SD-GND2 SD-WP-GND SD-CD-GND MS-VCC MS-BS MS-DATA1 MS-DATA0 MS-DATA2 MS-INS MS-DATA3 MS-SCLK

2

Reserved for combo connector, which has MS adaptor short issue with XDCDN XD-VCC XD-CD XD-R/B XD-RE XD-CE XD-CLE XD-ALE XD-WE XD-WP XD-D0 XD-D1 XD-D2 XD-D3 XD-D4 XD-D5 XD-D6 XD-D7

XD-GND1 XD-GND2

C265 *10p/50V_4

45 28 29 SD_CMD_/XD_RB# 30 XD_RE#/MS_INS# 31 XD_CE# 32 SD_WP/XD_CLE/MS_CLK 33 SD_CLK/XD_ALE/MS_BS 34 SD_CD#/XD_WE# XD_WP# 35 37 38 39 40 41 42 43 44

R445

*short_4

XD_CD# VCC_XD

C449 4.7u/10V_6

SD_D0/XD_D0/MS_D0 SD_D1/XD_D1/MS_D1 SD_D2/XD_D2/MS_D2 SD_D3/XD_D3/MS_D3 SD_D4/XD_D4 SD_D5/XD_D5 SD_D6/XD_D6 SD_D7/XD_D7

C516 0.1u/16V_4

C452 0.1u/16V_4

C450 0.1u/16V_4

R398 5.1K/F_4

36 46

1

MS-GND1 MS-GND2 R013-P13-HM

Quanta Computer Inc. SD_WP/XD_CLE/MS_CLK and MS_CLK_R trace length shorter , surround with GND.

PROJECT : ZQZ Size

Document Number

Rev 1A

AU6433 CardReader Date: A

B

C

D

Thursday, February 23, 2012

Sheet E

15

of

32

5

4

close Pin1

+3V_S5 R34

+3V_LAN

*short_8

3

LAN (LAN) Arthorus AR8151

C46

C48

C36

C35

C45

4.7u/10V_6

*4.7u/10V_6

1u/6.3V_4

0.1u/10V_4

1000p/50V_4

2

1 U8

X-TX1N X-TX1P X-TX0N X-TX0P

1 2 3 4

1 2 3 4

8 7 6 5

16

U11 X-TX3N X-TX3P X-TX2N X-TX2P

8 7 6 5

1 2 3 4

*UCLAMP2512T.TCT

1 2 3 4

8 7 6 5

8 7 6 5

*UCLAMP2512T.TCT

U2 1

D

{9,17} PCIE_RST# {8} PCIE_WAKE#

PCIE_RST#

2

PCIE_WAKE#

3 4

{8} PCIE_REQ_LAN# 0.1u/10V_4 +VDDCT

C34 C33

1u/6.3V_4

C30

0.1u/10V_4

C26

1u/6.3V_4

C28

0.1u/10V_4

5

AVDDL_REG

6

XTLO

7

XTLI

*1M/F_4

11 12 0.1u/10V_4 AVDDL_REG 13 14

TX1N

Y1 3

15P/50V_4C

10

TX1P

R33

C31

9 RBIAS

TX0N C25

C

2.37K/F_4

TX0P

XTLI

XTLO

8

AVDDH_REG R32

15

1

C27 2 4 15P/50V_4C 25MHZ

20120109: Change C27 and C31 from10P_4 to 15p_4

C24

0.1u/10V_4 AVDDH_REG 16

TX2P

17

TX2N

18

C23

0.1u/10V_4 AVDDL_REG 19

TX3P

20

TX3N

21

VDD33

AVDDH

PERSTn

CLKREQn/LED2

WAKEn

DVDDL

CLKREQn

SMCLK

AR8151 5X5mm

VDDCT AVDDL_REG

SMDATA

40-Pin QFN

TX_N

AVDDH_REG

TX_P

RBIAS

AVDDL

TRXP0

REFCLK_N

TRXN0

REFCLK_P

NC/AVDDL

DVDDL_REG

NC/TRXP2

LED0

NC/TRXN2

LED1

NC/AVDDL

LX

NC/TRXP3

GND

D

TP1 C32

U9

0.1u/10V_4

25

TP2

26

TP3

TX1N TX1P TX0N TX0P

1 2 3 4

1 2 3 4

8 7 6 5

U12 TX3N TX3P TX2N TX2P

8 7 6 5

1 2 3 4

*UCLAMP2512T.TCT

29

PCIE_RXN0_LAN_C C37

30

PCIE_RXP0_LAN_C C38

31

AVDDL_REG

34

0.1u/10V_4

PCIE_RXN0_LAN

0.1u/10V_4

C39

0.1u/10V_4

1 2 3 4

8 7 6 5

8 7 6 5

*UCLAMP2512T.TCT

AVDDL_REG

C40

0.1u/10V_4

{9}

CLK_PCIE_LANP

{9}

{3}

PCIE_TXN0_LAN

37

DVDDL_REG

C41

1u/6.3V_4

38

LAN_ACTLED#

C42

0.1u/10V_4

39

LAN_LINKLED# LX

L33

{3}

CLK_PCIE_LANN

PCIE_TXP0_LAN

36

40

{3}

PCIE_RXP0_LAN

35

RX_N

NC/AVDDH

DVDDL_REG

33

RX_P

TRXN1

LED2

24

0.1u/10V_4

32

AVDDL

TRXP1

23

C29

28

TEST_RST

XTLI

AVDDH_REG

27

TESTMODE

XTLO

22

{3}

C +VDDCT

4.7uH/1A_2X2

41

NC/TRXN3

C336

C331

C335

4.7u/10V_6

0.1u/10V_4

1000p/50V_4

AR8151

RJ45(LAN) CN7

TX1N

R189

R190

R191

49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

LAN_N2

C312

C316

0.1u/10V_4

C2

*1000p/50V_4

C1 C314

0.1U/10V_4

*1000p/50V_4

0.1U/10V_4

*1000p/50V_4

TX0P TX0N

0.1u/10V_4

C306

*1000p/50V_4

C318

0.1u/10V_4

C308

*1000p/50V_4

C310

0.1u/10V_4

C320

*1000p/50V_4

TX3N

TX2N

TX3P

C313

TX2P

C311

L31

+VDDCT

X-TX0P X-TX0N X-TX1P X-TX2P X-TX2N X-TX1N X-TX3P X-TX3N

R187 5.1K/F_4

1 2 3

1U/10V_4

TX1P TX1N

4 5 6

TX2P TX2N

7 8 9

TX3P TX3N

10 11 12

TCT1 TD1+ TD1-

MCT1 MX1+ MX1-

TCT2 TD2+ TD2-

MCT2 MX2+ MX2-

TCT3 TD3+ TD3-

MCT3 MX3+ MX3-

TCT4 TD4+ TD4-

MCT4 MX4+ MX4-

24 23 22

+3V_LAN

X-TX0P X-TX0N

R8

21 20 19

X-TX1P X-TX1N

18 17 16

X-TX2P X-TX2N

15 14 13

X-TX3P X-TX3N

220_8

1 2 3 4 5 6 7 8

LAN_LINKLED# 11 LAN_LNK_LED_PWR 12

YELLOW_N YELLOW_P GND2 GND1

0+ 01+ 2+ 213+ 3-

14 13

LANGND

B

GREEN_N GREEN_P RJ45

LAN_ACTLED#

TRANSFORMER

R196

*SHORT_8

LAN_LINKLED# R195

R194

R193

R192

Delta LFE9276D-R (DB0ZY8LAN00)

49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

LAN_N4

BLM18AG601SN1D

U10

C309

LAN_N3

AVDD_CEN

9 10

220_8 LAN_ACT_LED_PWR

R186

C315

C317

C319

C321

0.1U/10V_4

*1000p/50V_4

0.1U/10V_4

*1000p/50V_4

R3 75/F_8

R5 *75/F_8

R6 *75/F_8

R7 *75/F_8

20120111: modify surge solution change D14 P/N from CY003100Z06 to CY231T20Z00

C307

C5

*0.01u/25V_4

*0.01u/25V_4

LANGND 20120111: Change R196 footprint to 0805

R4

A

D14 *SG@B88069X9231T203

C3

A

1M_8 220p/3KV_1808

1

LAN_N1

LAN_ACTLED#

Close Transformer

2

TX1P

20120113: Change L31 P/N from CX08T601010 to CX8AG601003

R188

B

TX0N

TX0P

TRANSFORMER(LAN)

Quanta Computer Inc. PROJECT : ZQZ

LANGND Size

Document Number

Rev 1A

LAN (AR8151) Date:

5

4

3

2

Thursday, February 23, 2012

Sheet

1

16

of

32

1

2

3

4

5

6

7

8

+3V

Check LED signal. (active high or low)

MINI-CARD WLAN(MPC)

+WL_VDD 2

{21,24} BT_POWERON# Q25

C485 10u/10V_8

R444 10K_4

Q28

DTC144EUA

PCIE_RXP1 PCIE_RXN1

{9} CLK_PCIE_WLANP {9} CLK_PCIE_WLANN PCIE_REQ_WLAN#_R

{24} PCIE_WAKE#_WLAN_R

1 PCIE_WAKE#_WLAN

3

15 13 11 9 7 5 3 1

GND REFCLK+ REFCLKGND CLKREQ# Reserved Reserved WAKE#

MINI-CARD1

{8} PCIE_REQ_WLAN#

1

PCIE_REQ_WLAN#_R

B

+WL_VDD

3

+WL_1.5V WLAN_OFF_R R454

*VA@0_4 R426 *10K_4

WLAN_OFF {24} RF_LED# {22}

+1.5V

+WL_1.5V

C518 *[email protected]/10V_6

*VA@47K_4

R455

{24} IOAC_LANPWR#

R425

*[email protected]_4

C489 *1000P/50V_4

C487 *0.1u/10V_4

*0_6

A

C486 *10u/6.3V_8

+3V USBP7+ {8} USBP7- {8}

USBP7-

R427

*300_4 C483

*15P/50V_4C

+WL_VDD

PDAT_SMB {6,7,8,23} PCLK_SMB {6,7,8,23} +WL_1.5V

U23

+WL_VDD

PLTRST#_R RF_EN

2

PLTRST# {9,15,24}

1

IOAC_RST# {24}

4

{24} *VA@TC7SH08FU

16 14 12 10 8 6 4 2

DEBUG_LFRAME# DEBUG_LAD3 DEBUG_LAD2 DEBUG_LAD1 DEBUG_LAD0

R429 R430 R431 R432 R433

0_4 0_4 0_4 0_4 0_4

LPC_LFRAME# {9,24} LPC_LAD3 {9,24} Debug LPC_LAD2 {9,24} LPC_LAD1 {9,24} LPC_LAD0 {9,24}

R456 R457

*VA@0_4 NVA@0_4

+WL_1.5V +WL_VDD

Ramp 0221: Add IOAC circuit

2

Q29 *DTC144EUA 3

UIM_VPP UIM_RESET UIM_CLK UIM_DATA UIM_PWR +1.5V GND +3.3V

52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18

C488 *0.1u/10V_4

3

{3} {3}

GND

PCIE_TXP1 PCIE_TXN1

+3.3V GND +1.5V LED_WPAN# LED_WLAN# LED_WWAN# GND USB_D+ USB_DGND SMB_DATA SMB_CLK +1.5V GND +3.3Vaux PERST# W_DISABLE# GND

GND

+WL_VDD

{3} {3}

Reserved Reserved Reserved Reserved GND +3.3Vaux +3.3Vaux GND GND PETp0 PETn0 GND GND PERp0 PERn0 GND UIM_C4 UIM_C8

C484 *0.1u/10V_4

54

Ramp 0221: modify net name

51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17

53

TP94 R438 R436

{9,16} PCIE_RST# {9} PCLK_DEBUG

CL_RST1#_WLAN 0_4 PCIE_RST#_C 0_4 PCLK_DEBUG_R

2

R460

CN21 A

C490 0.1u/10V_4

*VA@AO3413

1

+3VPCU

3BT_PWRON

1

17

NVA@0_8

5

+3.3V: 1000mA +3.3Vaux:330mA +1.5V:500mA

+WL_VDD

R428

B

+WL_VDD Q30 DTC144EUA 2

Ramp 0221: Add Q29, Q30, Add net PCIE_REQ_WLAN#_R, PCIE_WAKE#_WLAN_R

+WL_VDD

mSATA

C

C

D

D

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

Rev 1A

MINI PCI-E card Date: 1

2

3

4

5

6

7

Thursday, February 23, 2012

Sheet

17 8

of

32

1

2

3

4

18

SATA HDD CN16

1 A

1 2 3 4 SATA_RXN0_C 5 SATA_RXP0_C 6 7 8 9 10 11 12 13 C454 14 + 15 *100u/6.3V_3528 16 17 18 19

SATA_TXP0 {10} SATA_TXN0 {10} C432 C434

.01u/16V_4 .01u/16V_4

120mil

A

SATA_RXN0 {10} SATA_RXP0 {10}

+5V_HDD

R405

*short_8

C448

C447

C441

C445

C451

10u/6.3V_6

*0.1u/16V_4

*0.1u/16V_4

0.01u/25V_4

0.01u/25V_4

+5V

19 SATA HDD B

B

+15V

6 5 2 1

CN10

1 2 3 4 5 6 7

DP +5V +5V RSVD GND GND

8 9 10 11 12 13

GND15

15

+3VPCU

.01u/16V_4 .01u/16V_4

R331 *100K

SATA_RXN1 {10} SATA_RXP1 {10}

*100K

{10} FCH_ODD_EN

*0_4

R323

*0_4

C353

C358

C360

C359

C357

*100u/6.3V_3528

10u/6.3V_6

*0.1u/16V_4

*0.1u/16V_4

0.01u/25V_4

0.01u/25V_4

{24}

ODD_EN

2

R327 *100K

C365 *0.1u/25V_6

Q17 *DMN601K-7

Q19 *DMN601K-7

2

C18534-11305-L

C

ODD_EN_Q 2

1

Q18 *DMN601K-7

+5V_ODD

C352

ODD_EN_Q 2

1

+

+5V_ODD

R324

3

{8}

*1K_4

1

R322

1

ODD_PLUGIN# ODD_PLUGIN#

R319 22_8 3

1

2

C150 C138

2

3

SATA_RXN1_C SATA_RXP1_C

R328

1

SATA_TXP1 {10} SATA_TXN1 {10}

0_8

3

GND1 RXP RXN GND2 TXN TXP GND3

+5V

R318

1

14

+5V_ODD

4

MOD_EN_5V

C

GND14

Q16 *AO6402A

+5V

2

Zero Power (ODD)

SATA ODD

ODD_EJ_EC {24} R459 R261

10K_4

*0_4

ODD_EJ

{8}

+3V

D

D

Ramp 0221: Add R459

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

Date:

Thursday, February 23, 2012

Rev 1A

SATA-HDD/ODD/HOLE 1

2

3

Sheet 4

18

of

32

5

4

3

FILT_1.65V

AUDIO CODEC

2

1

LDO_OUT_3.3V

AVDD_3.3 pin is output of internal LDO. Do NOT connect to external supply.

C504 C509 1u/16V_6

C510

C507

0.1u/10V_4

19

Codec(ADO)

10u/10V_8 0.1u/10V_4 3V_DVDD

Port Configuration ADOGND ADOGND

C471

C506

Notes:

C480

10u/10V_8 0.1u/10V_4

Port Port Port Port Port Port Port Port Port

0.1u/10V_4 +5VA

D

3V_DVDD

(3.3V or 1.5V)

C514

C505

10u/10V_8 0.1u/10V_4 C499 C478 1u/16V_6

R435 0.1/F_1206

3V_DVDD

0.1u/10V_4

Layout Note: Path from +5V to LPWR_5.0 and RPWR_5.0 must be very low resistance ( follow vender suggestion

{25}

TP97

20120103: Change TP26 from U4.105 to U4.22

GPIO17/SCL1 GPIO22/SDA1 GPIO73/SCL2 GPIO74/SDA2 GPIO23/SCL3 GPIO31/SDA3

L45

GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM GPIO32/D_PWM GPIO45/E_PWM GPIO40/F_PWM/RI1 GPIO66/G_PWM GPIO33/H_PWM/SOUT1

64 79 95 96 108 93 94 114 109 15 80 17 20 21 24 25 26 27 28 73 74 75 82 83 84 91 110 112 107

{17}

TP27

101 105 106

GPIO85/GA20

VCORF

{8} SIO_A20GATE {8}

{8} SIO_EXT_SCI#

GPIO11/CLKRUN

AGND

8

CLKRUN#

GPIO94/DA0 GPI95/DA1 GPI96/DA2

103

{9}

C285 *10p/50V_4

A/D

GPIO90/AD0 GPIO91/AD1 GPIO92/AD2 GPIO93/AD3

97 98 99 100

VCORF_uR 44

*22_4

LFRAME LAD0 LAD1 LAD2 LAD3 LCLK

GND1 GND2 GND3 GND4 GND5 GND6

3 126 127 128 1 2

{9,17} LPC_LFRAME# {9,17} LPC_LAD0 {9,17} LPC_LAD1 {9,17} LPC_LAD2 {9,17} LPC_LAD3 {9} CLK_PCI_775

R155

24

R162 0_6

D

1

A Stage: 111115-->要 要要要要要要要要要

0.03A(30mils)

+3VPCU_EC

2

+A3VPCU

3

L41

1

EC(KBC)

PROJECT : ZQZ Ramp 0221: chage SW1 P/N from DHP00AC1G01 to DHP00533B00 3

Size

Document Number

Date:

Thursday, February 23, 2012

Rev 1A

EC NPCE795CA0DX 2

Sheet 1

24

of

32

4

3

VA1 PJ1 POWER_JACK

PL2 FBMA-11-201209-800A50T VA

1 2 3 4

2

VA2

PD6 SBR1045SP5-13 1

VA2

3

1 2 3

5

1

PC5 0.1u/50V_6

PR8 220K_4

2

PD7 SMAJ20A

1 2 3

PR112 *short_4 PC66 0.1u/50V_6

24707_ACN

4

PC57 0.1u/50V_6 PL1 FBMA-11-201209-800A50T

PQ21 AOL1413

VIN

2

1

2

1

PR116 0.01/F_0612

PQ20 AOL1413

9,5v

PC64 0.1u/50V_6

5

PR37 33K/F_4

25

4

5

24707_ACP

D

D

PC2 0.1u/50V_6

1

PD1 1N4148WS

PR1 220K_4

6

2

recommend 200mA at least.

5

3

20120112: Change PD1 P/N to BC1N4148Z00

PR110 *short_4 D/C#

PR38 10K_4

{24}

PR10 *short_4

4

3

PC1 0.1u/50V_6

PQ1 IMD2AT108 2 PQ11 2N7002K 1

24707_ACP VA2

24707_ACN PC58 0.1u/50V_6 PR3 63.4K/F_4

20120109: Change PC11 from 0.1u/50V_6 to 47n/50V_6

24707_ACDET

24707_VCC PR26 100K_4

PR27 100K_4

PR20 20_1206

ACIN

20

VCC 17 24707_BST

HIDRV

1

MBDATA

8

24707_DH 24707_LX

15

24707_DL

PQ23 MDV1528 PR120 0.01/F_0612 PL5 6.8uH_7X7X3 1

PR9 10K_4

PGND 24707_IFAULT#

11

24707_CMPOUT

3

SRP

1M_4

24707_CMPIN

10 4

TEMP_MBAT {24} PR118 *100K_4

+3VPCU

24707_SRP

12

24707_SRN

PC7 0.1u/25V_4 SRN

C114F3-108A1-L_Batt_Conn

PR114 100K/F_4

PR12 7.5_6

0929

PC53 0.1u/25V_4

MBCLK

{8,24} {8,24}

PC54 10u/25V_1206

PC62 10u/25V_1206

20120110: Change PR28 from 4.7_6 to 2.2_6 Change PC9 from 680p/50V_6 to 1000p/50V_4

PC52 0.01u/25V_4

{24}

B

PC6 0.1u/50V_6

24707_SRP

REGN MAX voltage 6.5V V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr =0.793V for 3.965A current limit

PR16 100_4

MBDATA

PR111 *short_4

PC9 24707_SRN

20120109: PR12 no change

PC3 *47p/50V_6

PQ22 MDV1528

1000p/50V_4

ILIM CMPIN GND GND GND GND GND

TEMP_MBAT

PR21

PR2 316K/F_4

IOUT

PL3 FBMA-11-201209-800A50T

PC56 0.1u/25V_4

13

21 22 23 24 25

24707_ILIM PR7 100_4

PR115 *short_4

4 PR18 10_6

CMPOUT

BAT-V

PJ2

14

IFAULT#

7

MBAT+

PR11 *10K_4

PR28 2.2/F_6

3 2 1

PL4 FBMA-11-201209-800A50T

BAT-V

2

5

SCL

+3VPCU

PC61 *100p/50V_6

PC65 4.7u/25V_8

4

PU1 BQ24707A

SDA

LCDRV 9

18 19

ACOK# PHASE

MBCLK

PR19 100_4

C

PC63 0.1u/50V_6

3 2 1

5 PR5 *short_4

PC55 0.1u/50V_6

PR6 *short_4

1u/10V_4

PR29 *short_6 BTST

PR4 *short_4

PC4 *47p/50V_6

PC59

24707_REGN

PC11 47n/50V_6

2

10 1 2 3 4 5 6 7 9 8

16

PD2 RB500V-40

PC10 0.47u/25V_6

PQ12 2N7002K

B

VIN

REGN

ACDET

20120109: No Change

3

{24}

6

5

+3VPCU

ACN

PR113 10K/F_4

ACP

+3VPCU

C

PC60 0.1u/50V_6

1

PR14 *short_6

2

PR17 *0_6

PC8 0.1u/50V_6

ICM A

TEMP_MBAT

1

CH1

2

VN

3

CH2

CH4

6

VP

5

CH3

4

+3VPCU

24707_CMPOUT

{4,26,31} SYS_SHDN#

Quanta Computer Inc.

PR119 *short_4

MBCLK

Add ESD diode base on EC FAE suggestion

PC51 100P/50V_4

PR117 *0_4

MBDATA

2

PU2 IP4223-CZ6

1

A

PROJECT : ZQZ Size

24707_CMPIN

{31} LM393_PIN2

Rev 1A

Charger(bq24707A) Date:

5

Document Number

4

3

2

Sheet

Thursday, February 23, 2012 1

25

of

32

5

4

MAIND

MAIND

3

SYS_SHDN#

{28,30,31}

SYS_SHDN#

2

1

26

{4,25,31}

Ven=7.23V

111220: Change +3vPCU_SRC name to VL

+5V {24} SYS_HWPG

VIN

+3VPCU

VIN

VL

8223REF

VL

+2V

+3.3V

VIN

13

+3V_PG

23

PC18 0.1u/50V_6

+5V_DH

21

PR63 1/F_6

+5V_B +5V_LX

20

+5V_DL

19

PC15

8223_EN

UGATE1

UGATE2

BOOT1

PU4 RT8223PZQW

PHASE1

5

3

17

8

TONSEL

LGATE1

BOOT2 PHASE2 LGATE2

14

+3V_SKIP

4

+3V_TON

4

10

+3V_DH

9

+3V_B

11

+3V_LX

12

+3V_DL

PR64 1/F_6

GND

GND

FB2

PL10 2.2uH

4 PC99 0.1u/50V_6

PC93 PQ30 MDV1595SURH

3 2 1

+1V

PC101 330u/6.3V_6X5.8

1000p/50V_4 PR140 10K/F_4

PC25 0.1u/10V_4

1

PR138 100K/F_4

C

+

+1V

2

PC22 *680p/50V_6

+3VPCU

PR49 6.81K/F_4

+3V_FB

8223_EN PR141 10K/F_4

+3VPCU 3.3Volt +/- 5% TDC : 5.02A PEAK : 6.3A OCP : 7.5A Width : 200mil

PR153 2.2/F_6

7 5

20111226: Change PC90 value from 0.1u_6 to 2200p_4

PC19 0.1u/50V_6

15

PR58 *short_4

OUT2

25

FB1

ENTRIP2

VOUT1

6

4

1 2 3

PC97 0.1u/50V_6

2

ENTRIP1

PR68 *4.7_6

+

+5V_FB

ENC

24 PQ25 MDV1595SURH

1

PR51 15.4K/F_4

PC104 330u/6.3V_6X5.8

22

SKIPSEL

PGOOD

5

5

PL6 2.2uH

EN

PC84 4.7u/25V_8

PQ26 MDV1528URH

3 2 1

SYS_SHDN#

PR50 *0_4

REF

4

PC90 2200p/50V_4

PR44 *short_4

PR147 *short_4

VIN PQ24 MDV1528URH

PC75 1u/6.3V_4

PR146 330K/F_4

16

PR45 *100K/F_4

VREG5

PR59 *short_4

VREG3

20111226: Change PC73 value from 0.1u_6 to 2200p_4

C

8223_VIN

PC24 0.1u/25V_4

5

+5VPCU 5 Volt +/- 5% TDC : 5A PEAK : 6.6A OCP : 8A Width : 200mil

PC73 2200p/50V_4

PC78 4.7u/25V_8

1 2 3

+5VPCU

PC67 100u/25V_6X5.8

18

2

+

D

PR71 *0_4

PC26

1

4.7u/6.3V_6

PR150 10_8

PR76 665K/F_4

4.7u/6.3V_6

VIN

D

PR142 107K/F_4

PR139 97.6K/F_4

20120113: Change PC104 P/N from CC73301MZB2 to CC73301MZ00 2

OCP:8A

PD3 DA3J101F0L

L(ripple current) =(9-5)*5/(2.2u*0.4M*9) =2.525A Iocp=8-(2.525/2)=6.74A Vth=6.74A*14mOhm=94.32mV R(Ilim)=(94.32mV*10)/10uA =94.32K

B

PC29 0.1u/50V_6 +3V_DL

3

PR129

*short_6

PR135

*short_6

20120113: Change PC101 P/N from CC73301MZB2 OCP:7.5A to CC73301MZ00 L(ripple current) =(9-3.3)*3.3/(2.2u*0.5M*9) ~1.9A Iocp=7.5-(1.9/2)=6.55A Vth=6.55A*14mOhm=91.7mV R(Ilim)=(91.7mV*10)/10uA ~91K

1 PC37 0.1u/50V_6

PC30 0.1u/50V_6

2 PD4 DA3J101F0L

20120106: Remove PR74

3

1

20120110: Change PR153 from 4.7_6 to 2.2_6 Change PC93 from 680p/50V_6 to 1000p/50V_4

+15V_ALWP

+15V

B

PR87 22_8 PC36 0.1u/50V_6

VIN

+3V_S5

+15V

+5V_S5

+5VPCU

+3VPCU

+5VPCU +3VPCU

PR13 1M_6

3

PR39 22_8

5

PR24 22_8

3

PR36 1M_6

5 1

2

5

PQ36 MDV1528Q

MAIND 4 PQ38 MDV1528Q

PQ13 DMN601K-7

PQ41 AO3404 +3V_S5

+3V_S5 TDC : 0.62A PEAK : 0.84A Width : 40mil

A

3 2 1

PQ2 DMN601K-7

2

4

1

MAIND

3 2 1

PR25 1M_6

PQ37 AO3404

2

1

PQ14 DTC144EUA

2

PQ3 DMN601K-7

1

2

1

S5_ON

1

{23,24,28,31}

S5D

2

3

3

3

3

S5D

A

4

+5V_S5

+5V_S5 TDC : 1.88A PEAK : 2.5A Width : 80mil

+5V

3

+5V TDC : 3.08A PEAK : 4.1A Width : 120mil

+3V

+3V TDC : 2.48A PEAK : 3.3A Width : 100mil 2

PROJECT : ZQP Quanta Computer Inc. Size

Document Number

Rev 1A

SYSTEM 5V/3V (RT8206) Date:

Thursday, February 23, 2012

Sheet 1

26

of

32

5

4

3

2

1

27 8380CSN1 8380CSP1

PR131

665/F_4

{4} CPU_VDD0_FB_L

PR52

*short_4

SNS_NEG_VDD_0

PR125

665/F_4

PR127

49.9/F_4

D

8380RSP1

PR65

PC14 100p/50V_4

PR144

8380RSN1

+3V

*short_4

VRON

{23,24}

PC77 100p/50V_4

PR42 *330_4

2

{4}

*AO3402

PC16

1 1

1

3 PR54 39K/F_4

*0_4

2

PR40

PC94 0.1u/50V_6

8380SC 8380RSN1 8380RSP1 8380CSN1 8380CSP1 8380EN

PR46 2.55K/F_4 PC69 470p/50V_4 PR130 49.9K/F_4

PC74 0.1u/10V_4

PR124 6.2K/F_4

+VCORE

5 1 2 3

PR73 2_6

3

PL11 1uH

PR90 2.2/F_6

PQ33 RJK03K5DPA PC35 680p/50V_6

1

+5VPCU

4

2

8380HDR2

2

PR72 2_6

PD8 RB500V-40

PQ32 RJK03J6DPA

PC98 0.1u/50V_6

CPU_SVD

{4}

CPU_SVC

CPU_SVC

PR43 *Short_4 PR48 *Short_4

{12,23}

8380SVC PR145 PR53 32.4K/F_4

PR91 2.2/F_6

+

49.9/F_4

SNS_NEG_VDD_1

PR126

1.2K/F_4

SNS_POS_VDD_1

PR132

1.2K/F_4

PR134

49.9/F_4 +NBCORE

PC39 *2.2n/50V_4

PQ35 RJK03K5DPA PC38 680p/50V_6

PC88 330u/2V_7343

Close to Phase Inductor

PR62 5.62K/F_4

VIN PR79 2.2/F_4

PC76 100p/50V_4

0.1u/10V_4 PC79 2200p/50V_4

PC13 220p/50V_4

PR57 *short_4 {4} CPU_VDDNB_FB_H

B

PC17

PR55 *short_4 {4} CPU_VDDNB_FB_L

NB CORE

PR152 10K_6_NTC

PC81 1000p/50V_4

B

PR128

27.4K/F_4

2

PR61 3.92K/F_4

+3V CPU_COREPG

8380VREF

+NBCORE

1

8380LDR2

8380SVD

OCP:11A 8A

1uH

PC68 1000p/50V_4

1.91K/F_4

PC92 100u/25V_6X5.8

PC100 4.7u/25V_8 PL7

8380LX2

1 2 3

CPU_SVD

C

+ +5VPCU

4 {4}

+V CORE

VIN

PC21 1u/6.3V_4

PC89 0.22u/25V_6

PR66

+

8380BST1

5

16 15 14 13 12 8 10 9

2

PC107 330u/2V_7343

PC34 *2.2n/50V_4

5

PR133 43.2K/F_4

PU3

OZ8380

LX1 BST1 LDR1 GNDP VDDP HDR2 BST2 LX2

PD9 RB500V-40

OCP:12A 9A

PR155 10K_6_NTC

PR143 3.92K/F_4

3

GNDA GNDA 33 34

PR41 43.2K/F_4 PR123 6.2K/F_4

COMPV1 VDDA VREF TSET ILIM SVD SVC COMPV2

5.62K/F_4

PC32 *4.7u/25V_8

4

1 2 3

8380ILIM

8380VREF

8380LDR1

22 24 23 20 21 19 18 17 38 39 40

42 41 8380TSET PC70 .22u/10V_4

SC RSN1 RSP1 CSN1 CSP1 EN PWR_OK HDR1 GNDA GNDA GNDA

GNDA GNDA 25 26 27 28 29 30 31 32

Close to Phase Inductor

1

PC91 0.22u/25V_6

RSN2 RSP2 VFIX CSN2 CSP2 VIN PG LDR2 GNDA GNDA GNDA

8380VREF

PC96 4.7u/25V_8

PQ34 RJK03J6DPA

+5VPCU

1 2 3 5 4 6 7 11 35 36 37

PC72 470p/50V_4

PR137

8380LX1

8380RSN2 8380RSP2 8380VFIX 8380CSN2 8380CSP2 8380VIN

PR47 22_6

PR92 2.2/F_4

PC95 100u/25V_6X5.8

4 1 2 3

8380HDR1

PC71 1u/6.3V_4

0.1u/50V_6

+

5

PC85 1000p/50V_4

+5VPCU

D

VIN CPU_PWRGD_SVID_REG

PQ15 8380VREF

PC80 2200p/50V_4

10K_4

+1.5V

PR67 1K/F_4

Parallel

C

20111226: Change PC80 value from 0.1u_6 to 2200p_4

4

SNS_POS_VDD_0

2

*short_4

1

PR56

4

{4} CPU_VDD0_FB_H

+VCORE

1

49.9/F_4

2

PR60

8380RSP2

20111226: Change PC79 value from 0.1u_6 to 2200p_4

8380CSP2 8380CSN2

PR136 *100K/F_4

PR121 *short_6

+3V

PR122 *short_6

A

A

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

Date:

Thursday, February 23, 2012

Rev 1A

CPU Core (OZ8380) 5

4

3

2

Sheet 1

27

of

32

5

4

3

2

1

28 20120106: Add net +1.1V_S5_EN to EC and add R452 D

D

{24}

51211_EN

51211_EN

VIN +5VPCU

+3V

7 2

V5IN

VBST

PU6 TRIP TPS51211DSCR SW

8

51211_SW

6

51211_DRVL

4 PR84 PC33 *short_6 0.1u/50V_6

+1.1V_S5 PL9 2.2uH_7X7X3 C

GND

13

GND

11 PR80 *4.7_6

FB

12

PR82 5.76K/F_4 +

4 PC102 0.1u/50V_6

51211_FB

20120106: Change PR149 value from 0_4 ohm to 10K_4 ohm Remove PR154 and Add PC118

PC23 *680p/50V_6

3 2 1

PQ31 MDV1595SURH

PC105 560u/2.5V_6X5.7

PR77 10K/F_4

OCP=5A L ripple current =(19-1.1)*1.1/(2.2u*290k*19) =1.624A Vtrip=5-(1.624/2)*14mohm =0.058629V Rlimit=0.058629/10uA*8=46.9Kohm

+1.1V_S5 1.1 Volt +/- 5% TDC : 3A PEAK : 4A OCP : 5A Width : 120mil

B

+1.1V_S5 5

B

DRVL

51211_VBST

5

TST GND

*0.1u/25V_4

5

EN

9 10

3 2 1

51211_TRIP 49.9K/F_4 51211_TST 470K/F_4

DRVH

4

PR70

51211_DRVH

PGOOD

GND

PR88 PC118

3

GND

C

51211_EN

PC87 4.7u/25V_8

PQ29 MDV1528URH

16

S5_ON

*10K/F_4

GND

PR149

15

{23,24,26,31}

1

HWPG_1.1V

14

{24}

PC83 0.1u/50V_6

5

PC28 1u/10V_4

PR89 *100K/F_4

MAIND

MAIND

4 PQ39 MDV1528Q 3 2 1

{26,30,31}

+1.1V

+1.1V TDC : 2.73A PEAK : 3.64A Width : 120mil

A

A

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

Rev 1A

VCCP 1.1V(TPS51211) Date: 5

4

3

2

Thursday, February 23, 2012

Sheet 1

28

of

32

5

4

3

2

1

29 VIN D

D

+5V_S5 {24} 51211V_EN +3V

7 3

EN

VBST

10

51211V_VBST

51211V_TRIP 24.9K/F_4 51211V_TST 470K/F_4

2

51211V_SW

DRVL

6

51211V_DRVL

12

GND

GND

11

+1.05V PL8 2.2uH_7X7X3

5

8

TST

FB

PR78 *4.7_6

4 PC103 0.1u/50V_6

51211V_FB

3 2 1

PQ27 MDV1595SURH

B

+1.05V 1.05 Volt +/- 5% TDC : 1.9A PEAK : 2.5A OCP : 3A Width : 80mil

PR81 5.1K/F_4 +

4

13

GND

C

PU5 TRIP TPS51211DSCR SW

5

GND

PR69

GND

PR86 PR151 *100K/F_4

4 PR83 PC31 *short_6 0.1u/50V_6 3 2 1

DRVH

51211V_EN *short_4

16

PR148

GND

MAINON

V5IN PGOOD

9

15

23,24,30,31}

PC86 4.7u/25V_8

PQ28 MDV1528URH 51211V_DRVH

1

HWPG_1.05V

14

{24}

PC82 0.1u/50V_6

5

PC27 1u/10V_4 PR85 *100K/F_4

PC20 *680p/50V_6

PC106 560u/2.5V_6X5.7

PR75 10K/F_4

C

OCP=3A L ripple current =(19-1.05)*1.05/(2.2u*290k*19) =1.555A Vtrip=3-(1.555/2)*14mohm =0.03111V Rlimit=0.03111/10uA*8=24.89Kohm

B

A

A

Quanta Computer Inc. PROJECT : ZQZ Size

Document Number

Rev 1A

+1.05V(TPS51211) Date: 5

4

3

2

Thursday, February 23, 2012

Sheet 1

29

of

32

5

4

TDC : 0.45A PEAK : 0.6A Width : 20mil

3

1

30

+0.75V_DDR_VTT

PC47 10u/6.3V_8

TDC : 0.01A PEAK : 0.01A Width : 10mil

D

2

PC46 10u/6.3V_8 D

+SMDDR_VREF

Close to IC Greater than or equal 40mil

PC45 0.22u/10V_4 +5V_S5

{24}

20

HWPG_1.5V

2

PC48 1u/10V_4 VIN

PGOOD

5

3 VTT

PC50 10u/6.3V_8

VLDOIN

VTTSNS

4

1

21

5 VTTREF

VTTGND

PAD

PR106 100K/F_4

PAD

22

+3V

V5IN

12

C

C

51216_DRVL

3 2 1

51216_SW

11

PQ44 PC113 MDV1528URH 2200p/50V_4

PC114 4.7u/25V_8

+1.5VSUS PL12 1uH_7X7X3 PR159 2.2/F_6

10 4

3 2 1

GND

PAD

PGND

13

TENSÃO DA MEMÓRIA +1.5V

4 PC49 0.1u/50V_6

7

6

VREF=1.8V

PAD

DRVL

PAD

15

51216_DRVH PR105 2_6 51216_VBST

14

5

SW

TRIP

REF

26

MODE

23

18

24

51216_TRIP

VBST

PU8 TPS51216RUKR

PAD

PR160 97.6K/F_4

S5

VDDQSNS

16

51216_MODE 19

DRVH

25

51216_S5

PR161 200K/F_4

S3

REFIN

PR109 *short_4

SUSON

17

9

{23,24}

MAINON

51216_S3

8

{23,24,29,31}

PR108 *0_4

PQ43 MDV1595SURH

PC115

+

1000p/50V_4

51216_REFIN

PC44 0.1u/10V_4

B

51216_S3

PR107 *short_4

51216_S5

PR158 *short_6

RDSon=14mohm

B

20120110: Change PR159 from 4.7_6 to 2.2_6 Change PC115 from 680p/50V_6 to 1000p/50V_4

Close to output cap

+1.5VSUS

3

PR157 10K/F_4

PC116 0.1u/50V_6

PC117 560u/2.5V_6X5.7

51216_REF

+1.5V_SUS 1.5 Volt +/- 5% TDC : 6.43A PEAK : 8.57A OCP : 10A Width : 260mil

PC43 0.01u/25V_4

{3,4,5,6,7,10,11,23}

+1.5VSUS {26,28,31}

MAIND

MAIND 2

1

PR104 51K/F_4

PQ19 AO3404 +1.5V

A

OCP=10A L ripple current =(19-1.5)*1.5/(1u*400k*19) =3.454A Vtrip=10-(3.454/2)*14mohm =0.1158V Rlimit=0.1158/10uA*8=92.657Kohm

S3

S5

+1.5VSUS

REF

VTT

S0

1

1

ON

ON

ON

S3 (mainon off)

0

1

ON

ON

OFF

S4/S5

0

0

OFF

OFF

OFF

A

Quanta Computer Inc. PROJECT : ZQZ Size

4

3

2

Rev 1A

DDR 1.5V(TPS51216) Date:

5

Document Number Thursday, February 23, 2012

Sheet 1

30

of

32

5

4

3

2

VIN

+3V

PR15 1M_6

+5V

PR33 22_8

+1.5V

+1.8V

PR31 22_8

1

PR35 22_8

+1.1V

PR32 22_8

31

+15V

PR34 22_8

PR23 1M_6

{26,28,30}

D

3

3

3

3

MAIND

3

3

MAIND 3

MAINON_ON_G

D

2

2

PQ8 2N7002K

2

PQ5 2N7002K

PQ7 2N7002K

PC12 *2200p/50V_4

PQ9 2N7002K 1

1

1

PR30 *100K_4

2 PQ4 2N7002K

1

2 PQ6 2N7002K

1

2

1

PQ10 DTC144EU

2

MAINON

1

{23,24,29,30}

PR22 1M_6

VIN PQ40 MDV1528Q

C

PR97 100K_4 PU7 G9334

PC110 10u/6.3V_8

5

PC111 10u/6.3V_8

3

3

S5_ON

1

Rh

FB

4

HWPG_1.8V

{24}

MAINON

1

+5VPCU 6

PC41 0.1u/25V_6

PC40

PR94 *100K_4

33n/50V_6

B

LM393_PIN8 PR103 1.74K/F_4

EN

2

PR96 100/F_4

PR93 47/F_6

PR99 *short_6

VL

PGD

DRV

VCC

2 PQ18 DTC144EU

VL

C

+3V PC108 0.1u/25V_6

PC109 10u/6.3V_8

Rg

3 S5_ON

+3VPCU 5

PR95 261/F_4

PQ16 AO3409

2

{23,24,26,28}

1 2 3

1

PR100 1M_6

+1.8V

GND

+1.8V 1.8Volt +/- 5% TDC : 0.6A PEAK : 2.15A Width : 70mil

PD5 DA2J10100L

4

Thermal protection

B

Vout1 = (1+Rg/Rh)*0.5

PR102 200K/F_4

PR98 200K_6

SYS_SHDN#

{4,25,26}

8

3

PC112 0.1u/50V_6

LM393_PIN2

LM393_PIN2

2

+

PR101 200K/F_4

1

2

4

PR156 10K_6_NTC

3

3

2

PC42 0.1u/50V_6

5

+

6

-

A

A

7 PU9B BA10393F

PQ17 2N7002K

Quanta Computer Inc. PROJECT : ZQZ

1

S5_ON

PQ42 2N7002K

PU9A BA10393F

1

2.469V {25}

For EC control thermal protection (output 3.3V)

Size

Document Number

Discharge /Thermal protection Date: 5

4

3

2

Thursday, February 23, 2012

Sheet 1

31

of

32

Rev 1A

5

4

3

2

1

Model

MODEL

REV

ZQZ M/B

Page

A

First Release

B

111220: page26--Change PR44 net from +3VPCU_SRC name to VL 111220: Change all TP footprint to TP2650 111226: page25--Change PR20 value from 20_1206ohm to 22_8ohm Change PR12 value from 7.5ohm to 10ohm page26&27--Change PC73, PC79, PC80, PC90 value from 0.1u_6 to 2200p_4 111228: page20--Add R447, R448, Q26, Q27 111230: page23--Swap PDAT_SMB and PCLK_SMB 120103: page24--Change TP26 from U4.105 to U4.22 Change net CPUFAN# from U4.22 to U4.105 120104: Change PQ22,PQ23,PQ24,PQ25,PQ26,PQ27,PQ28,PQ29,PQ30,PQ31,PQ36,PQ38,,PQ39, PQ40,PQ43,PQ44 footprint to wdfn5-3_05x3_05-65 120104: page13--Swap INT_EDIDCLK from CN1.32 to CN1.33 Swap INT_EDIDDATA from CN1.33 to CN1.32 Change SW1, SW2, SW3 footprint from sw-tc017-ps11bt-6p-smt to SW-TC901-AA1G-A160T-6P R30, R28, Q2, Q3 unstuff, R21 stuff page10--Add R449, R450, R451 Add net N30960722 120106: page26--Remove PR74 page24--Remove net POWERSMAR_SW and add TP97 page24--Remove net POWERSMARTLED and add TP95 page24--Remove net +0.75V_ON and add TP96 page28--Change PR149 value from 0_4 ohm to 422K_4 ohm page28--Remove PR154 and Add PC118 page28--Add net +1.1V_S5_EN to EC and add R452 page24--Connect net SML1ALERT# to EC and add R453 120109: page26--Change C27 and C31 from10P_4 to 15p_4 120109: page25--PR20 No change 120109: page25--Change PC11 from 0.1u/50V_6 to 47n/50V_6 120109: page25--PR12 no Change 120109:Remove JP9, JP3, JP12, JP3, JP10, JP11, JP13, JP14, JP7, JP1, JP2, JP4, JP5, JP6 120110:page25--Change PR28 from 4.7_6 to 2.2_6, Change PC9 from 680p/50V_6 to 1000p/50V_4 120110:page26--Change PR153 from 4.7_6 to 2.2_6, Change PC93 from 680p/50V_6 to 1000p/50V_4 120110:page30--Change PR159 from 4.7_6 to 2.2_6, Change PC115 from 680p/50V_6 to 1000p/50V_4 120110:page13--Change L14, L17, L23 from BLM18BA470SN1_6 to BLM18BB750SN1D 120110:page13--Change C398 from .1u_10V_4 to 1000p/50V_4 120110:page9--Change R364 from 22_4 to 33_4 -->for slewrate issue 120111:page16--modify surge solution and change D14 P/N from CY003100Z06 to CY231T20Z00 120111:page10--Connect R451 net from FCH_SPI_CS0# to SPI_CS 120111:page14--Add C517 for hdmi detect issue 120111:page16--Change R196 footprint to 0805 120112:page09--Change R359 from 22_4 to 33_4-->follow vender suggestion 120112:page24--Change R110, R112, R116, R114 from 10k to 4.7k-->follow vender suggestion 120112:Change PQ24, PQ26, PQ28, PQ29, PQ44 P/N from BAM74100001 to BAM15280000 120112:Change PQ25, PQ27, PQ30, PQ31, PQ43 P/N from BAM77020000 to BAM15950000 120112:Change PQ32, PQ34 P/N from BAM14480000 to BAM03J60000 120112:Change PQ33, PQ35 P/N from BAM17180000 to BAM03K50000 120113:page25--Change PD1 P/N to BC1N4148Z00 120113:page16--Change Change L31 P/N from CX08T601010 to CX8AG601003 120113:page26--Change PC101, PC104 P/N from CC73301MZB2 to CC73301MZ00 120217:page22--Change R180, R182 from 255 to 590ohm 120217:page22--Change R1 from 100 to 80.6ohm 120217:page23,24--Change SW1, SW2, SW3 from DHP00AC1G01 to DHP00532W00

D

C

B

C

A

CHANGE LIST

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

120221:page21-C303 unstuff 120221:page21-BT component unstuff 120221:page22-Change R185 from422 to 255ohm 120221:page24-chage SW1 P/N from DHP00AC1G01 to DHP00533B00 120221:page13-Remove L3 120221:page21-Remove L27, RP5, RP6, L26, L30, L28 120221:page17-Add IOAC circuit, R454, Q28, C518, R455,U23, R456, R457,, R460 Add Net WLAN_OFF, WLAN_OFF_R, IOAC_LANPWR#, PLTRST#_R, IOAC_RST# 120221:page24-Add R458, Add net PLTRST#_C 120221:page18-Add R459 120223:page9-Remove RP3,RP4, AddR461, R462, R463, R464 120223:page14-Change R88, R94, R103, R109 value from 100 to 120ohm and stuff 120223:page17-Add Q29, Q30, Add net PCIE_REQ_WLAN#_R, PCIE_WAKE#_WLAN_R

ZQE/G M/B BOARD

From

To

1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A

3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A 3A

Quanta Computer Inc. PROJECT : ZQZ Document Number

Rev 1A

CHANGE LIST Date:

5

ZQZ

PCBA NO.

REV:

DOC. NO :

APPROVED BY : Spruce Wu

CHECK BY :Martin Tsai

DRAWING BY : Allen Hsu

DATE :

4

3

C

B

A

Size

ZQZ

D

2

Thursday, February 23, 2012

Sheet

SHEET 1 1

32

of

32