• Author / Uploaded
• Mukhlish Mochammad

Citation preview

5

4

3

2

1

ZAB/ZAB A,B/ZYJA BLOCK DIAGRAM Channel A (TYP1)

DDR4-SODIMM1 P9

IMC

FP4 TDP: 15 W

SATA0

Carrizo (15h) 60h-6Fh Bristol (15h) 65h-6Fh

SATA1

STONEY (15H) 70h-7Fh

D

Channel B (TYP1 & 3)

DDR4-SODIMM2

SATA 0

P26

SATA 1

SATA - ODD P26

R16M GPU

PCIE 4~7 (TYP1)

R16M-M1-70 25W R16M-M1-30 25W

P16, P17

USB Charger SLGC55544VTR

I2C-1 (Touch Screen)

eDP/TS/CCD Con. USB2-2 (Touch)

DP0

USB2 - 5

P27

USB3 Con.

DP1

USB3.0

P18

DP0

HDMI Con.

Repeater

DP1

P19

USB3 - 1

P27

P19

ROM 128 kB 3.3 V

P28

P23

USB3 - 3

P28

GPP1 USB2-2

CC

P22

P2,3,4,5,6,7,8

GPP0

USB2-3

P31

M.2 WLAN+BT w/ Debug

X'TAL 32.768 kHz

USB2-5 (WLAN/BT)

POA

X'TAL 48 MHz

P21

USB2 CONN

I/O Board FFC CONN

USB2 CONN Phone Jack

USB2-0 & USB2-1

SPI

RJ45 CONN P21

LAN+Card Reader RTL841B

B

17" only

P23

GPP

USB2.0

USB2-4 (CCD) P28

M.2 SSD

GPP2

ASM 1061

USB Redriver

SPI ROM 8MB P6

1.8 V

C.R. CONN

Reset Button P30, 32

CLK

Azalia

HDA

BATT

RTC LPC

P7

BQ24737

G-Sensor

SMBUS

TPM NPCT650 P25 P24

P33

RT6575 P34

PS/2

P32

3.3 V

P35

+1.2VSUS

VGPU CORE

P40

P36

RT8068

P41

A

GPU_POWER / VDDC_GFX

DMIC P24

K/B CONN

LED P28

5

P39

P32

G5316

P24

1.8V

ISL62771

0.95V

ROM 128 kB

CPU CORE / VDDNB

RT8068

3V/5V

RT8237

EC IT8987E/BX

P37, P38

ISL62771

Batery Charger

P25

A

Speaker

B

P21

X'TAL 25 MHz

P27

AUDIO CODEC ALC255-CG

FPD@ : POA SSD@ : SSD SRD@: SATA's Redriver URD@: USB3's Redriver RP@: HDMI Repeater NRD@: no HDMI RPTR TYP_C@: Type C solution CRD@: Type-C's usb redriver

P20

X'TAL 20 MHz

P23

USB3 Type-C Con. MUX

CRT Con.

P20

DP2

USB2 - 7

C

DP to VGA

DP2

APU BGA 968

CZ@: CARRIZO/BRISTOL (TYP1) SP@: special part SP15@: 15" only SP17@: 17" only I2CT@: I2C TS EV@ : GPU Meso@: R16M-M1-70 GPU Exo@ : R16M-M1-30 GPU EV_SP@: GPU special part EV_4G@: 8 pcs VRAM TPM@ :TPM GS@ :G-sensor HDT@ : Debug KBL@ :KB Backlight IOAC@ :IOAC NAC@:non-IOAC

X'TAL 27 MHz

I2C-0 (Touchpad)

D

VRAM DDR3_256 Mb x16 *4 pcs = 2 GB VRAM DDR3_256 Mb x16 *8 pcs = 4 GB

P11,12,13,14,15

I2C

USB2 - 6 USB3 - 2

P27

P28

1 channel,dual-rank

USB2-4 (CCD)

USB3 Con.

C

PCIE 0~3 (TYP1 & 3)

S3_23mm X 23mm

P10

SATA - HDD

PEG TX/RX

VRAM

4

P30

K/B BL CONN P30

HALL SENSOR

FAN CONN (DAC) P30

P18

3

Touch Pad CONN P29

I2C-0 (TYP1&3) CZ@ :CARRIZO/BRISTOL (TYP1) CZL@ :CARRIZO-L (TYP2) TYP3@: STONEY TYP13@ : CZ/BR & ST TYP12@ : CZ/BR & CZL TYP23@ : CZL & ST 2

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

Block Diagram Date:

Friday, January 29, 2016

Sheet 1

1

of

45

1

2

3

4

5

6

7

8

2

(CPU) A

AC-coupling capactior(depend on GenX, not TYPE) TYP1&3:(220nF)CH4222K9B04: Only Gen3 and Both of Gen2&3 TYP2 :(100nF)CH4103K1B08: Only Gen2

U31B

A

PCIE

TYP2 no Gen3 LAN

B

1.05V VDDP only for CZ with DDR-2133 memory If running DDR-1866 or slower memory, Platform VDDP should be set to 0.95V TYP13: (196R_CS11962FB00) CZL:(1.69K_CS21692FB01)

[21] PCIE_RXP0 [21] PCIE_RXN0

WLAN

[22] PCIE_RXP1 [22] PCIE_RXN1

SSD

[23] PCIE_RXP2 [23] PCIE_RXN2

VDDP_0.95V

R440

196/F_4

P_GPP_RXP[0]

P_GPP_TXP[0]

P_GPP_RXN[0]

P_GPP_TXN[0]

T6 T5

P_GPP_RXP[1]

P_GPP_TXP[1]

P_GPP_RXN[1]

P_GPP_TXN[1]

T9 T8

P_GPP_RXP[2]

P_GPP_TXP[2]

P_GPP_RXN[2]

P_GPP_TXN[2]

P7 P6

P_GPP_RXP[3]

P_GPP_TXP[3]

P_TX_ZVDD_095 U7

P_GPP_RXN[3] P_ZVDDP

R1 R2

PCIE_TXP0_C PCIE_TXN0_C

C628 C629

0.1U/16V/X7R_4 0.1U/16V/X7R_4

R4 R3

PCIE_TXP1_C PCIE_TXN1_C

C621 C622

0.1U/16V/X7R_4 0.1U/16V/X7R_4

N1 N2

PCIE_TXP2_C PCIE_TXN2_C

C626 C627

0.1U/16V/X7R_4 0.1U/16V/X7R_4

P_ZVSS/P_RX_ZVDDP

U6

P_RX_ZVDD_095

M2 M1

PEG_TXP0_C PEG_TXN0_C

C568 C569

[email protected]/10V_4 [email protected]/10V_4

L1 L2

PEG_TXP1_C PEG_TXN1_C

C566 C565

[email protected]/10V_4 [email protected]/10V_4

L4 L3

PEG_TXP2_C PEG_TXN2_C

C570 C571

[email protected]/10V_4 [email protected]/10V_4

J1 J2

PEG_TXP3_C PEG_TXN3_C

C564 C563

[email protected]/10V_4 [email protected]/10V_4

J4 J3

PEG_TXP4_C PEG_TXN4_C

C572 C573

[email protected]/10V_4 [email protected]/10V_4

H2 H1

PEG_TXP5_C PEG_TXN5_C

C562 C561

[email protected]/10V_4 [email protected]/10V_4

G1 G2

PEG_TXP6_C PEG_TXN6_C

C574 C575

[email protected]/10V_4 [email protected]/10V_4

G4 G3

PEG_TXP7_C PEG_TXN7_C

C559 C560

[email protected]/10V_4 [email protected]/10V_4

R439

LAN

PCIE_TXP1 [22] PCIE_TXN1 [22]

WLAN

PCIE_TXP2 [23] PCIE_TXN2 [23]

SSD

196/F_4

[11] PEG_RXP0 [11] PEG_RXN0 [11] PEG_RXP1 [11] PEG_RXN1 [11] PEG_RXP2 [11] PEG_RXN2

P10 P9

P_GFX_RXP[0]

P_GFX_TXP[0]

P_GFX_RXN[0]

P_GFX_TXN[0]

N6 N5

P_GFX_RXP[1]

P_GFX_TXP[1]

P_GFX_RXN[1]

P_GFX_TXN[1]

N9 N8

P_GFX_RXP[2]

P_GFX_TXP[2]

P_GFX_RXN[2]

P_GFX_TXN[2]

L7 L6 L10 L9

[11] PEG_RXP4 [11] PEG_RXN4

K6 K5

[11] PEG_RXP6 [11] PEG_RXN6 [11] PEG_RXP7 [11] PEG_RXN7

P_GFX_RXP[3]

P_GFX_TXP[3]

P_GFX_RXN[3]

P_GFX_TXN[3]

P_GFX_RXP[4]

P_GFX_TXP[4]

P_GFX_RXN[4]

P_GFX_TXN[4]

P_GFX_RXP[5]

P_GFX_TXP[5]

P_GFX_RXN[5]

P_GFX_TXN[5]

K9 K8

P_GFX_RXP[6]

P_GFX_TXP[6]

P_GFX_RXN[6]

P_GFX_TXN[6]

J7 J6

P_GFX_RXP[7]

P_GFX_TXP[7]

P_GFX_RXN[7]

P_GFX_TXN[7]

FP4 REV 0.93

PEG_TXP1 [11] PEG_TXN1 [11] PEG_TXP2 [11] PEG_TXN2 [11] PEG_TXP3 [11] PEG_TXN3 [11]

X8 : TYP1 (GEN3)

[11] PEG_RXP3 [11] PEG_RXN3

PEG_TXP0 [11] PEG_TXN0 [11]

X4 : TYP2 (GEN2) X4 : TYP3 (GEN3)

X4 : TYP2 (GEN2) X4 : TYP3 (GEN3)

X8 : TYP1 (GEN3)

P_GPP_TXN[3]

N4 N3

PCIE_TXP0 [21] PCIE_TXN0 [21]

B

[11] PEG_RXP5 [11] PEG_RXN5

C

U10 U9

PEG_TXP4 [11] PEG_TXN4 [11] PEG_TXP5 [11] PEG_TXN5 [11]

C

PEG_TXP6 [11] PEG_TXN6 [11] PEG_TXP7 [11] PEG_TXN7 [11]

AC-coupling capactior(depend on GenX, not TYPE) TYP1&3:(220nF)CH4222K9B04: Only Gen3 and Both of Gen2&3 TYP2 :(100nF)CH4103K1B08: Only Gen2

SP@FP4

D

D

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

FP4 PCIE I/F(1/7) Date: 1

2

3

4

5

6

Monday, February 15, 2016 7

Sheet

2

of 8

45

1

2

3

4

5

6

7

8

3

(CPU) Channel A:CZ(TYP1) ONLY U31A

[9] M_A_A[13:0]

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13

A

[9] M_MA_BG1 [9] MEM_MA_ACT#

[9] [9] [9] [9]

U31I

MEMORY A

AE28 Y27 Y29 Y26 W 28 W 29 W 26 U29 W 25 U26 AG29 U27 T28 AK26 T26 T25

MA_ADD[0]

MA_DATA[0]

MA_ADD[1]

MA_DATA[1]

MA_ADD[2]

MA_DATA[2]

MA_ADD[3]

MA_DATA[3]

MA_ADD[4]

MA_DATA[4]

MA_ADD[5]

MA_DATA[5]

MA_ADD[6]

MA_DATA[6]

MA_ADD[7]

MA_DATA[7]

MA_ADD[9]

MA_DATA[8]

MA_ADD[10]

MA_DATA[9]

MA_ADD[11]

MA_DATA[10]

MA_ADD[12]

MA_DATA[11]

MA_ADD[13]

MA_DATA[12]

MA_ADD[14]/MA_BG[1]

MA_DATA[13]

MA_ADD[15]/MA_ACT_L

MA_DATA[14]

M_A_BS#0 M_A_BS#1 M_MA_BG0 M_A_DM[7..0]

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

MA_DATA[16]

AG26 AG27 T29

MA_BANK[0]

MA_DATA[17]

MA_BANK[1]

MA_DATA[18]

MA_BANK[2]/MA_BG[0]

MA_DATA[19] MA_DATA[20]

E19 D21 K21 F29 AP28 AV26 AR22 BC22 K29

MA_DM[0]

MA_DATA[21]

MA_DM[1]

MA_DATA[22]

MA_DM[2]

MA_DATA[23]

B

[9] [9] [9] [9] [9] [9] [9] [9] [9] [9] [9] [9] [9] [9] [9] [9]

M_A_DQS0 M_A_DQS#0 M_A_DQS1 M_A_DQS#1 M_A_DQS2 M_A_DQS#2 M_A_DQS3 M_A_DQS#3 M_A_DQS4 M_A_DQS#4 M_A_DQS5 M_A_DQS#5 M_A_DQS6 M_A_DQS#6 M_A_DQS7 M_A_DQS#7

MA_DM[4]

MA_DATA[24]

MA_DM[5]

MA_DATA[25]

MA_DM[6]

MA_DATA[26]

MA_DM[7]

MA_DATA[27]

MA_DM[8]

MA_DATA[28]

MA_DQS_H[0]

MA_DATA[30]

MA_DQS_L[0]

MA_DATA[31]

[9] [9] [9] [9]

M_A_CLK0 M_A_CLK0# M_A_CLK1 M_A_CLK1#

M_MA_CLK2_P TP28 M_MA_CLK3_P TP21

MA_DQS_L[1]

MA_DATA[32]

MA_DQS_H[2]

MA_DATA[33]

MA_DQS_L[2]

MA_DATA[34]

MA_DQS_H[3]

MA_DATA[35]

MA_DQS_L[3]

MA_DATA[36]

MA_DQS_H[4]

MA_DATA[37]

MA_DQS_L[4]

MA_DATA[38]

MA_DQS_H[5]

[9] M_A_RESET# [9] M_A_EVENT#

MA_DATA[39]

MA_DQS_H[6]

MA_DATA[40]

MA_DQS_L[6]

MA_DATA[41]

MA_DQS_H[7]

MA_DATA[42]

MA_DQS_L[7]

MA_DATA[43]

MA_DQS_H[8]

MA_DATA[44]

MA_DQS_L[8]

MA_DATA[45]

MA_CLK_H[0]

MA_DATA[47]

P27 P29

[9] M_A_CKE0 [9] M_A_CKE1

MA_CLK_H[1]

MA_DATA[48]

MA_CLK_L[1]

MA_DATA[49]

MA_CLK_H[2]

MA_DATA[50]

MA_CLK_L[2]

MA_DATA[51]

MA_CLK_H[3]

MA_DATA[52]

MA_CLK_L[3]

MA_DATA[53]

MA_RESET_L

MA_DATA[55]

MA_CKE0

MA_DATA[57]

MA_CKE1

MA_DATA[58] MA_DATA[60] MA_DATA[61]

TP25 TP26 [9] M_A0_CS#0 [9] M_A0_CS#1 TP27 TP29

AK27 AL26 MEM_MA1_ODT0 AH25 MEM_MA1_ODT1 AL25

MA0_ODT[0]

MA_DATA[62]

MA0_ODT[1]

MA_DATA[63]

MA1_ODT[1]

MA_CHECK[0]

MA0_CS_L[0]

MA_CHECK[2]

MA0_CS_L[1]

MA_CHECK[3]

MA1_CS_L[0]

MA_CHECK[4]

MA1_CS_L[1]

MA_CHECK[5] MA_CHECK[6] MA_CHECK[7]

AG24 AK29 AH28

[9] M_A_RAS# [9] M_A_CAS# [9] M_A_WE#

TP57 TP64

APU_MA_VREFDQ B19 APU_M_VREF_SUS T32

AN26 AP29 AR26 AP24 AN29 AN27 AR29 AR27 AU26 AV29 AU25 AW 25 AU29 AU28 AW 26 AT25

M_A_DQ[0..63]

[9]

[10] M_B_A[13:0]

M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

MB_DATA[2]

MB_ADD[3]

MB_DATA[3]

MB_ADD[4]

MB_DATA[4]

MB_ADD[5]

MB_DATA[5]

MB_ADD[6]

MB_DATA[6]

MB_ADD[7]

MB_DATA[7]

M_B_DQS0 M_B_DQS#0 M_B_DQS1 M_B_DQS#1 M_B_DQS2 M_B_DQS#2 M_B_DQS3 M_B_DQS#3 M_B_DQS4 M_B_DQS#4 M_B_DQS5 M_B_DQS#5 M_B_DQS6 M_B_DQS#6 M_B_DQS7 M_B_DQS#7

M_B_CLK0 M_B_CLK0# M_B_CLK1 M_B_CLK1#

AE33 AE32 AE30 AE31 AD32 AD33 AC33 AC32

MB_ADD[9]

MB_DATA[9]

MB_ADD[11]

MB_DATA[10]

MB_ADD[12]

MB_DATA[11]

MB_ADD[13]

MB_DATA[12]

MB_ADD[14]/MB_BG[1]

MB_DATA[13]

MB_ADD[15]/MB_ACT_L

MB_DATA[14]

MB_BANK[0]

MB_DATA[17]

MB_BANK[1]

MB_DATA[18]

MB_BANK[2]/MB_BG[0]

MB_DATA[19]

MB_DM[0]

MB_DATA[21]

MB_DM[1]

MB_DATA[22]

MB_DM[2]

[10] M_B_CKE0 [10] M_B_CKE1

MB_DATA[23]

MB_DM[4]

MB_DATA[24]

MB_DM[5]

MB_DATA[25]

MB_DM[6]

MB_DATA[26]

MB_DM[7]

MB_DATA[27]

MB_DM[8]

MB_DATA[28]

MB_DQS_H[0]

MB_DATA[30]

MB_DQS_L[0]

MB_DATA[31]

MB_DQS_L[1]

MB_DATA[32]

MB_DQS_H[2]

MB_DATA[33]

MB_DQS_L[2]

MB_DATA[34]

MB_DQS_H[3]

MB_DATA[35]

MB_DQS_L[3]

MB_DATA[36]

MB_DQS_H[4]

MB_DATA[37]

MB_DQS_L[4]

MB_DATA[38]

MB_DQS_H[5]

MB_DATA[39]

MB_DQS_H[6]

MB_DATA[40]

MB_DQS_L[6]

MB_DATA[41]

MB_DQS_H[7]

MB_DATA[42]

MB_DQS_L[7]

MB_DATA[43]

MB_DQS_H[8]

MB_DATA[44]

MB_DQS_L[8]

MB_DATA[45]

MB_CLK_H[0]

MB_DATA[48]

MB_CLK_L[1]

MB_DATA[49]

MB_CLK_H[2]

MB_DATA[50]

MB_CLK_L[2]

MB_DATA[51]

MB_CLK_H[3]

MB_DATA[52]

MB_CLK_L[3]

MB_DATA[53]

MB_RESET_L

MB_DATA[55]

MB_CKE0

MB_DATA[57]

MB_CKE1

MB_DATA[58]

MB0_ODT[0]

MB_DATA[62]

MB0_ODT[1]

MB_DATA[63]

MB1_ODT[1]

MB_CHECK[0]

MB0_CS_L[0]

MB_CHECK[2]

MB0_CS_L[1]

MB_CHECK[3]

MB1_CS_L[0]

MB_CHECK[4]

MB1_CS_L[1]

MB_CHECK[5] MB_CHECK[7]

+1.2VSUS

MA_WE_L/MA_WE_L_ADD[14]

MA_ZVDDIO R210

APU_MB_VREFDQ A19

[email protected]/F_4

J30 J31 L33 L32 H32 H33 L30 L31

M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31

AN31 AP32 AT32 AU32 AN33 AN32 AR31 AT33

M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39

AU30 AV32 BA33 AY32 AU33 AU31 AW 31 AY33

M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47

BC31 BB30 BB28 AY27 BB32 BA31 BC29 BB29

M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55

BB27 BB26 BB24 AY23 BA27 BC27 BC25 BB25

M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQ[0..63]

[10]

A

B

C

MB1_ODT[0]

MB_CHECK[6]

[10] M_B_RAS# [10] M_B_CAS# [10] M_B_WE#

AH33 AK32 AJ31

M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23

MB_EVENT_L

N30 N31 R33 R32 M32 M33 R30 R31

MB_RAS_L/MB_RAS_L_ADD[16] MB_CAS_L/MB_CAS_L_ADD[15]

+1.2VSUS

MB_WE_L/MB_WE_L_ADD[14]

MB_VREFDQ

MB_ZVDDIO_MEM_S

AF32

MB_ZVDDIO R643

39.2/F_4

TP56

M_VREF FP4 REV 0.93

R646 R648

MB_DATA[47]

MB_CLK_H[1]

MB_CHECK[1]

AJ33 AL32 AJ30 AL33

E30 E31 G33 G32 C33 D33 G30 G31

MB_CLK_L[0]

MB_DATA[61]

[10] M_B0_CS#0 [10] M_B0_CS#1

M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15

MB_DQS_L[5]

MB_DATA[60]

AL30 AM32 AJ32 AM33

A29 C29 B32 D32 B28 B29 A31 C31

MB_DQS_H[1]

MB_DATA[59]

[10] M_B0_ODT0 [10] M_B0_ODT1

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7

MB_DM[3]

MB_DATA[56]

U32 U33

FP4 REV 0.93

SP@FP4

+1.2VSUS

MB_DATA[8]

MB_ADD[10]

MB_DATA[54]

T33 AG30

A25 C25 C27 D27 B24 B25 B27 A27

MB_ADD[8]

MB_DATA[20]

D25 D29 E33 J33 AR30 AW 30 BC30 BC26 N33 B26 A26 B30 A30 F32 E32 K32 J32 AR32 AR33 AW 32 AW 33 BA29 AY29 BA25 AY25 P32 N32

[10] M_B_RESET# [10] M_B_EVENT#

K26 K28 N26 N28 J29 K25 L29 N25

AD29

MB_DATA[1]

MB_ADD[2]

MB_DATA[46]

MA_CAS_L/MA_CAS_L_ADD[15]

MA_ZVDDIO_MEM_S

M_B_BS#0 M_B_BS#1 M_MB_BG0 M_B_DM[7..0]

[10] [10] [10] [10]

MA_RAS_L/MA_RAS_L_ADD[16]

MA_VREFDQ

MB_DATA[0]

MB_ADD[1]

MB_DATA[29]

M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47

BB23 BB22 BB20 AY19 BA23 BC23 BC21 BB21

MB_ADD[0]

MB_DATA[15]

AH32 AG33 W 31

[10] [10] [10] [10] [10] [10] [10] [10] [10] [10] [10] [10] [10] [10] [10] [10]

M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39

M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55

MEMORY B

AG31 AC30 AC31 AB32 AA32 AA33 AA31 Y33 AA30 W 32 AG32 Y32 W 33 AL31 W 30 V32

MB_DATA[16]

[10] [10] [10] [10]

M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31

AV23 AW 23 AV20 AW 20 AR23 AT23 AR20 AT20

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13

[10] M_MB_BG1 [10] MEM_MB_ACT#

MA1_ODT[0] MA_CHECK[1]

AH26 AL29 MEM_MA1_CS#0 AH29 MEM_MA1_CS#1 AL28

F26 E27 J26 J27 H25 E26 G28 G29

MA_EVENT_L

MA_DATA[59]

[9] M_A_ODT0 [9] M_A_ODT1

M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23

MA_CLK_L[0]

MA_DATA[56]

C

G22 H22 E25 G25 J20 E22 H23 J23

MA_DQS_L[5]

MA_DATA[54]

N29 AE29

M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15

MA_DQS_H[1]

MA_DATA[46]

AE25 AE26 AD26 AD27 AB28 AB29 AB25 AB26

A21 C21 C23 D23 B20 B21 B23 A23

MA_DM[3]

MA_DATA[29]

H19 G19 B22 A22 F23 E23 G27 F27 AP25 AP26 AW 27 AV27 AV22 AU22 BA21 AY21 L27 L26

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7

MA_ADD[8]

MA_DATA[15]

M_A_BS#0 M_A_BS#1 M_MA_BG0

H17 J17 F20 H20 E17 F17 K18 E20

SP@FP4

*1K/F_4 *1K/F_4

routed near APU 2015-11-10 SCL v1.11

D

D

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

FP4 DDR I/F(2/7) Date: 1

2

3

4

5

6

Monday, February 15, 2016 7

Sheet

3 8

of

45

1

2

3

4

5

6

7

8

4

(CPU) VDD_18

Soldermask openings for all bottom side vias/TPs under FP4 U31C

300_4 300_4

APU_PWRGD APU_RST#

DISPLAY/SVI2/JTAG/TEST

B6 A6

[20] DP2_TX0 [20] DP2_TX0#

VGA

33S0_18S0

DP2_TXP[0]

DP_ZVSS

DP2_TXN[0]

DP_AUX_ZVSS

A9 B9 G5 G6 F11

DP_BLON

D7 C7

[20] DP2_TX1 [20] DP2_TX1#

DP2_TXP[1]

DP_DIGON

DP2_TXN[1]

DP_VARY_BL

A7 B7

DP2_TXP[2]

D9 C9

DP2_TXP[3]

A2 A3

DP1_TXP[0]

DP2_AUXP

[19] INT_HDMITX1P [19] INT_HDMITX1N

B4 A4

DP1_TXP[1]

[19] INT_HDMITX0P [19] INT_HDMITX0N

D5 C5

DP1_TXP[2]

DP2_HPD

DP2_TXN[3]

DP1_AUXN

(XX,PD)

DP1_TXN[0]

DP1_HPD

DP0_AUXP

DP1_TXN[1]

DP0_AUXN

(XX,PD)

DP0_HPD

DP1_TXN[2]

RSVD_1

TEMPIN0

A5 B5

[19] INT_HDMICLK+ [19] INT_HDMICLK-

DP1_TXP[3]

TEMPIN1

CZ:1.8_S0 CZL:3V_S0

DP1_TXN[3]

TEMPIN2

TEMPINRETURN

VDD_18

E2 E1

[18] EDP_TX0 [18] EDP_TX0#

eDP

DP0_TXP[0]

TEST410

DP0_TXN[0]

TEST411 TEST4

[18] EDP_TX1 [18] EDP_TX1#

E3 E4

DP0_TXP[1] DP0_TXN[1]

TEST6

[18] EDP_TXP2 [18] EDP_TXN2

D1 D2

DP0_TXP[2]

TEST10

DP0_TXN[2]

TEST14

[18] EDP_TXP3 [18] EDP_TXN3

C1 B1

DP0_TXP[3]

TEST16

DP0_TXN[3]

TEST17

TEST5

TEST9

R590 R575 R627 *1K/F_4 *1K/F_4 *2.2K_4

R578 *1K/F_4

R596 R605 R595 *CZ@1K/F_4 *CZ@1K/F_4 *CZ@1K/F_4

APU_SVT APU_SVC APU_SVD APU_PWRGD_SVID_REG B

R586 *220_4

R576 *220_4

GFX_SVT GFX_SVC GFX_SVD

R592 *CZ@220_4

R617 *220_4

R601 *CZ@220_4

eDP 4k*2k

TEST15

TEST11

APU_SVC_R APU_SVD_R

C15 D17 D19

*shortCZ@0_4 GFX_SVC_R *shortCZ@0_4 GFX_SVD_R

B15 B16 A18

*APU_SVT & GFX_SVT need 0R in power side

[38] APU_SVT [38] APU_SVC [38] APU_SVD

R583 R572

[39] GFX_SVT [39] GFX_SVC [39] GFX_SVD

R588 R591

*short_4 *short_4

SVT0

TEST18

SVC0

[38,39]

SVC

APU_PWRGD_D

R616 R626

*short_4 HDT@0_4

TEST19

SVT1

TEST28_H

SVC1

TEST28_L

SVD1

TEST31

APU_PWRGD APU_RST#

Boot Voltage

1.1V 1.0V 0.9V 0.8V

0 1 0 1

APU_SIC APU_SID

B18 C17

SIC

APU_RST# APU_PWRGD

D15 C19

RESET_L

APU_PROCHOT# A15 APU_ALERT# B17

VID Override table (VDD)

SVD

0 0 1 1

APU_PWRGD_SVID_REG

C703 *27p/50V_4

TYP13 : 1.8V CZL : 3.3V

[18,33]

APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#

C663 *27p/50V_4

SID

CZL:3V_S0 CZL:3V_S0

TEST37

H9 G9 E9

LCD 3.3V

3

APU_DISP_PWM

F7 E7 F5

APU_DIGON

R467

A

*short_4

TYP13 : 1.8V CZL : 3.3V

HDMI_DDCCLK_SW [19] HDMI_DDCDATA_SW [19] INT_HDMI_HPD [19]

F8 E8 G8

APU_DISP_ON

RSVD

A13 B13 P26 E11 A17

APU_TEST28_H APU_TEST28_L APU_TEST31 DP_STEREOSYNC

TP20 TP15 TP12 TP10

APU_TEMPIN0 APU_TEMPIN1 APU_TEMPIN2 APU_TEMPRETURN APU_TEST410 APU_TEST411 APU_TEST4 APU_TEST5

+3V

DP2_AUX# DP2_AUX R556

R237 R238

*100K/F_4 *100K/F_4

*0_4

DNI: VGA doesn't need it.

TP19 TP24 TP23 TP22

APU_TEST14 APU_TEST15 APU_TEST16 APU_TEST17 APU_TEST11 APU_TEST18 APU_TEST19

[18]

EN:>1.5V

EDP_AUX [18] EDP_AUX# [18] EDP_HPD [18]

K24 E15 E14 E12 F14 AK24 AL24 P24 N24 AN24 AB8 Y9 B10 D11 A10 C11 B11 A14 B14

[18]

Q36 PJA138K

DP2_AUX [20] DP2_AUX# [20] DP2_HPD [20]

TP48

R536

*1K/F_4

R537 R558 R557 R554 R555

*1K/F_4 *1K/F_4 *CZ@1K/F_4 1K/F_4 1K/F_4

R649 R647 R561 R560 R607 R608

*39.2/F_4 *39.2/F_4 1K/F_4 *1K/F_4 *CZ@1K/F_4 *CZ@1K/F_4

PROCHOT_L ALERT_L

APU_TEST37

VDDCR_NB_SENSE

TDO

VDDCR_CPU_SENSE

TCK

VDDP_SENSE

H11 J12 G12 AY18

R527 R550 R573

TMS TRST_L

VSS_SENSE

M_TEST CONNECTION TBD

VDD_18 33S0_18S0

PU ->enable HDMI video/audio PD->Disable HDMI audio

VDD_18

TP53 TP50 TP49 TP30

CZ:1.8_S0 CZL:3V_S0 CZL:3V_S0

TDI

B

TP54 TP51

PWROK

VDDCR_GFX_SENSE

H15 H14 D13 G15 J14 C13 A11

R517 10K/F_4

1

SVD0

DP_STEREOSYNC/TEST36

VFIX MODE

APU_DIGON APU_BLPWM

CZ:1.8_S0 CZL:3V_S0 DP1_AUXP

[19] INT_HDMITX2P [19] INT_HDMITX2N

VDD_18

2K/F_4 150/F_4 APU_DISP_BLEN

DP2 : Type 1 & 3 only

DP2_TXN[2]

DP2_AUXN

Serial VID

R532 R533

APU_BLPWM

A

HDMI

DP_ZVSS DP_AUX_ZVSS

+3V

2

R633 R545

H12 APU_VSS_SENSE

DBRDY DBREQ_L

APU_VDDGFX_RUN_FB_H [39] APU_VDDNB_RUN_FB_H [38] APU_VDD_RUN_FB_H [38] APU_VDDP_RUN_FB_H [36] APU_VDD_RUN_FB_L [38] (APU_VDD_RUN_FB_L = APU_VDDNB_RUN_FB_L) APU_VDDGFX_RUN_FB_L [39] APU_VDDP_RUN_FB_L [36]

*short_4 *shortCZ@0_4 *0_4

CRB CLOSE TO APU

FOR DEBUG, PLACE THESE CAPS CLOSE TO APU FP4 REV 0.93

SP@FP4

+3V

33S0_18S0 33S0_18S0

C

HDT(Hardware Debug Tool ) Connector

VDD_18

3V_S0 [33,34,38,39]

2 APU_PWRGD_D 3

1A GND 2A

1Y VCC 2Y

6

3

4

APU_PROCHOT#

1K/F_4 1K/F_4 1K/F_4 1K/F_4

APU_SIC APU_SID APU_ALERT# APU_PROCHOT#

C

2

5V_S0

6

1

R642

VDD_18

APU_ALERT#

*short_4

33S0_18S0

APU_RST_L_BUF PJT138K

5 4

APU_PWROK_BUF

HDT@SN74LVC2G07DCKR VDD_18

R639 R641 R638 R636

5

[31] THERM_ALERT#

U33

1

Q41

CORE_PWM_PROCHOT#

C719 [email protected]/16V/X7R_4

APU_RST#

R635 10K/F_4

SMBUS (Internal Thermal sensor)

VDD_18

VDD_18 33S0_18S0

PLACE HDT+ HEADER ON TOP CN7 R160 HDT@1K/F_4 APU_TRST#

C218 [email protected]/50V_4

R161 R162 R163 R164

HDT@33_4 HDT_TRST# HDT@10K/F_4 HDT@10K/F_4 HDT@10K/F_4

1 3 5 7 9 11 13 15 17 19

CPU_VDDIO

CPU_TCK

GND

CPU_TMS

GND

CPU_TDI

GND

CPU_TDO

CPU_TRST_L

CPU_PWROK_BUF

CPU_DBRDY3

CPU_RST_L_BUF

CPU_DBRDY2 CPU_DBRDY1

CPU_DBRDY0 CPU_DBREQ_L

GND

CPU_PLLTEST0

CPU_VDDIO

CPU_PLLTEST1

APU_TCK APU_TMS HDT_APU_TDI R564 APU_TDO APU_PWROK_BUF APU_RST_L_BUF APU_DBRDY HDT_DBREQ# R569 APU_TEST19 APU_TEST18

2 4 6 8 10 12 14 16 18 20

HDT@0_4

R562 R563 APU_TDI R565 R566 R567

HDT@1K/F_4 HDT@1K/F_4 HDT@1K/F_4

Q43

5 [12,33]

HDT@1K/F_4 HDT@1K/F_4

HDT@33_4 APU_DBREQ# R568

2ND_MBCLK

3V_S5 (PU in EC side )

HDT@1K/F_4

[12,33]

2ND_MBDATA

3

4

APU_SIC

1

APU_SID

2 6

D

D

*HDT@HDT

PJT138K C674 *[email protected]/50V_4

C675 [email protected]/50V_4

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

FP4 DISPLAY/MISC(3/7) Date: 1

2

3

4

5

6

Thursday, March 03, 2016 7

Sheet

4 8

of

45

1

2

3

4

5

6

7

8

5

(CPU) VDD_18_S5 (CZ,CZL) U31D

R418 15K/F_4

D11

[33] RSMRST#

C669

150P/50V_4

C643

150P/50V_4

R553 R478

[22,25,33] PLTRST# [11,18,21,22,23] PCIERST#

PCH_RSMRST#_R

RB500V-40 10ms RC-delay

A

LPC_RST#_R BB12 PCIE_RST# AN7

33_4 33_4

C602 0.1u/16V_4

[33] DNBSWON#

[12,21,22]

AE1 BC9 AF2 AG2

SYS_PWRGD SYS_RST# *short_4 PCIE_WAKE# *EV@100P/50V_4

R433 C615

PCIE_LAN_WAKE#

AE4

[33] SUSB# [33] SUSC#

+3V_S5 R434

NAC@10K/F_4

PCIE_WAKE#

S0A3 [43] APU_S5_MUX_CTRL

R82 R83 R81 R436 R442 R104

10K/F_4 10K/F_4 10K/F_4 10K/F_4 10K/F_4 10K/F_4

R80 R100

10K/F_4 *10K/F_4

LR_LED_L S0A3 DNBSWON# USB_OC1# USB_OC2# USB_OC3#

APU_TEST0 APU_TEST1 APU_TEST2 [33] SIO_RCIN# [33] SIO_A20GATE [33] SIO_EXT_SCI#

LR_LED_L R603 R589 R602 R598

2.2K_4 2.2K_4 10K/F_4 10K/F_4

CLK_SCLK CLK_SDATA CLK_REQ3_L PCIE_REQ_GPU#_R

[21] PCIE_REQ_LAN# [22] PCIE_CLKREQ_WLAN# TP55 R597

[12] PCIE_REQ_GPU# R156

10K/F_4

[28] [27] [27] [27]

AGPIO69

B

R429

+3V_S5

1

J1

2

R159 R544 R529 R528 R531 R121 R126 R540

CZ@1K/F_4 CZ@1K/F_4 CZ@1K/F_4 CZ@1K/F_4 *10K/F_4 10K/F_4 10K/F_4 *10K/F_4

ACZ_BCLK_R

33_4

R525 R530 R542

[24] PCH_AZ_CODEC_RST# [24] PCH_AZ_CODEC_SYNC [24] PCH_AZ_CODEC_SDOUT

ACZ_RST#_R ACZ_BCLK_R ACZ_SYNC_R ACZ_SDOUT_R PCH_AZ_CODEC_SDIN0 AZ_SDIN1 AZ_SDIN2 ACZ_BCLK_R

[30] [30] [18] [18]

33_4 33_4 33_4

BB10 BB9 BB7 BC7

I2C_SCL_TP I2C_SDA_TP I2C_SCL_TS I2C_SDA_TS

SYS_RESET_L/AGPIO1 WAKE_L/AGPIO2

R112

TEST0 TEST1/TMS TEST2

(,PD) (,PD) (,PD)

GA20IN/AGPIO126

SP@10K/F_4 SP@10K/F_4

I2C_SCL_TS I2C_SDA_TS

3V_S0 3V_S0 3V_S5 3V_S0

32K_X1

C636

Y4 32.768KHZ

SD0_DATA1/EGPIO98 SD0_DATA2/EGPIO99 SD0_DATA3/EGPIO100 SD0_LED/EGPIO93

SCL0/I2C2_SCL/EGPIO113 SDA0/I2C2_SDA/EGPIO114

(PU,) (PU,)

ESPI_RESET_L/KBRST_L/AGPIO129

SCL1/I2C3_SCL/AGPIO19 SDA1/I2C3_SDA/AGPIO20

(PU,PU) (PU,PU) (PU,PU) (PU,PU)

(PU,PU) AGPIO3 (PD,) AGPIO4 3.3V_S5 AGPIO5 (PD,PU) CZ ONLY (PU,PU) AGPIO6/LDT_RST (PD,PU) AGPIO7/LDT_PWROK (PU,) IR_TX0/USB_OC5_L/AGPIO13 (PU,PU) IR_TX1/USB_OC6_L/AGPIO14 AGPIO8 3V_S5 (PU,PU) (PD,PU) IR_RX1/AGPIO15 AGPIO9 (PU,PU) IR_LED_L/LLB_L/AGPIO12 VDDGFX_PD/AGPIO39 (,PU) CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92 AGPIO40 (PU,PU) (PD,PU) CLK_REQ1_L/AGPIO115 AGPIO64 (PU,PU) (PD,PU) CLK_REQ2_L/AGPIO116 AGPIO65 3V_S0 (,PU) CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131 (,PU) (PD,PU) CLK_REQG_L/OSCIN/EGPIO132 AGPIO66/SHUTDOWN_L (PD,PU) (PU,) USB_OC0_L/TRST_L/AGPIO16 AGPIO68/SGPIO_CLK (PU,PU) (,PU) 3.3V_S0 USB_OC1_L/TDI/AGPIO17 AGPIO69/SGPIO_LOAD (PD,PU) 3V_S5 (PU,PU) USB_OC2_L/TCK/AGPIO18 AGPIO71/SGPIO_DATAOUT (PU,PU) (PD,) USB_OC3_L/TDO/AGPIO24 AGPIO72/SGPIO_DATAIN LPC_PME_L/AGPIO22 LPC_SMI_L/AGPIO86

AC_PRES/USB_OC4_L/IR_RX0/AGPIO23

AZ_BITCLK/I2S_BCLK_MIC

SPKR/AGPIO91

AZ_SDIN0/I2S_DATA_MIC[0] AZ_SDIN1/I2S_LR_PLAYBACK AZ_SDIN2/I2S_DATA_MIC[1] AZ_RST_L/I2S_LR_MIC AZ_SYNC/I2S_BCLK_PLAYBACK AZ_SDOUT/I2S_DATA_PLAYBACK

I2C0_SCL/EGPIO145

AT1

AT2

BOARD_ID4 BOARD_ID5

BC3 BA3 BC5 BA5 BB6

BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 DGPU_PWREN_A

DGPU_RST_L [11] ODD_PLUGIN# [26] BOARD_ID4

[18]

(,PD) (,PD) (PU,PU) CZ:3V_S5 CZL:3V_S0 BLINK/USB_OC7_L/AGPIO11 S5 (,PD) (PD,) (PU,PU) GENINT1_L/AGPIO89 (PU,PU) GENINT2_L/AGPIO90 3.3V_S0 (PU,) FANIN0/AGPIO84 (PU,) FANOUT0/AGPIO85

BA15 AY17

CLK_SCLK [9,10,20,25] CLK_SDATA [9,10,20,25]

AG5 AG4

SCL1 SDA1

AL5 AL6 AJ1 AJ3 AH1 AJ4 AK5 AD8 AG8 AW15 AU15

GEVENT2# AGPIO4

AT15 AU12 AT14 AR14 BC13

AGPIO66

TP3 TP2

GEVENT2# [6] TP4 PCH_ODD_EN [26] ACCEL_INTA [25]

AGPIO8 S3_resume AGPIO64

AGPIO69

R99

2015.10.20 SCL v1.10 & DG v1.08 [33] TYP1: No connect (**) S3 resume time measure point

VDDGFX_PD

10K/F_4

TP7

Type 3 no these agpio pins, only for type 1 & 2 !!!

TP11 TP9 TP18 TP16

BA17

B

SPKR [24]

AN5

AGPIO11 [6]

BB14 BA19

TP17

BB14 AMD change pin name to HVBEN_L : default NC PE_PWRGD

BC18 BB19

[42] +3V

APU_TP_INT# [18] APU_I2C_INT# [30]

I2C0_SDA/EGPIO146 I2C1_SCL/EGPIO147

TPE13:1.8V_S0 CZL:3V

UART0_CTS_L/EGPIO135

I2C1_SDA/EGPIO148

RTCCLK

UART0_RXD/EGPIO136

3V_S5 (PU,)

UART0_RTS_L/EGPIO137 UART0_TXD/EGPIO138

1.8V_S0 CZ:1.8V_S0 CZL:1.8V_S5 1.8V_S0 1.8V_S0 (,PD) CZ:1.8V_S0 CZL:1.8V_S5

X32K_X1

X32K_X2

R473 20M_4

UART1_CTS_L/BT_I2S_BCLK/EGPIO140 UART1_RXD/BT_I2S_SDI/EGPIO141 UART1_RTS_L/EGPIO142 UART1_TXD/BT_I2S_SDO/EGPIO143 UART1_INTR/BT_I2S_LRCLK/AGPIO144

AY9 AW8 AV5 AV8 AW9

R181 *EV@100K/F_6

CZ : mount R1

AV11 AU7 AT11 AR11 AP9

R178

R1

*shortEV@0_4

D1 DGPU_PWREN_A

D3

[42] DGPU_PWREN

FP4 REV 0.93

*EV_SP@RB500V-40

SP@FP4

18p/50V_4

C637

C258 [email protected]/16V_4

2

R495 R488

I2C_SCL_TP I2C_SDA_TP

(PU,) (PU,)

SD0_DATA0/EGPIO97

UART0_INTR/AGPIO139

32K_X2 2.2K_4 2.2K_4

3V_S5 CZ ONLY

S5_MUX_CTRL/EGPIO42

BB2 BB5 BC2 BB4 AY5

A

(PD,PU) (PD,PU) 3.3V_S0 (PD,PU) (PD,PU) (PD,)

*33_4

VDD_18 R609 R610

3V_S5 (PU,PU) CZ:3V_S0 CZL:1.8V_S0 (PU,PU) (PU,PU)

SLP_S5_L

1

18p/50V_4

PWR_GOOD

(PD,PU) 3V_S0 SD0_WP/EGPIO101 3V_S0 SD0_PWR_CTRL/AGPIO102 (PU,PU) CZ:3V_S5 CZL:3V_S0 SD0_CD/AGPIO25 (PD,PU) SD0_CLK/EGPIO95 (PD,PU) SD0_CMD/EGPIO96

1.8V_S0

AG7

[6] RTC_CLK [22] SUS_CLK

2015-11-10 SCL v1.11

PWR_BTN_L/AGPIO0

S0A3_GPIO/AGPIO10

AU6 AR8 AP6 AR5 AU9 AT9 AR7

AZ_SDIN1 AZ_SDIN2 ACZ_RST#_R ACZ_SYNC_R ACZ_SDOUT_R

SYS_RST#

SYS_RST# internal 40K pull up

*SHORT_PAD

CLK_REQ3_L PCIE_REQ_GPU#_R

CC_OC# USB_OC1# USB_OC2# USB_OC3#

R541

[24] PCH_AZ_CODEC_BITCLK [24] PCH_AZ_CODEC_SDIN0

*10K/F_4

*EV@0_4

1.8V_S5

AE8 AH8

AG3 AD5 AL8 AN8 AE2 BC15 BB17 BC17 BB18 BB16 AH9 AG1 AH2 AL9

[34] ACPRESENT [28] APU_TypeC_UFP#

RSMRST_L

SLP_S3_L

AY15 BC19 AD7 BB13

+3V

3V_S5? S0? 3V_S5

AK7 AH5

AH6 AK8 AE3

SIO_EXT_SMI#

TP52

AGPIO8 S3_resume

ACPI/SD/AZ/GPIO/RTC/I2C/UART/MISC

PCIE_RST_L/EGPIO26

LPC_RST_L

TYP13 : I2C Touch interface:2.2K(CS22202JB18) None I2C interface:10k(CS31002FB26) CZL:NC

+3V

SYS PWRGD

R182 *EV@1M/F_4

>1 mS delay is required between all MXM power rail stable and MXM_PWREN(enables the module internal power)

C

C

R463 4.7K_4 [33] EC_PWROK [6] SYS_RST# SUSB#

D13

1N4148WS

D12

*1N4148WS

D14

SYS_PWRGD_R

*1N4148WS

DGPU_PWREN_A R457

C625 0.22u/10V_4

+3V_S5

*short_4

SYS_PWRGD

BOARD ID +3V

R458

Test mode setting (Follow AMD's suggestion) NC,no install by default 15K/F_4

R426

*2.2K_4

APU_TEST2

R423

15K/F_4

TEST1

0

0

TEST0 0

[33] HWPG

Description FCH TAP accessible from APU when TAPEN is asserted FCH JTAG pins are overloaded for multiple functions, in this configuration the FCH JTAG are used as non-JTAG pins

D15

*CZ@RB500V-40

R447

VRON

CZ@47K_4

VDDGFX_EN

0

0

1

Reserved

0

1

X

Reserved

1

TMS

0

FCH JTAG multi-function pins are configured as JTAG pins, in this configuration the FCH TAP can be accessed from FCH JTAG pins

Q34

1

VDDGFX_PD

R435

SP@10K/F_4 BOARD_ID0 SP@10K/F_4 BOARD_ID1 SP@10K/F_4 BOARD_ID2 IOAC@10K/F_4BOARD_ID3 BOARD_ID4 10K/F_4 SP17@10K/F_4BOARD_ID5

High

R119 R113 R114 R109 R483 R125

SP@10K/F_4 SP@10K/F_4 SP@10K/F_4 NAC@10K/F_4 *10K/F_4 SP15@10K/F_4

Low

BOARD_ID0

dTPM

iTPM

BOARD_ID1

dGPU

UMA

BOARD_ID2

non-G sensor G sensor

BOARD_ID3

IOAC

non-IOAC

BOARD_ID4

Touch

non-Touch

BOARD_ID5

17"

15"

D

[39]

3

[33,38]

ZYV BOARD_ID4 Depend on cable => always PU, PD DNI Touch cable PIN2 => NC non-Touch cable PIN2 => GND

GPIO

Q33 2N7002DW

D

TMS

6

15K/F_4

R106

2

R102

APU_TEST1

1

APU_TEST0

*1K/F_4

3

*2.2K_4

R93

5

R101

TEST2

1

R120 R110 R115 R107 R484 R122

100K/F_4

4

+3V_S5

>1mS

DGPU_PWREN

C620 *CZ@1U/6.3V_4

**CZ@10K/F_4 2 C616 **CZ@2N7002K

Use on ATE only Yuba JTAG enabled

Quanta Computer Inc.

1

**CZ@1000P/50V_4

PROJECT : ZAB

2015.10.20 SCL v1.10 & DG v1.08 TYP1: No connect (**)

Size

Document Number

Rev 1A

FP4 GPIO/AZ/I2C/SD/UARTS(4/7) Date: 1

2

3

4

5

6

Thursday, March 03, 2016 7

Sheet

5 8

of

45

1

2

3

4

(CPU)

5

6

7

8

6

U31E

CLK/SATA/USB/SPI/LPC

[26] SATA_TXP0 [26] SATA_TXN0

HDD

AU3 AU4

SATA_TX0P

AV1 AV2

SATA_RX0N

(PD,)

USBCLK/25M_48M_OSC

USB_ZVSS

[26] SATA_RXN0 [26] SATA_RXP0

SATA_RX0P

USB_HSD0P USB_HSD0N

ODD

A

AY2 AY1

[26] SATA_TXP1 [26] SATA_TXN1 [26] SATA_RXN1 [26] SATA_RXP1

SATA_TX1N

USB_HSD1P

VDDP_0.95V [26] DEVSLP_HDD +3V

1K/F_4 1K/F_4

R152 R154

10K/F_4 10K/F_4

SATA_ZVSS SATA_ZVDD DEVSLP_HDD DEVSLP_ODD AGPIO130

AW1 AW2 AT17 AT12 BB15

SATA_RX1P

AU2

USB_HSD2P

SATA_ZVDDP

USB_HSD3P

DEVSLP[0]/EGPIO67 DEVSLP[1]/EGPIO70 SATA_ACT_L/AGPIO130

3V_S0 3V_S0 3V_S0

USB_HSD3N

USB_HSD4P

USB_HSD5P USB_HSD5N

1.8V_S0

SATA_X2

USB_HSD6P USB_HSD6N

[11] CLK_PCIE_VGAP [11] CLK_PCIE_VGAN

R446 R445

*shortEV@0_4 *shortEV@0_4

CLK_PCIE_VGAP_C CLK_PCIE_VGAN_C

U4 U3

GFX_CLKP

USB_HSD7P

GFX_CLKN

USB_HSD7N

[21] CLK_PCIE_LANP [21] CLK_PCIE_LANN

R462 R461

*short_4 *short_4

CLK_PCIE_LANP_R CLK_PCIE_LANN_R

U1 U2

GPP_CLK0P

[22] CLK_PCIE_WLANP [22] CLK_PCIE_WLANN

R453 R454

*short_4 *short_4

CLK_PCIE_WLANP_C CLK_PCIE_WLANN_C

W4 W3

GPP_CLK1P

[23] CLK_PCIE_SSDP [23] CLK_PCIE_SSDN

R451 R452

*short_4 *short_4

CLK_PCIE_SSDP_C CLK_PCIE_SSDN_C

W1 W2

GPP_CLK2P

Y2 Y1

GPP_CLK3P

TP6 5.6p/50V_4

BC10

TP8

T2

48M_X2

[33] CLK_PCI_EC [25] PCLK_TPM [22] CLK_LPC_DEBUG [22,25,33] LPC_LAD0 [22,25,33] LPC_LAD1 [22,25,33] LPC_LAD2 [22,25,33] LPC_LAD3 [22,25,33] LPC_LFRAME# [25,33] SERIRQ [25,33] CLKRUN# [25] LPCPD#

LPCCLK0 LPCCLK1

T1 AW14 AY13

BB11 BA11 AY11 BA13 AV14 BA1 TP44 BC14 *short_4 LPC_CLKRUN#_R BC11 AE9

R543

R146 C688 C700 C677

*15P/50V_4 *15P/50V_4 15P/50V_4

10K/F_4

CLK_LPC_DEBUG PCLK_TPM CLK_PCI_EC R173

20160205_EMI

10K/F_4

10K/F_4 R618 10K/F_4

AL2 AL1

U32

USBP3+ [32] USBP3- [32]

POA

SPI_CS# SPI_CLK

USBP4+ [18] USBP4- [18]

CCD

C691

USBP5+ [27] USBP5- [27]

USB3 (Charger)

SPI_SI SPI_SO

USBP6+ [27] USBP6- [27]

USB3.0

SPI_WP

AK2 AJ2

USBP7+ [28] USBP7- [28]

Type-C

33_4 33_4

SPI_CS_A SPI_SCK_A

1 6 5 2

R600 R611 R599

33_4 33_4 10K/F_4

SPI_SDI_A SPI_SDO_A

3

*22P/50V_4 SPI EMI

33S5_18S0

AL3 AL4

R623 R606

R604

CE# SCK SI SO

HOLD#

WP#

VSS

0.1u/16V_4

8

VDD

SPI_HOLD#

7 4

W25Q64FWSSIG

*short_4

SPI_WP_R

SP@ socket P/N: DFHS08FS023 only for A-TEST Vender

Size

Quanta P/N

WND

8M 8M 8M

AKE5EZN0N00

W25Q64FWSSIG

AKE5EG-0Q00

GD25LQ64CSIGR

GGD

Vender P/N

AD2 AD1

USBSS_CALP USBSS_CALN

R470 R471

1K/F_4 1K/F_4

VDDP_0.95V_S5

B

X48M_X1

X48M_X2

USB_SS_0RXP

LPCCLK0/EGPIO74 LPCCLK1/EGPIO75

Port 0 & 1 : TYP13 Only CZ:3V_S0 CZL:3V_S5 CZ:3V_S0 CZL:3V_S5 (PD,) (PD,) (PD,) CZ:3V_S0 CZL:3V_S5 (PD,)

LAD0 LAD1 LAD2 LAD3

USB_SS_1TXP USB_SS_1TXN

USB_SS_1RXP USB_SS_1RXN

USB_SS_2TXP

LFRAME_L

USB_SS_2TXN

ESPI_ALERT_L/LDRQ0_L SERIRQ/AGPIO87 LPC_CLKRUN_L/AGPIO88 LPC_PD_L/AGPIO21

(PD,) 3V_S0 (PU,PU) 3V_S0 (,PU) 3V_S5

USB_SS_2RXP USB_SS_2RXN

USB_SS_3TXN

BC6 BB8 AW7 BA9 AY7 AW11 BA7 AW12

AM1 AM2

A

C701 WLAN/BT

CZ:3V_S0 CZL:3V_S5 (PD,)

X25M_48M_OSC

USB_SS_3TXP

SPI_CLK SPI_CS# EGPIO119 SPI_SO SPI_SI SPI_WP SPI_HOLD# AGPIO76

USBP2+ [22] USBP2- [22]

AN3 AN4

GPP_CLK3N

USB_SS_0RXN

22_4 22_4 22_4

AN2 AN1

EON

USB_SS_0TXN

R570 R612 R594

33S5_18S0

R615

TYP13 1.8V

USB_SS_0TXP

5.6p/50V_4

USB2.0/DB

GPP_CLK2N

1M/F_4

3

4 C624

48M_X1

R468

USB2.0/DB

USBP1+ [27] USBP1- [27]

33S5_18S0

33S5_18S0

SPI ROM

USB_SS_ZVSS

Y3 48MHz

USBP0+ [27] USBP0- [27]

GPP_CLK1N

USB_SS_ZVDDP

B

VDD_18

11.8K/F_4

GPP_CLK0N

1

2

C623

AR3 AR4

1.8V_S0

SATA_X1

10K/F_4

AU1

R480

AR2 AR1

*short_4

SATA_ZVSS

USB_HSD4N

R148

AP5 USB_ZVSS

R629

SATA_RX1N

USB_HSD2N

R472 R476

TP5

SATA_TX1P

USB_HSD1N

AW4 AW3

AP8

SATA_TX0N

SPI_CLK/ESPI_CLK/EGPIO117

AA3 AA4 W9 W8 AA2 AA1

USB30_TX1+ [27] USB30_TX1- [27]

W5 W6

USB30_RX1+ [27] USB30_RX1- [27]

AC1 AC2

USB30_TX2+ [27] USB30_TX2- [27]

Y6 Y7

USB_SS_3RXP

SPI_CS2_L/ESPI_CS_L/EGPIO119

USB_SS_3RXN

USB3.0

USB30_RX2+ [27] USB30_RX2- [27]

AC4 AC3

USB30_TX3+ [28] USB30_TX3- [28]

(PD,)

SPI_CS1_L/EGPIO118

USB3 (Charger)

AB5 AB6

Type-C

USB30_RX3+ [28] USB30_RX3- [28]

CZ:1.8V_S0 CZL:1.8V_S5 (PD,) (PD,) (PD,) (PD,) CZ:3V_S0 CZL:3V_S5

SPI_DI/ESPI_DATA/EGPIO120 SPI_DO/EGPIO121 SPI_WP_L/EGPIO122 SPI_HOLD_L/EGPIO133 SPI_TPM_CS_L/AGPIO76

FP4 REV 0.93 SP@FP4

C

C

STRAPS PINS +3V

+3V

R581 *10K/F_4

+3V

R593 10K/F_4

+3V_S5

R613 10K/F_4

+3V_S5

R117 10K/F_4

+3V_S5

R98 10K/F_4

+3V_S5

R430 10K/F_4

R105 10K/F_4

Int pull-up

LPC_CLK0

LPCCLK0

LPC_CLK1

LFRAME#

RTC_CLK

LPCCLK1 LPC_LFRAME#

PU

BOOT Fail Timer ENABLE

Internal CLKGEN

PD

BOOT Fail Timer DISABLE

External CLKGEN

[5] RTC_CLK

DEFAULT

SPI ROM

DEFAULT

Coin battery is on board.

Int pull-up

Int pull-up

GEVENT2# (AGPIO3) CZ-L

TYP13

1.8V SPI ROM

Enhanced Reset logic

DEFAULT

Int pull-up

AGPIO11(BLINK)

SYS_RST#

normal reset mode

DEFAULT

LDT_RST#/LDT_PWRGD output to APU

DEFAULT

DEFAULT

[5] GEVENT2# [5] SYS_RST# [5] AGPIO11

LPC ROM

Coin battery isn't on board.

R559 *2K/F_4

R614 *2K/F_4

R116 *2K/F_4

R103 *2K/F_4

R431 *2K/F_4

Traditional Reset logic short reset mode

LDT_RST#/LDT_PWRGD output to Pads

DEFAULT

DEFAULT R587 2K/F_4

3.3V SPI ROM

R108 *2K/F_4

D

D

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

FP4 SATA/USB/LPC/SPI(5/7) Date: 1

2

3

4

5

6

Thursday, March 03, 2016 7

Sheet

6 8

of

45

1

2

3

4

(CPU)

5

+1.2VSUS

6

C295 22u/6.3V_6

C291 22u/6.3V_6

C292 22u/6.3V_6

C296 22u/6.3V_6

C293 22u/6.3V_6

C294 22u/6.3V_6

C313 22u/6.3V_6

22 uF * 8 0.22 uF * 6 180 pF * 1

C330 22u/6.3V_6

for EMI reserve

C300 0.22u/10V_4

A

C727 0.22u/10V_4

C297 0.22u/10V_4

C314 0.22u/10V_4

C322 0.22u/10V_4

C315 0.22u/10V_4

C728 180P/50V_4

C729 180P/50V_4

C329 180P/50V_4

C299 180P/50V_4

C730 180P/50V_4

VDDP_0.95V

10 uF * 4 0.22 uF * 6 180 pF * 1

C692 22u/6.3V_6

C704 22u/6.3V_6

C705 22u/6.3V_6

C706 22u/6.3V_6

C285 10u/6.3V_4

C275 10u/6.3V_4

C311 0.22u/10V_4

C319 0.22u/10V_4

R1

R59

+VDDIO_AZ

*short_4 C709 1U/6.3V_4

C708 1U/6.3V_4

+3V

*short_4 200mA

R213

VDDP_GFX

CZ@0_8

R2 R634

C290 0.22u/10V_4

C289 180P/50V_4

TYP1 UMA & DIS tied to VDDP. (Stuff R1,C1,C2) TYP3: Left unconencted. (DNI R1, R2, C1, C2)

VDDP_0.95V

+1.5V

C287 0.22u/10V_4

C1

R61 *SP@0_4

1.5A

C2

C106 C183 CZ@10U/6.3V_4 [email protected]/10V_4

Place under APU

C298 1U/6.3V_4

VDDIO_MEM_S3_1

VDDCR_CPU_1

VDDIO_MEM_S3_2

VDDCR_CPU_2

VDDIO_MEM_S3_3

VDDCR_CPU_3

VDDIO_MEM_S3_4

VDDCR_CPU_4

VDDIO_MEM_S3_5

VDDCR_CPU_5

VDDIO_MEM_S3_6

VDDCR_CPU_6

VDDIO_MEM_S3_7

VDDCR_CPU_7

VDDIO_MEM_S3_8

VDDCR_CPU_8

VDDIO_MEM_S3_9

VDDCR_CPU_9

VDDIO_MEM_S3_10

VDDCR_CPU_10

VDDIO_MEM_S3_11

VDDCR_CPU_11

VDDIO_MEM_S3_12

VDDCR_CPU_12

VDDIO_MEM_S3_13

VDDCR_CPU_13

VDDIO_MEM_S3_14

VDDCR_CPU_14

VDDIO_MEM_S3_15

VDDCR_CPU_15

VDDIO_MEM_S3_16

VDDCR_CPU_16

VDDIO_MEM_S3_17

VDDCR_CPU_17

VDDIO_MEM_S3_18

VDDCR_CPU_18

VDDIO_MEM_S3_19

VDDCR_CPU_19

VDDIO_MEM_S3_20

VDDCR_CPU_20

VDDIO_MEM_S3_21

VDDCR_CPU_21

VDDIO_MEM_S3_22

VDDCR_CPU_22

VDDIO_MEM_S3_23

VDDCR_CPU_23

VDDIO_MEM_S3_24

VDDCR_CPU_24

VDDIO_MEM_S3_25

VDDCR_CPU_25

VDDIO_MEM_S3_26

VDDCR_CPU_26

VDDIO_MEM_S3_27

VDDCR_CPU_42

VDDIO_MEM_S3_28

VDDCR_CPU_31

VDDIO_MEM_S3_29

VDDCR_CPU_43

VDDIO_MEM_S3_30

VDDCR_CPU_32

VDDIO_MEM_S3_31

VDDCR_CPU_44

VDDIO_MEM_S3_32

VDDCR_CPU_33

VDDIO_MEM_S3_33

VDDCR_CPU_45

VDDIO_MEM_S3_34

VDDCR_CPU_34

VDDIO_MEM_S3_35

VDDCR_CPU_46 VDDCR_CPU_35

+VDDIO_AZ 200mA

AR19

VDDIO_AUDIO

VDDCR_CPU_47 VDDCR_CPU_36

AE6 AE5

C324 10U/6.3V_4

VDDP_GFX_2

VDDCR_CPU_28

VDDP_GFX_1

VDDCR_CPU_29 VDDCR_CPU_40

VDD_18

VDD_33

AP19 AP21

VDD_33_1

VDDCR_CPU_30

VDD_33_2

VDDCR_CPU_37

AP16 AP18

VDD_18_1

VDDCR_CPU_38

VDD_18_2

VDDCR_CPU_39

AP10 AR9

VDD_18_S5_1

AP15 AR15

VDD_33_S5_1

VDDCR_CPU_49

1.5A

VDDCR_CPU_48

C265 10U/6.3V_4

500mA

C260 0.22u/10V_4

200mA

B

VDDCR_CPU_41

VDD_18_S5_2

VDDCR_CPU_27

VDDCR_FCH_S5 VDD_18_S5

+3V_S5

VDDCR_GFX_14

R142

AN12 AP12

VDDP_S5_1

VDDCR_GFX_16

VDDP_S5_2

VDDCR_GFX_17

AP13 AR12

VDDCR_FCH_S5_1

VDDCR_GFX_19

VDDCR_FCH_S5_2

VDDCR_GFX_20

VDDCR_FCH_ALW

VDDCR_GFX_18

VDDP_0.95V_S5 *0_4

VDDCR_GFX_21

C203 10U/6.3V_4

C202 0.22u/10V_4

C254 10U/6.3V_4

C256 0.22u/10V_4

C211 22u/6.3V_6

C215 0.22u/10V_4

C240

C230

C241

22u/6.3V_6

22u/6.3V_6

0.22u/10V_4

AW19 AU17 AU19 AV17 AV19 AW17

VDDP_0.95V 7A

VDDP_6

VDDCR_GFX_22

VDDP_1

VDDCR_GFX_23

VDDP_2

VDDCR_GFX_24

VDDP_3

VDDCR_GFX_25

VDDP_4

VDDCR_GFX_26

VDDP_5

VDDCR_GFX_27 VDDCR_GFX_28

AL12 AL13 AL15 AL18 AL21 AN13 AN16 AN19 AN22

VDDCR_NB Place under APU

22 uF * 4 0.22 uF * 8 180 pF * 1

C71 0.22u/10V_4

C187 0.22u/10V_4

C283 22U/6.3V_6

C250 22U/6.3V_6

C191 22U/6.3V_6

C262 22U/6.3V_6

VDDCR_NB_1 VDDCR_NB_2

VDDCR_GFX_29

Type 1 only

VDDCR_GFX_1

VDDCR_NB_3

VDDCR_GFX_2

VDDCR_NB_4

VDDCR_GFX_3

VDDCR_NB_5

VDDCR_GFX_4

VDDCR_NB_6

VDDCR_GFX_5

VDDCR_NB_7

VDDCR_GFX_6

VDDCR_NB_8

VDDCR_GFX_7

VDDCR_NB_9

VDDCR_GFX_8 VDDCR_GFX_9 VDDCR_GFX_10

AR17

VDDBT_RTC_G

VDDCR_GFX_11 VDDCR_GFX_12 VDDCR_GFX_30

C308 180P/50V_4

C274 10u/6.3V_4

C259 10u/6.3V_4

C284 10u/6.3V_4

C288 10u/6.3V_4

C245 10u/6.3V_4

C243 0.22u/10V_4

C312 10u/6.3V_4

U8 W7 W12 W15 W18 W21 Y8 Y10 Y13 Y16 Y19 Y22 AB7 AB9 AB12 AB15 AB18 AB21 AD6 AD10 AD13 AD16 AD19 AD22 AE7 AE12 AK9 AG10 AK10 AG13 AK13 AG16 AK16 AG19 AK19 AG22 AK22 AH7 AE18 AE21 AH21 AG6 AH12 AN6 AH15 AH18 AL7 AK6 AE15

7

C248 22U/6.3V_6

C267 22U/6.3V_6

C268 22U/6.3V_6

C269 47U/6.3V_8

C251 22U/6.3V_6

C234 22U/6.3V_6

C232 22U/6.3V_6

C236 22U/6.3V_6

C217 0.22u/10V_4

C221 0.22u/10V_4

C219 0.22u/10V_4

C210 0.22u/10V_4

C233 0.22u/10V_4

C220 0.22u/10V_4

C206 0.22u/10V_4

C242 180P/50V_4

C249 47U/6.3V_8

22 uF * 9 0.22 uF * 8 180 pF * 1

A

C209 0.22u/10V_4

VDDCR_GFX Place under APU

VDD_33_S5_2

VDDCR_GFX_15

800mA

8

VDDCR_CPU

U31F POWER

P25 P28 T24 T27 U25 U28 V30 V33 W24 W27 Y25 Y28 Y30 AB24 AB27 AB30 AB33 AD25 AD28 AD30 AE24 AE27 AF30 AF33 AG25 AG28 AH24 AH27 AH30 AK25 AK28 AK30 AK33 AL27 AM30

7

VDDCR_GFX_31 VDDCR_GFX_32 VDDCR_GFX_33 VDDCR_GFX_34 VDDCR_GFX_35 VDDCR_GFX_36 VDDCR_GFX_37 VDDCR_GFX_13

C

L8 L13 L16 L19 L22 N7 N12 N15 N18 N21 P8 P13 P16 P19 P22 T7 F12 F15 G11 G14 J8 J9 J11 K7 K12 K13 K15 K16 T12 T15 T18 T21 U13 U16 U19 U22 K19

B

22 uF * 9 0.22 uF * 9 180 pF * 1

C271 CZ@47U/6.3V_8

C235 CZ@22U/6.3V_6

C239 CZ@22U/6.3V_6

C252 CZ@47U/6.3V_8

C253 CZ@22U/6.3V_6

C255 C270 CZ@22U/6.3V_6 CZ@22U/6.3V_6

C266 CZ@22U/6.3V_6

C195 CZ@22U/6.3V_6

C196 [email protected]/10V_4

C197 [email protected]/10V_4

C198 [email protected]/10V_4

C199 [email protected]/10V_4

C200 [email protected]/10V_4

C227 [email protected]/10V_4

C228 [email protected]/10V_4

C226 [email protected]/10V_4

C238 [email protected]/10V_4

C304 CZ@180P/50V_4

C

FP4 REV 0.93 SP@FP4

C301 0.22u/10V_4

C318 0.22u/10V_4

C380 180P/50V_4

+3VRTC

20MIL

C302 180P/50V_4

C482 1U/6.3V_4

3

VDDCR_NB

1K/F_4

+1.5V_RTC

1

R344

+VCCRTC_2 D9 BAT54CW

20MIL C481 1U/6.3V_4

R345 1K/F_4

G1 *SHORT_PAD

C190 0.22u/10V_4

C96 0.22u/10V_4

C77 0.22u/10V_4

20MIL

2 R348 100K/F_4

Q26 2N7002K

1

C122 0.22u/10V_4

1

C188 0.22u/10V_4

+3VPCU

20MIL

For EC reset RTC [33] CLR_CMOS

*short_4

3

20MIL

2

4x0.22UF (0402)+2x180PF(0402)

+3VPCU_R R330

+BAT

C717 0.22u/10V_4

1

C725 0.22u/10V_4

Q27 AP2138N-1.5TRG1

RTC (RTC)

2

DECOUPLING BETWEEN PROCESSOR AND DIMMs ACROSS VDDIO AND VSS SPLIT

+1.5V_RTC_RST#

+1.2VSUS

ACROSS VDDNB AND VSS SPLIT CN1 RTC_2032 2

RTC CR2032 Coin Battery DBV: AHL03003057 VDE: AHL03003003 JHT: AHL03003035 D

D

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

FP4 POWER(6/7) Date: 1

2

3

4

5

6

7

Thursday, March 03, 2016

Sheet

7 8

of

45

1

2

3

4

5

6

7

8

8

(CPU) U31G

U31H U31J

GND

A8 A12 A16 A20 A24 A28 A32 B2 B8 B12 B33 C3 D4 D6 D8 D10 D12 D14 D16 D18 D20 D22 D24 D26 D28 D30 F1 F2 F4 F9 F19 F22 F25 F30 F33 G7 G17 G20 G23 G26 H4 H30 J5 J15 J19 J22 J25 J28 K1 K2 K4 K10 K22 K27 K30 K33 L5 L12 L15 L18 L21 L25

A

B

C

VSS_1

GND VSS_63

VSS_2

VSS_64

VSS_3

VSS_65

VSS_4

VSS_66

VSS_5

VSS_67

VSS_6

VSS_68

VSS_7

VSS_69

VSS_8

VSS_70

VSS_9

VSS_71

VSS_10

VSS_72

VSS_11

VSS_73

VSS_12

VSS_74

VSS_13

VSS_75

VSS_14

VSS_76

VSS_15

VSS_77

VSS_16

VSS_78

VSS_17

VSS_79

VSS_18

VSS_80

VSS_19

VSS_81

VSS_20

VSS_82

VSS_21

VSS_83

VSS_22

VSS_84

VSS_23

VSS_85

VSS_24

VSS_86

VSS_25

VSS_87

VSS_26

VSS_88

VSS_27

VSS_89

VSS_28

VSS_90

VSS_29

VSS_91

VSS_30

VSS_92

VSS_31

VSS_93

VSS_32

VSS_94

VSS_33

VSS_95

VSS_34

VSS_96

VSS_35

VSS_97

VSS_36

VSS_98

VSS_37

VSS_99

VSS_38

VSS_100

VSS_39

VSS_101

VSS_40

VSS_102

VSS_41

VSS_103

VSS_42

VSS_104

VSS_43

VSS_105

VSS_44

VSS_106

VSS_45

VSS_107

VSS_46

VSS_108

VSS_47

VSS_109

VSS_48

VSS_110

VSS_49

VSS_111

VSS_50

VSS_112

VSS_51

VSS_113

VSS_52

VSS_114

VSS_53

VSS_115

VSS_54

VSS_116

VSS_55

VSS_117

VSS_56

VSS_118

VSS_57

VSS_119

VSS_58

VSS_120

VSS_59

VSS_121

VSS_60

VSS_122

VSS_61

VSS_123

VSS_62

VSS_124

L28 M4 M30 N10 N13 N16 N19 N22 N27 P1 P2 P4 P5 P12 P15 P18 P21 P30 P33 T4 T10 T13 T16 T19 T22 T30 U5 U12 U15 U18 U21 U24 V1 V2 V4 W10 W13 W16 W19 W22 Y4 Y5 Y12 Y15 Y18 Y21 Y24 AB1 AB2 AB4 AB10 AB13 AB16 AB19 AB22 AD4 AD9 AD12 AD15 AD18 AD21 AD24

AE10 AE13 AE16 AE19 AE22 AF1 AF4 AG9 AG12 AG15 AG18 AG21 AH4 AH10 AH13 AH16 AH19 AH22 AK1 AK4 AK12 AK15 AK18 AL16 AL19 AL22 AM4 AN9 AN10 AN15 AN18 AN21 AN25 AN28 AP1 AP2 AP4 AP7 AP22 AP27 AP30 AP33 AR6 AR25 AR28 AT4 AT19 AT22 AT30 AU5 AU8 AU11 AU14 AU20 AU23 AU27 AV4 AV7 AV9 AV12 AV15 AV25

FP4 REV 0.93

VSS_125

VSS_187

VSS_126

VSS_188

VSS_127

VSS_189

VSS_128

VSS_190

VSS_129

VSS_191

VSS_130

VSS_192

VSS_131

VSS_193

VSS_132

VSS_194

VSS_133

VSS_195

VSS_134

VSS_196

VSS_135

VSS_197

VSS_136

VSS_198

VSS_137

VSS_199

VSS_138

VSS_200

VSS_139

VSS_201

VSS_140

VSS_202

VSS_141

VSS_203

VSS_142

VSS_204

VSS_143

VSS_205

VSS_144

VSS_206

VSS_145

VSS_207

VSS_146

VSS_208

VSS_147

VSS_209

VSS_148

VSS_210

VSS_149

VSS_211

VSS_150

VSS_212

AV30 AV33 AW22 AY4 AY6 AY8 AY10 AY12 AY14 AY16 AY20 AY22 AY24 AY26 AY28 AY30 BB1 BB33 BC4 BC8 BC12 BC16 BC20 BC24 BC28 BC32

U30 U31 AN30

A

RSVD_2 RSVD_3 RSVD_4

FP4 REV 0.93

SP@FP4

B

VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172

C

VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184

VSS_213

VSS_185

VSS_215

VSS_186

VSS_214

L24 AL10 AK21

FP4 REV 0.93

SP@FP4

SP@FP4

D

D

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

FP4 GND(7/7) Date: 1

2

3

4

5

6

Monday, February 15, 2016 7

Sheet

8

of 8

45

5

4

3

2

1

SODIMM (SDM)

9

+3V

[3] M_A_WE# [3] M_A_CAS# [3] M_A_RAS# TP41 TP40

+1.2VSUS [3] MEM_MA_ACT# CZ@1K/F_4

M_A_ALERT#

R252

CZ@1K/F_4

M_A_EVENT#

R678 [3] M_A_EVENT# [3] M_A_RESET#

C

[3] [3] [3] [3]

M_A_BS#0 M_A_BS#1 M_MA_BG0 M_MA_BG1

[3] [3] [3] [3]

M_A0_CS#0 M_A0_CS#1 M_A_CKE0 M_A_CKE1

[3] [3] [3] [3]

M_A_CLK0 M_A_CLK0# M_A_CLK1 M_A_CLK1#

*shortCZ@0_4 M_A_PARITY M_A_ALERT# M_A_EVENT#

162 165 114 143 116 134 108

150 145 115 113 149 157 109 110 137 139 138 140 155 161

[3] M_A_ODT0 [3] M_A_ODT1 [5,10,20,25] [5,10,20,25]

144 133 132 131 128 126 127 122 125 121 146 120 119 158 151 156 152

253 254

CLK_SCLK CLK_SDATA

256 260 166 92 91 101 105 88 87 100 104 [3] M_A_DM[7..0]

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

12 33 54 75 178 199 220 241 96

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14/WE# A15/CAS# A16/RAS#

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

S2#/C0 S3#/C1 ACT# PARITY ALERT# EVENT# RESET#

BA0 BA1 BG0 BG1 S0# S1# CKE0 CKE1

DDR4 SODIMM 260 PIN (260P)

D

R251

M_A_DQ[63:0]

JDIM1A M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13

CK0 CK0# CK1 CK1# ODT0 ODT1 SCL SDA SA0 SA1 SA2

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8

CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8

DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQS#8

8 7 20 21 4 3 16 17 28 29 41 42 24 25 38 37 50 49 62 63 46 45 58 59 70 71 83 84 66 67 79 80 174 173 187 186 170 169 183 182 195 194 207 208 191 190 203 204 216 215 228 229 211 212 224 225 237 236 249 250 232 233 245 246

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

[3]

+1.2VSUS

2250mA 0-7

8-15

16-23

33-39

40-47

48-55

56-63

13 34 55 76 179 200 221 242 97

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_DQS[7:0]

11 32 53 74 177 198 219 240 95

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS#[7:0]

111 112 117 118 123 124 129 130 135 136 141 142 147 148 153 154 159 160 163 1 5 9 15 19 23 27 31 35 39 43 47 51 57 61 65 69 73 77 81 85 89 93 99 103 107 167 171 175 181 185 189 193 197 201 205 209 213 217 223 227 231 235 239 243 247 251

24-31

[3]

R236 *shortCZ@0_4

JDIM1B VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47

VDDSPD VPP1 VPP2 VTT

VREF_CA

255 257 259

C384

C775

(+2.5V_SUS) 0.5A D

258

164

CZ@1U/6.3V_4

+2.5VSUS CZ@1U/6.3V_4

+SMDDR_VTT

0.6A

+VREF_CA_A0

C410 CZ@1000p/50V_4

DDR4 SODIMM 260 PIN (260P)

[3] M_A_A[13:0]

VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94

GND GND

2 6 10 14 18 22 26 30 36 40 44 48 52 56 60 64 68 72 78 82 86 90 94 98 102 106 168 172 176 180 184 188 192 196 202 206 210 214 218 222 226 230 234 238 244 248 252

C

261 262

[3] CZ@DDR4-DIMM1_H=5.2_RVS

CZ@DDR4-DIMM1_H=5.2_RVS

B

B

ADDRESS A0

+1.2VSUS

+1.2VSUS

Place these Caps near So-Dimm A

C377 [email protected]/16V_4

C378 [email protected]/16V_4

C379 [email protected]/16V_4

C381 [email protected]/16V_4

+SMDDR_VTT

C376 [email protected]/16V_4

C367 [email protected]/16V_4

C417

C418

[email protected]/6.3V_4

[email protected]/16V_4

From Power Chip (+0.6V)

R263 CZ@1K/F_4

+SMDDR_VREF R270

+VREF_CA_A0

*CZ@0_6

3mA +1.2VSUS

+2.5VSUS

A

C402 *[email protected]/16V_4

C401 *[email protected]/16V_4

C773 *[email protected]/16V_4

C404 *[email protected]/16V_4

C405 *[email protected]/16V_4

C406 *[email protected]/16V_4

R264 CZ@1K/F_4

(+MEM_VPP)

C409

C776

C774

CZ@180P/50V_4

[email protected]/16V_4

[email protected]/16V_4

C412 [email protected]/16V_4

C411 [email protected]/16V_4 A

+1.2VSUS

C403

C327

C328

C917

C918

C919

C920

C921

CZ@180P/50V_4

CZ@22U/6.3V_6

CZ@22U/6.3V_6

CZ@22U/6.3V_6

CZ@22U/6.3V_6

CZ@22U/6.3V_6

CZ@22U/6.3V_6

CZ@22U/6.3V_6

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

DDR4 DIMM A0 Date: 5

4

3

2

Friday, March 04, 2016

Sheet 1

9

of

45

5

4

3

2

1

SODIMM (SDM)

162 165

TP81 TP43

+1.2VSUS [3] MEM_MB_ACT#

R761

1K/F_4

M_B_ALERT#

R312

M_B_EVENT#

[3] M_B_EVENT# [3] M_B_RESET#

C

[3] [3] [3] [3]

M_B_BS#0 M_B_BS#1 M_MB_BG0 M_MB_BG1

[3] [3] [3] [3]

M_B0_CS#0 M_B0_CS#1 M_B_CKE0 M_B_CKE1

[3] [3] [3] [3]

M_B_CLK0 M_B_CLK0# M_B_CLK1 M_B_CLK1#

*short_4 M_B_PARITY M_B_ALERT# M_B_EVENT#

150 145 115 113 149 157 109 110 137 139 138 140 155 161

[3] M_B0_ODT0 [3] M_B0_ODT1 [5,9,20,25] [5,9,20,25]

253 254

CLK_SCLK CLK_SDATA R764

+3V

114 143 116 134 108

M_B0_SA0

4.7K_4

256 260 166 92 91 101 105 88 87 100 104

[3] M_B_DM[7..0]

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

12 33 54 75 178 199 220 241 96

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14/WE# A15/CAS# A16/RAS#

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

S2#/C0 S3#/C1 ACT# PARITY ALERT# EVENT# RESET#

BA0 BA1 BG0 BG1 S0# S1# CKE0 CKE1 CK0 CK0# CK1 CK1# ODT0 ODT1 SCL SDA SA0 SA1 SA2

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8

CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8

DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQS#8

8 7 20 21 4 3 16 17 28 29 41 42 24 25 38 37 50 49 62 63 46 45 58 59 70 71 83 84 66 67 79 80 174 173 187 186 170 169 183 182 195 194 207 208 191 190 203 204 216 215 228 229 211 212 224 225 237 236 249 250 232 233 245 246

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

[3]

+1.2VSUS

2250mA 0-7

8-15

16-23

33-39

40-47

48-55

56-63

13 34 55 76 179 200 221 242 97

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_DQS[7:0]

11 32 53 74 177 198 219 240 95

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS#[7:0]

111 112 117 118 123 124 129 130 135 136 141 142 147 148 153 154 159 160 163 1 5 9 15 19 23 27 31 35 39 43 47 51 57 61 65 69 73 77 81 85 89 93 99 103 107 167 171 175 181 185 189 193 197 201 205 209 213 217 223 227 231 235 239 243 247 251

24-31

[3]

R289 *short_4

JDIM2B VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47

VDDSPD VPP1 VPP2 VTT

VREF_CA

255 257 259

C433

C429

1U/6.3V_4

+2.5VSUS 1U/6.3V_4

164

(+2.5V_SUS) 0.5A D

258

+SMDDR_VTT

0.6A

+VREF_CA_B0 C818 1000p/50V_4

DDR4 SODIMM 260 PIN (260P)

[3] M_B_WE# [3] M_B_CAS# [3] M_B_RAS#

144 133 132 131 128 126 127 122 125 121 146 120 119 158 151 156 152

DDR4 SODIMM 260 PIN (260P)

D

1K/F_4

M_B_DQ[63:0]

JDIM2A M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13

R760

10

+3V

[3] M_B_A[13:0]

VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94

GND GND

2 6 10 14 18 22 26 30 36 40 44 48 52 56 60 64 68 72 78 82 86 90 94 98 102 106 168 172 176 180 184 188 192 196 202 206 210 214 218 222 226 230 234 238 244 248 252

C

261 262

[3] DDR4-DIMM2_H=5.2_STD

DDR4-DIMM2_H=5.2_STD

B

B

ADDRESS A2

+1.2VSUS

C453 0.1u/16V_4

+1.2VSUS

Place these Caps near So-Dimm B

C452 0.1u/16V_4

C455 0.1u/16V_4

C456 0.1u/16V_4

+SMDDR_VTT

C454 0.1u/16V_4

C389 0.1u/16V_4

C464

C465

4.7U/6.3V_4

0.1u/16V_4

From Power Chip

R313 1K/F_4

+SMDDR_VREF R315

+VREF_CA_B0

*0_6

3mA +1.2VSUS

R314 1K/F_4

+2.5VSUS

C462 0.1u/16V_4

C817 0.1u/16V_4

A

A

C458 *0.1u/16V_4

C457 *0.1u/16V_4

C816 *0.1u/16V_4

C459 *0.1u/16V_4

C388 *0.1u/16V_4

C815 *0.1u/16V_4

C424

C428

C427

180P/50V_4

0.1u/16V_4

0.1u/16V_4

+1.2VSUS

Quanta Computer Inc.

C814

C325

C326

C922

C923

C924

C925

C926

180P/50V_4

22U/6.3V_6

22U/6.3V_6

22U/6.3V_6

22U/6.3V_6

22U/6.3V_6

22U/6.3V_6

22U/6.3V_6

PROJECT : ZAB Size

Document Number

Rev 1A

DDR4 DIMM B0 Date: 5

4

3

2

Thursday, March 03, 2016

Sheet 1

10

of

45

5

4

3

2

1

11

(VGA) U25A

AB30 AA31

[2] PEG_TXP4 [2] PEG_TXN4

C

Y30 W31

[2] PEG_TXP6 [2] PEG_TXN6

W29 V28

[2] PEG_TXP7 [2] PEG_TXN7

V30 U31 U29 T28 T30 R31 R29 P28 P30 N31

B

N29 M28 M30 L31

PCIE_RX2P PCIE_RX2N

PCIE_TX2P PCIE_TX2N

PCIE_RX3P PCIE_RX3N

PCIE_TX3P PCIE_TX3N

PCIE_RX4P PCIE_RX4N

PCIE_TX4P PCIE_TX4N

PCIE_RX5P PCIE_RX5N

PCIE_TX5P PCIE_TX5N

PCI EXPRESS INTERFACE

AA29 Y28

[2] PEG_TXP5 [2] PEG_TXN5

PCIE_TX1P PCIE_TX1N

PCIE_RX6P PCIE_RX6N PCIE_RX7P PCIE_RX7N NC#V30 NC#U31 NC#U29 NC#T28 NC#T30 NC#R31 NC#R29 NC#P28 NC#P30 NC#N31 NC#N29 NC#M28

PCIE_TX6P PCIE_TX6N PCIE_TX7P PCIE_TX7N NC#W24 NC#W23 NC#V27 NC#U26 NC#U24 NC#U23 NC#T26 NC#T27 NC#T24 NC#T23 NC#P27 NC#P26

NC#M30 NC#L31

NC#P24 NC#P23

NC#L29 NC#K30

NC#M27 NC#N26

PEG_RXP0_C PEG_RXN0_C

C619 C618

[email protected]/10V_4 [email protected]/10V_4

AG29 AF28

PEG_RXP1_C PEG_RXN1_C

C612 C613

[email protected]/10V_4 [email protected]/10V_4

AF27 AF26

PEG_RXP2_C PEG_RXN2_C

C614 C617

[email protected]/10V_4 [email protected]/10V_4

AD27 AD26

PEG_RXP3_C PEG_RXN3_C

C589 C592

[email protected]/10V_4 [email protected]/10V_4

AC25 AB25

PEG_RXP4_C PEG_RXN4_C

C593 C590

[email protected]/10V_4 [email protected]/10V_4

Y23 Y24

PEG_RXP5_C PEG_RXN5_C

C585 C582

[email protected]/10V_4 [email protected]/10V_4

AB27 AB26

PEG_RXP6_C PEG_RXN6_C

C583 C586

[email protected]/10V_4 [email protected]/10V_4

Y27 Y26

PEG_RXP7_C PEG_RXN7_C

C580 C577

[email protected]/10V_4 [email protected]/10V_4

W24 W23

PEG_RXP0 [2] PEG_RXN0 [2]

D

PEG_RXP1 [2] PEG_RXN1 [2] PEG_RXP2 [2] PEG_RXN2 [2]

X8 : TYP1 (GEN3)

X8 : TYP1 (GEN3)

AC29 AB28

[2] PEG_TXP3 [2] PEG_TXN3

PCIE_RX1P PCIE_RX1N

AH30 AG31

PEG_RXP3 [2] PEG_RXN3 [2] PEG_RXP4 [2] PEG_RXN4 [2] PEG_RXP5 [2] PEG_RXN5 [2] PEG_RXP6 [2] PEG_RXN6 [2]

C

PEG_RXP7 [2] PEG_RXN7 [2]

AC-coupling capactior(depend on GenX, not TYPE) TYP1&3:(220nF)CH4222K9B04: Only Gen3 and Both of Gen2&3 TYP2 :(100nF)CH4103K1B08: Only Gen2

V27 U26 U24 U23 +3V_GFX

T26 T27 T24 T23

C644

B

[email protected]/16V_4

GPU RESET

P27 P26

[5] DGPU_RST_L [5,18,21,22,23]

P24 P23

PCIERST#

5

AD30 AC31

[2] PEG_TXP2 [2] PEG_TXN2

PCIE_TX0P PCIE_TX0N

X4 : TYP2 (GEN2) X4 : TYP3 (GEN3)

X4 : TYP2 (GEN2) X4 : TYP3 (GEN3)

AE29 AD28

[2] PEG_TXP1 [2] PEG_TXN1

PCIE_RX0P PCIE_RX0N

U26

2 PERST#_BUF

4

PERST#_BUF

1 3

AF30 AE31

[2] PEG_TXP0 [2] PEG_TXN0

D

EV@TC7SH08FU

[12]

R479 *EV@100K/F_4

L29 K30

M27 N26

CLOCK

AK30 AK32

[6] CLK_PCIE_VGAP [6] CLK_PCIE_VGAN

PCIE_REFCLKP PCIE_REFCLKN CALIBRATION

PCIE_CALR_TX

A

R124

EV@1K/F_4 TEST_PG

N10

PERST#_BUF AL27

TEST_PG

PCIE_CALR_RX

Y22

PCIE_CALR_TX

R37

[email protected]/F_4

AA22

PCIE_CALR_RX

R36

EV@1K/F_4

A

+PCIE_VDDC_GFX

Quanta Computer Inc.

PERSTB

PROJECT :ZAB

EV_SP@R16-M1-70/30_S3 Size

Document Number

Rev 1A

R16-M1-70/-30_S3_PCIE(1/7) Date: 5

4

3

2

Friday, March 18, 2016

Sheet 1

11

of

45

5

4

3

2

1

12

(VGA) The SMBus slave ID is default 0x41 Meso SCL/SDA PU : 47k ohm (CS34702JB21) Exo SCL/SDA PU: 45.3kohm (CS34532FB18)

DP_VDDR EXO

+3V_GFX +3V_GFX

10u X1 1u X1 0.1u X1

U25B

R166 *[email protected]_4 R167 [email protected]/F_4

2

*shortEV@0_4

6

[4,33] 2ND_MBDATA

1

5

+3V_GFX

R149 [email protected]/F_4 Q7B

3

[4,33] 2ND_MBCLK

N9 L9 AE9 Y11 AE8 AD9 AC10 AD7 AC8 AC7 AB9 AB8 AB7 AB4 AB2 Y8 Y7

DGPUT_DATA

Q7A EV@2N7002KDW

D

4

DGPUT_CLK

EV@2N7002KDW R621

[34] GPU_THROTTING#

*EV@0_4 DGPU_OPP#

EV@10K/F_4 DGPU_OPP#

R518

*EV@10K/F_4 GPU_PWM_PROCHOT#

R504

*EV@10K/F_4 DGPU_TDI

R505

*EV@10K/F_4 DGPU_TMS

R507

*EV@10K/F_4 DGPU_TDO

R506

*EV@10K/F_4 DGPU_TRSTB

R640

*EV@10K/F_4 PEX_CLKREQ#

R551

EV@10K/F_4 VGA_ALERT

R143

*[email protected]/F_4 TESTEN

NC#AG3 NC#AG5 NC#AH3 NC#AH1 NC#AK3 NC#AK1 NC#AK5 NC#AM3 NC#AK6 NC#AM5

DPB

NC#AJ7 NC#AH6

*EV@10K/F_4

DGPU_OPP

[33] DGPU_OPP

W6 V6

2 AC5 AC6

+1.8V_GFX

AG3 AG5 AH3 AH1

C153 EV@10U/6.3V_4

NC#AC5 N#CAC6

R497

Meso@10K/F_4

U1

R519

Meso@10K/F_4

U3 Y6

R123

NC#Y4 NC#W5

NC#AA5 NC#AA6

NC#Y2 NC#J8 NC#U1/BP_0 NC#AA1/PLL_ANALOG_IN NC#AA3/PLL_ANALOG_OUT

NC#U3/BP_1 NC#Y6

ZYV doesn't PD TEMP_FAIL

R524 R501

+3V_GFX

*EV@10K/F_4 *EV@10K/F_4

R1 R3

SCL SDA

C

Peak Current Control (PCC) GPIO_6. FOR MESO ONLY [41]

R509

GPU_PWM_PROCHOT#

to power IC

DGPUT_DATA DGPUT_CLK DGPU_OPP# GPU_GPIO6

*EV@1K/F_4

U8 U7 T9 T8 T7 P10 P4 P2 N6 N5 N3

C647 *[email protected]/16V_4

AMD GAE:GPIO_6 keep as unconnected, don’t stuff the components on this relative circuitry SYS_SHDN# 3

GPU_GPIO15

to power IC

Q38 *EV@ME2N7002DS-G_300MA

N1 M4 R6

VGA_ALERT TEMP_FAIL GPU_GPIO20

2

M2 P8 P7 N8 AK10 AM10 N7 L6

1

+3V_GFX PEX_CLKREQ# *EV@1N4148WS TEMP_FAIL

D16

AG20 AG21 AF22 AG22 AD14

NC#AF6 NC#AF7 NC#AF8 NC#AF9

AK6 AM5 C61 Exo@10U/6.3V_4

AJ7 AH6 AK8 AL7

C127 EV@1U/6.3V_4

C128 [email protected]/16V_4

DP_VDDC MESO

10u X1 1u X1 0.1u X1

V4 U5

1u X1 0.1u X1

AG14 AH14 AM14 AM16 AM18 AF23 AG23 AM20 AM22 AM24 AF19 AF20 AE14

V2

NC_DP_VSSR#1 NC_DP_VSSR#2 NC_DP_VSSR#3 NC_DP_VSSR#4 NC_DP_VSSR#5 NC_DP_VSSR#6 NC_DP_VSSR#7 NC_DP_VSSR#8 NC_DP_VSSR#9 NC_DP_VSSR#10 NC_DP_VSSR#11 NC_DP_VSSR#12 DP_VSSR

NC#AE1 NC#AE3 NC#AG1 NC#AG6 NC#AH5 NC#AF10 NC#AG9 NC#AH8 NC#AM6 NC#AM8 NC#AG7 NC#AG11

DGPU_TRSTB

GPIO_0 NC_G NC_AVSSN#AJ25 SMBDATA SMBCLK GPIO_5_AC_BATT PCC/GPIO_6 NC_GPIO_7 GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK NC_GPIO_11 NC_GPIO_12 NC_GPIO_13

NC_B NC_AVSSN#AG25

DAC1

NC_HSYNC NC_VSYNC/WAKEb

DGPU_TDI DGPU_TCK DGPU_TMS DGPU_TDO TESTEN

1

Q42 *EV@ME2N7002DS-G_300MA

L5 L3 L1 K4 K7 AF24

AMD GAE:CLKRFQ keep this pin as floating.

W8 W7 AD10 AJ9 AL9

GPIO_11, 12, and 13 FOR MESO ONLY, EXO become NC

NC_AVDD NC_AVSSQ NC_VDD1DI NC_VSS1DI NC NC_SVI2#1/GPIO_SVD NC_SVI2#2/GPIO_SVT NC_SVI2#3/GPIO_SVC

JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO TESTEN NC#AF24

NC_GENLK_CLK NC_GENLK_VSYNC

B

AC16 [email protected]/50V_4C

EVGA-XTALI

DAC2 NC_SWAPLOCKA NC_SWAPLOCKB

PS_0 NC_GENERICD NC_GENERICE_HPD4 NC#AJ9 DBG_CNTL0

PS_1 PS_2

PX_EN

TS_A

AF17

NC_UPHYAB_DP_CALR

NC#AE10

AA1 AA3

VCC

SDA

DXP

ALERT#

DXN

OVERT#

GND

1 2 C661 3

*EV@2200p/50V_4 5 GPU_D-

*EV@G781P8

AE10

TP46

AM26 AK26

Debug port for the die +3V_GFX

AL25 AJ25

PCIeR Optimized Buffer Flush/Fill (OBFF) R417 *MESO@10K/F_4on WAKEB FOR TOPAZ ONLY

AH24 AG25

R403 [email protected]_4

AH26 AJ27

PCIE_WAKE#_GPU

SVC

SVD

0

0

Output Voltage 1.1 Volts

0

1

1.0 Volts

1

0

0.9 Volts

1

1

0.8 Volts

Exo Boot

C

Q31 1

3

PCIE_LAN_WAKE# PCIE_LAN_WAKE#

[5,21,22]

AD22 R402 *EV@10K/F_4

AG24 AE22

EXO Level Shift

AE23 AD23

+1.8V_GFX

+1.8V_GFX

+3V_GFX

+1.8V_GFX +3V_GFX

U4 AM12 AK12 AL11 AJ11

1

C150 R498

Meso@0_4

R500

Meso@0_4

[email protected]/16V_4X

GPU_SVD_R GPU_SVT GPU_SVC_R

R63 R84 *Meso@10K/F_4 Meso@10K/F_4

GPU_SVD_R

3

VCCA

VCCB

A

B

6 GPU_GPIO15

4

R523 *Exo@10K/F_4

R87 Exo@10K/F_4

R503 Exo@10K/F_4

R79 *Exo@10K/F_4

+1.8V_GFX GPU_GPIO15

GPU_SVD_R GPU_SVC_R

AL13 AJ13

2

GND

OE

5

R70

2 1 3 4

EVGA-XTALI AM28 EVGA-XTALO AK28 EVGA-XTALO

Ra +3V_GFX

R522 R502

*Exo@10K/F_4

Rb

Exo@10K/F_4

EV@BLM15AG121SN1D(120/0.5)_4

1.8V(5mA TSVDD)

C151 C155 Exo@10U/6.3V_4

AC22 AB22

EV@10K/F_4 EV@10K/F_4

AG13 AH12

Exo@10K/F_4

GPU_SVC_R

GPU_D+ GPU_D-

T4 T2

GPU_GPIO28 +1.8V_TSVDD

R5 AD17 AC17

DPLUS DMINUS

PS_0

AD19

PS_1

AE17

PS_2

AE20

NC_DDC1CLK NC_DDC1DATA

NC#AE16 NC#AD16 NC_DDCVGACLK NC_DDCVGADATA

VCCB

A

B

GND

OE

GPU_GPIO20

4

GPU_SVT R499

5

Meso@0_4 GPU_SVD_R GPU_SVC_R

GPU_SVT_R [41] GPU_SVD_R [41] GPU_SVC_R [41]

to power IC

PS_3

AE19

EXO (M1-30)

MESO (M1-70)

11001

11001

AE6 AE5

PS1[5:1]

11001

11001

AD2 AD4

PS2[5:1]

11000

11000

PS3[5:1]

11xxx

11xxx

PS_3[3:1]

Vendor P/N

QCI STN B/S

Rpu

Rpd

000

Hynix / 2G

256Mx16 *4,1000Mhz

H5TC4G63CFR-N0C

AKD5PZDTW03

NC

4.75K

001

Vendor/Total Size Hynix / 4G

256Mx16 *8,1000Mhz

Type

H5TC4G63CFR-N0C

AKD5PZDTW03

8.45K

2K

010

Samsung / 2G

256Mx16 *4,1000Mhz

K4W4G1646E-BC1A

AKD5PGDT504

011

Samsung / 4G

256Mx16 *8,1000Mhz

K4W4G1646E-BC1A

AKD5PGDT504

4.53K

2K

6.98K

4.99K

100

4.53K

4.99K

101

3.24K

5.62K

B

AD13 AD11 +1.8V_GFX

AE16 AD16 AC1 AC3

+1.8V_GFX

R56 [email protected]/F_4 TP47 TP45

R1

PS_0

GPIO28_FDO TSVDD TSVSS

R57 EV@2K/F_4

C138

EV@1U/6.3V_4

VCCA

6

Exo@G2129TL1U

PS0[5:1]

NC_AUX2P NC_AUX2N

THERMAL

3

[email protected]/16V_4X AC19

+3V_GFX

U5 1

C124

XTALIN XTALOUT XO_IN XO_IN2

Exo@G2129TL1U

+1.8V_GFX +3V_GFX

R65 *EV@0_4

NC_AUX1P NC_AUX1N

R47 R48

+1.8V_GFX

SCLK

GPU_D+

EV_SP@R16-M1-70/30_S3

NC_DBG_VREFG

PLL/CLOCK

L2

6

2

NC_GENERICB

R415 Y2 EV@1M/F_4 EV@27MHZ_10

[email protected]/50V_4C

7

VGA_ALERT

D

C668 *[email protected]/16V_4

Y2 J8

DDC/AUX

C600

8

DGPUT_DATA

AE1 AE3 AG1 AG6 AH5 AF10 AG9 AH8 AM6 AM8 AG7 AG11

R90 R62 Meso@10K/F_4 *Meso@10K/F_4

PS_3 AB16

TP1

C597

DGPUT_CLK

GPU_GPIO20

3

[5] PCIE_REQ_GPU#

AF6 AF7 AF8 AF9

*EV@ME2N7002DS-G_300MA NC_RSET

GPIO_15_PWRCNTL_0 GPIO_16 GPIO_17_THERMAL_INT GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21 GPIO_22_ROMCSB GPIO_29 GPIO_30 CLKREQB JTAG_TRSTB

+3V_GFX

Y4 W5

PLL_ANALOG_OUT: Provide a pull-down resistor on the PCB (DNI).FOR TOPAZ ONLY DCM/NC_R NC_AVSSN#AK26

EXTERNAL THERMAL SENSOR

4

2

PERST#_BUF

NC_DP_VDDC#1 NC_DP_VDDC#2 NC_DP_VDDC#3 NC_DP_VDDC#4 DP_VDDC

AE11 AF11 AE13 AF13 AG8 AG10

C139 [email protected]/16V_4X

+PCIE_VDDC_GFX

AK5 AM3

I2C

GENERAL PURPOSE I/O U6

[33,35,40]

NC#AE11 NC#AF11 NC#AE13 NC#AF13 NC#AG8 NC#AG10

R127 *[email protected]/F_4

*EV@10K/F_4 DGPU_TCK

R515

NC/DP POWER

NC_DP_VDDR#1 NC_DP_VDDR#2 NC_DP_VDDR#3 NC_DP_VDDR#4 NC_DP_VDDR#5 NC_DP_VDDR#6 DP_PVDD

U30

EV@1K/F_4 EV@10K/F_4 TEMP_FAIL

R622

C132 EV@1U/6.3V_4

AK3 AK1

EXO NC#V4 NC#U5 NC#V2

AA5 AA6

AMD GAE:Debug port TDO left as floating. ZYV doesn't PU PEX_CLKREQ#

+1.8V_GFX

DPC

NC#W6 NC#V6

1

R619

DPA

DP POWER AG15 AG16 AF16 AG17 AG18 AG19 AF14

AF2 AF4

3

Q39 EV@2N7002K R620

DBG_DATA16 DBG_DATA15 DBG_DATA14 DBG_DATA13 DBG_DATA12 DBG_DATA11 DBG_DATA10 DBG_DATA9 DBG_DATA8 DBG_DATA7 DBG_DATA6 DBG_DATA5 DBG_DATA4 DBG_DATA3 DBG_DATA2 DBG_DATA1 DBG_DATA0

NC#AK8 NC#AL7

PU/PD

+3V_GFX

NC#AF2 NC#AF4

DVO

U25G

10u X1 1u X1

2

R155

[11] PERST#_BUF

MESO

+1.8V_GFX

R67 [email protected]/F_4 PS_1

C98 *[email protected]/50V_4X

R2

BIT[5:4]

R75 *EV@0_4

C(nF)

00

680

01

82

10

10

PS_2

R68 EV@2K/F_4

C117 *[email protected]/50V_4X

R76 [email protected]/F_4

C126 *[email protected]/50V_4X

11

NC

[email protected]/16V_4X

BIT[3:1]

Rpu

Rpd

000

NC

4750

001

8450

2000

010

4530

2000

011

6980

4990

100

4530

4990

101

3240

5620

110

3400

10000

111

4750

NC

EV_SP@R16-M1-70/30_S3

EXO MLPS setting PD MEXO no mount

GEN3(TYP1&3) : R1 8.45K(CS28452FB12) R2 2K(CS22002FB19)

DP_VDDC

EXO ONLY: stuff Ra=> disable MLPS stuff Rb=> enable MLPS

EXO 120R beed x1 10u X1 1u X1 0.1u X1

MESO +1.8V_GFX

1u X1

Rpu

A

R50 [email protected]/F_4 PS_3

Rpd

GEN2(CZL): R1 NC R2 4.75K(CS24752FB12)

R51 EV_SP@2K/F_4

PS_3 [5,4] should be 11 due to this is no output/audio design

Quanta P/N====> 4.53K: CS24532FB08 6.98K: CS26982FB01 5.62K: CS25622FB18 4.75K: CS24752FB12

C93 *EV@680n/6.3V_4

4.99K: CS24992FB26 3.24K: CS23242FB17 8.45K: CS28452FB12 2K: CS22002FB19

A

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

R16-M1-70/-30_S3_Main(2/7) Date: 5

4

3

2

Friday, March 18, 2016 1

Sheet

12

of

45

5

4

3

2

1

13

(VGA) U25E U25F

D

C

AA27 AB24 AB32 AC24 AC26 AC27 AD25 AD32 AE27 AF32 AG27 AH32 K28 K32 L27 M32 N25 N27 P25 P32 R27 T25 T32 U25 U27 V32 W25 W26 W27 Y25 Y32

M6 N11

B

N13 N16 N18 N21 P6 P9 R12 R15 R17 R20 T13 T16 T18 T21 T6 U15 U17 U20 U9 V13 V16 V18 Y10 Y15 Y17 Y20 AA11 M12 V11

PCIE_VSS#1 PCIE_VSS#2 PCIE_VSS#3 PCIE_VSS#4 PCIE_VSS#5 PCIE_VSS#6 PCIE_VSS#7 PCIE_VSS#8 PCIE_VSS#9 PCIE_VSS#10 PCIE_VSS#11 PCIE_VSS#12 PCIE_VSS#13 PCIE_VSS#14 PCIE_VSS#15 PCIE_VSS#16 PCIE_VSS#17 PCIE_VSS#18 PCIE_VSS#19 PCIE_VSS#20 PCIE_VSS#21 PCIE_VSS#22 PCIE_VSS#23 PCIE_VSS#24 PCIE_VSS#25 PCIE_VSS#26 PCIE_VSS#27 PCIE_VSS#28 PCIE_VSS#29 PCIE_VSS#30 PCIE_VSS#31

GND#56 GND#57 GND#58 GND#59 GND#60 GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#86 GND#87 GND#88

GND

GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8 GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#84 GND#85

VSS_MECH#1 VSS_MECH#2 VSS_MECH#3

A3 A30 AA13 AA16 AB10 AB15 AB6 AC9 AD6 AD8 AE7 AG12 AH10 AH28 B10 B12 B14 B16 B18 B20 B22 B24 B26 B6 B8 C1 C32 E28 F10 F12 F14 F16 F18 F2 F20 F22 F24 F26 F6 F8 G10 G27 G31 G8 H14 H17 H2 H20 H6 J27 J31 K11 K2 K22 K6 T11 R11

D

LVDS CONTROL

NC_UPHYAB_TMDPA_TX0N NC_UPHYAB_TMDPA_TX0P NC_UPHYAB_TMDPA_TX1N NC_UPHYAB_TMDPA_TX1P NC_UPHYAB_TMDPA_TX2N NC_UPHYAB_TMDPA_TX2P NC_UPHYAB_TMDPA_TX3N NC_UPHYAB_TMDPA_TX3P NC_TXOUT_L3P NC_TXOUT_L3N

All the ASIC supplies must nominal voltages within 20 ramp-up sequence, though a duration is preferred. The all rails is 50 mV/µs.

AL15 AK14 AH16 AJ15 AL17 AK16

It is recommended that the 3.3-V rail ramp up first The 3.3-V, 1.8-V, and 0.95-V rails must reach their ready state at least 10 µs before VDDC, VDDCI, and VMEMIO start to ramp up. For power down, reversing the ramp-up sequence is recommended.

AH18 AJ17 AL19 AK18

TMDP NC_UPHYAB_TMDPB_TX0N NC_UPHYAB_TMDPB_TX0P NC_UPHYAB_TMDPB_TX1N NC_UPHYAB_TMDPB_TX1P NC_UPHYAB_TMDPB_TX2N NC_UPHYAB_TMDPB_TX2P NC_UPHYAB_TMDPB_TX3N NC_UPHYAB_TMDPB_TX3P NC_TXOUT_U3P NC_TXOUT_U3N

reach their respective ms of the start of the shorter ramp-up maximum slew rate on

AH20 AJ19 AL21 AK20

C

AH22 AJ21 AL23 AK22

Power Up/Down Sequence

AK24 AJ23

EV_SP@R16-M1-70/30_S3

VDDR3 3.3V B

+1.8V_VGA 10us +PCIE_VDDC_GFX (0.95V) +1.5V_GFX

A32 AM1 AM32

+VGA_CORE

EV_SP@R16-M1-70/30_S3

20ms

20ms A

A

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

R16-M1-70/-30_S3_GND/LVDS/Strap(3/7) Date: 5

4

3

2

Friday, March 18, 2016

Sheet 1

13

of

Rev 1A 45

5

4

3

2

1

14

(VGA)

D

D

PCIE_PVDD

VDDR1 EXO

EXO 10u X1 2.2u X5 0.1u X1 0.01u X1

10u X3 2.2u X5 0.1u X6

MESO Power VMEMIO

MEM I/O

1.35V ( DDR3, MVDDQ = [email protected])

C145 Exo@10U/6.3V_4

C53 Exo@10U/6.3V_4

C54 EV@10U/6.3V_4

C120 [email protected]/50V_4

C118 [email protected]/16V_4X

C

C140 [email protected]/10V_4

C116 [email protected]/16V_4X

C69 [email protected]/10V_4

C134 [email protected]/16V_4X

C159 [email protected]/10V_4

C109 [email protected]/16V_4X

Meso Power VDD_GPIO18 VDD_CT EXO

C108 [email protected]/10V_4

C92 [email protected]/16V_4X

H13 H16 H19 J10 J23 J24 J9 K10 K23 K24 K9 L11 L12 L13 L20 L21 L22

C135 [email protected]/10V_4

C125 [email protected]/16V_4

+1.8V_GFX

1u X1

VDD_GPIO18 @13mA

C81 Exo@10U/6.3V_4

C86 [email protected]/16V_4X

AA20 AA21 AB20 AB21

C63 EV@1U/6.3V_4

MPLL_PVDD bead 220 X1 10u X1 1u X1 0.1u X1

EXO

MESO bead 220 X1 10u X2 1u X1

+1.8V_GFX

EXO

B

VDD_GPIO33@25mA

L3

MESO

C171 Exo@10U/6.3V_4

C107 Exo@1U/6.3V_4

C113 Exo@1U/6.3V_4

V12 Y12 U12

C110 EV@1U/6.3V_4

1u X1

C158 EV@1U/6.3V_4

C166 [email protected]/16V_4X

C182 EV@10U/6.3V_4

VDD_CT#1 VDD_CT#2 VDD_CT#3 VDD_CT#4

VDDC#1 VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8 VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15 VDDC#16 VDDC#17 VDDC#18 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC/VARY_BL VDDC/DIGON VDDC/GENERICA VDDC/GENERICC VDDC/DDC2CLK VDDC/DDC2DATA VDDC/HPD1 VDDC/GPIO_1 VDDC/GPIO_2 VDDC/GPIO_18 VDDC/GPIO_14_HPD2 CORE

I/O VDDR3#1 VDDR3#2 VDDR3#3 VDDR3#4 NC_VDDR4#1 NC_VDDR4#2 NC_VDDR4#3

PLL

L1

EV@BLM15AG121SN1D(120/0.5)_4

Engine Phase Lock Loop Power : analog power pin for engine PLL 1.8V @ 75mA

+PCIE_VDDC_GFX

PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8 PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12

C174 Meso@10U/6.3V_4

bead 120 X1 1u X1 10u X1 +1.8V_GFX

NC#AB23 NC#AC23 NC#AD24 NC#AE24 NC#AE25 NC#AE26 NC#AF25 NC#AG26

MPV18

EV@PBY160808T-221Y-N_6

Memory Phase Lock Loop Power : 1.8V @ 90mA

SPLL_PVDD bead 120 X1 10u X1 1u X1 0.1u X1

MESO

bead 120 X1 10u X1 1u X3

VDDR1#1 VDDR1#2 VDDR1#3 VDDR1#4 VDDR1#5 VDDR1#6 VDDR1#7 VDDR1#8 VDDR1#9 VDDR1#10 VDDR1#11 VDDR1#12 VDDR1#13 VDDR1#14 VDDR1#15 VDDR1#16 VDDR1#17

POWER

AA17 AA18 AB17 AB18

+3V_GFX

Meso Power VDD_GPIO33 VDDR3

PCIE_PVDD PCIE

LEVEL TRANSLATION

MESO

bead 120 X1 10u X1 1u X1 0.1u X1

L4

SPV18 C161 [email protected]/16V_4X

C189 Exo@10U/6.3V_4

C181 [email protected]/16V_4

L8

SPV18

H7

MPLL_PVDD

C160 EV@10U/6.3V_4

+0.95V_VGA_SPV10

EV@BLM15AG121SN1D(120/0.5)_4

Engine Phase Lock Loop Power : digital power pin for engine PLL 0.95V @ 100mA

C162 EV@1U/6.3V_4

MPV18

C175 EV@1U/6.3V_4

H8 J7

BIF_VDDC_1 BIF_VDDC_2

SPLL_PVDD

ISOLATED VDDCI#1 CORE I/O VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8

SPLL_VDDC SPLL_PVSS

NC#W1/FB_VDDCI NC#W3/FB_VSS

SPLL_VDDC EXO bead 120 X1 10u X1 1u X1 0.1u X1

MESO

NC#FB_VDDC NC#FB_VSS

bead 120 X1 1u X1 0.1u X1

10u X1 1u X1

+1.8V_GFX

U25D

+1.5V_GFX

EXO

MESO

10u X1 1u X1 0.1u X1 0.01u X1

MESO

PCIE_VDDR : 1.8V @ 100mA

AM30 AB23 AC23 AD24 AE24 AE25 AE26 AF25 AG26

C83 [email protected]/16V_4X

C84 EV@1U/6.3V_4

C91 EV@10U/6.3V_4

C85 [email protected]/50V_4

PCIE_VDDC EXO +PCIE_VDDC_GFX

PCIE_VDDC : 0.95V @ 2.5A (GEN3.0)

L23 L24 L25 L26 M22 N22 N23 N24 R22 T22 U22 V22

C76 Exo@1U/6.3V_4

C75 EV@1U/6.3V_4

C68 EV@1U/6.3V_4

C67 EV@1U/6.3V_4

C88 EV@1U/6.3V_4

MESO

10u X2 1u X7

C79 EV@1U/6.3V_4

C78 EV@1U/6.3V_4

C80 EV@10U/6.3V_4

C73 Exo@10U/6.3V_4

C

VDDC MESO Power VDDC +VGPU_CORE

VDDC+VDDCI:0.85~1.1V(14.2A peak )( Ripple < 87.2mV)

AA15 N15 N17 R13 R16 R18 Y21 T12 T15 T17 T20 U13 U16 U18 V21 V15 V17 V20 Y13 Y16 Y18 AA12 M11 N12 U11 AB11 AB12 AB13 W9 AC11 AC13 AC14 U10 T10 W10 Y9

EXO

MESO

10u X4 1u X30

10u X6 2.2u X16

C143 [email protected]/10V_4

C144 [email protected]/10V_4

C123 [email protected]/10V_4

C141 [email protected]/10V_4

C111 [email protected]/10V_4

C97 [email protected]/10V_4

C129 [email protected]/10V_4

C142 [email protected]/10V_4

C154 [email protected]/10V_4

C95 [email protected]/10V_4

C130 [email protected]/10V_4

C89 [email protected]/10V_4

C90 [email protected]/10V_4

C119 [email protected]/10V_4

C156 [email protected]/10V_4

C136 [email protected]/10V_4

C169 EV@10U/6.3V_4

C170 EV@10U/6.3V_4

C133 EV@10U/6.3V_4

C157 EV@10U/6.3V_4

C163 Meso@10U/6.3V_4

C177 Meso@10U/6.3V_4

B

VDDCI

R21 U21

+PCIE_VDDC_GFX

M13 M15 M16 M17 M18 M20 M21 N20 W1 W3

10u X1 1u X6

+VGPU_CORE

EXO

MESO

10u X1 1u X3 0.1u X3

10u X2 1u X3 0.1u X2

C137 EV@1U/6.3V_4

C176 EV@10U/6.3V_4

0.95V~1.1V(2A VDDCI)

C131 [email protected]/16V_4X

R131 R496

C115 [email protected]/16V_4

Meso@0_4 Meso@0_4

AC20 GPUVDDC_SENSE_R AD20 GPUVSS_SENSE_R

R401 R400

C114 [email protected]/16V_4

C121 EV@1U/6.3V_4

C112 EV@1U/6.3V_4

C193 Meso@10U/6.3V_4

+VGPU_CORE Meso@0_4 Meso@0_4

GPUVDDC_SENSE [41] GPUVSS_SENSE [41]

EV_SP@R16-M1-70/30_S3

EXO doesn't support this function (refer to GPU SCL)

A

A

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

R16-M1-70/-30_S3_Power(4/7) Date: 5

4

3

2

Friday, March 18, 2016

Sheet 1

14

of

45

5

4

3

2

1

VMA_ODT0 VMA_ODT1

[16,17] VMA_ODT0 [16,17] VMA_ODT1

D

VMA_RAS0# VMA_RAS1#

[16,17] VMA_RAS0# [16,17] VMA_RAS1#

VMA_CAS0# VMA_CAS1#

[16,17] VMA_CAS0# [16,17] VMA_CAS1#

VMA_WE0# VMA_WE1#

[16,17] VMA_WE0# [16,17] VMA_WE1#

VMA_CS0#_0 VMA_CS0#_1

[16,17] VMA_CS0#_0 [17] VMA_CS0#_1

VMA_CS1#_0 VMA_CS1#_1

[16,17] VMA_CS1#_0 [17] VMA_CS1#_1

VMA_CKE0 VMA_CKE1

[16,17] VMA_CKE0 [16,17] VMA_CKE1

VMA_CLK0 VMA_CLK0#

[16,17] VMA_CLK0 [16,17] VMA_CLK0#

VMA_CLK1 VMA_CLK1#

[16,17] VMA_CLK1 [16,17] VMA_CLK1# [16,17] VMA_WDQS[7..0] C

[16,17] VMA_RDQS[7..0] [16,17] VMA_DM[7..0] [16,17] VMA_DQ[63..0] [16,17] VMA_MA[15..0] [16,17] VMA_BA0 [16,17] VMA_BA1 [16,17] VMA_BA2

VMA_DQ0 VMA_DQ1 VMA_DQ2 VMA_DQ3 VMA_DQ4 VMA_DQ5 VMA_DQ6 VMA_DQ7 VMA_DQ8 VMA_DQ9 VMA_DQ10 VMA_DQ11 VMA_DQ12 VMA_DQ13 VMA_DQ14 VMA_DQ15 VMA_DQ16 VMA_DQ17 VMA_DQ18 VMA_DQ19 VMA_DQ20 VMA_DQ21 VMA_DQ22 VMA_DQ23 VMA_DQ24 VMA_DQ25 VMA_DQ26 VMA_DQ27 VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ31 VMA_DQ32 VMA_DQ33 VMA_DQ34 VMA_DQ35 VMA_DQ36 VMA_DQ37 VMA_DQ38 VMA_DQ39 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ44 VMA_DQ45 VMA_DQ46 VMA_DQ47 VMA_DQ48 VMA_DQ49 VMA_DQ50 VMA_DQ51 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ55 VMA_DQ56 VMA_DQ57 VMA_DQ58 VMA_DQ59 VMA_DQ60 VMA_DQ61 VMA_DQ62 VMA_DQ63

VMA_WDQS[7..0] VMA_RDQS[7..0] VMA_DM[7..0] VMA_DQ[63..0] VMA_MA[15..0]

VMA_BA0 VMA_BA1 VMA_BA2

To support 2/4 Gbits VRAM, dual Rank (256 Mbits X 16 x 4/8 pcs) +1.5V_GFX

Place these dividers and Caps close to ASIC B

R30 [email protected]/F_4

R39 EV@100/F_4

C60 *EV@1U/6.3V_4

C64 EV@1U/6.3V_4

K27 J29 H30 H32 G29 F28 F32 F30 C30 F27 A28 C28 E27 G26 D26 F25 A25 C25 E25 D24 E23 F23 D22 F21 E21 D20 F19 A19 D18 F17 A17 C17 E17 D16 F15 A15 D14 F13 A13 C13 E11 A11 C11 F11 A9 C9 F9 D8 E7 A7 C7 F7 A5 E5 C3 E1 G7 G6 G1 G3 J6 J1 J3 J5

MVREFDA MVREFSA R38

EV@120/F_4

K26 J26 J25 K25

+1.5V_GFX

Place these dividers and Caps close to ASIC R31 [email protected]/F_4

C65 EV@1U/6.3V_4X

NC MEM_CALRP0

DRAM_RST L10 CLKTESTA CLKTESTB

R204 *[email protected]/F_4

MAA0_0 MAA0_1 MAA0_2 MAA0_3 MAA0_4 MAA0_5 MAA0_6 MAA0_7 MAA0_8 MAA0_9 MAA1_0 MAA1_1 MAA1_2 MAA1_3 MAA1_4 MAA1_5 MAA1_6 MAA1_7 MMA1_8 MAA1_9 WCKA0_0 WCKA0B_0 WCKA0_1 WCKA0B_1 WCKA1_0 WCKA1B_0 WCKA1_1 WCKA1B_1 EDCA0_0 EDCA0_1 EDCA0_2 EDCA0_3 EDCA1_0 EDCA1_1 EDCA1_2 EDCA1_3 DDBIA0_0 DDBIA0_1 DDBIA0_2 DDBIA0_3 DDBIA1_0 DDBIA1_1 DDBIA1_2 DDBIA1_3 ADBIAO ADBIA1 CLKA0 CLKA0B CLKA1 CLKA1B RASA0B RASA1B CASA0B CASA1B CSA0B_0 CSA0B_1 CSA1B_0 CSA1B_1 CKEA0 CKEA1

C316 *[email protected]/16V_4 R40 EV@100/F_4

MVREFDA MVREFSA

Rd

C59 *EV@1U/6.3V_4

A

DQA0_0 DQA0_1 DQA0_2 DQA0_3 DQA0_4 DQA0_5 DQA0_6 DQA0_7 DQA0_8 DQA0_9 DQA0_10 DQA0_11 DQA0_12 DQA0_13 DQA0_14 DQA0_15 DQA0_16 DQA0_17 DQA0_18 DQA0_19 DQA0_20 DQA0_21 DQA0_22 DQA0_23 DQA0_24 DQA0_25 DQA0_26 DQA0_27 DQA0_28 DQA0_29 DQA0_30 DQA0_31 DQA1_0 DQA1_1 DQA1_2 DQA1_3 DQA1_4 DQA1_5 DQA1_6 DQA1_7 DQA1_8 DQA1_9 DQA1_10 DQA1_11 DQA1_12 DQA1_13 DQA1_14 DQA1_15 DQA1_16 DQA1_17 DQA1_18 DQA1_19 DQA1_20 DQA1_21 DQA1_22 DQA1_23 DQA1_24 DQA1_25 DQA1_26 DQA1_27 DQA1_28 DQA1_29 DQA1_30 DQA1_31

K8 L7

C201 *[email protected]/16V_4

DRAM_RST

WEA0B WEA1B

K17 J20 H23 G23 G24 H24 J19 K19 G20 L17

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA13 VMA_MA15

J14 K14 J11 J13 H11 G11 J16 L15 G14 L16

VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_BA2 VMA_BA0 VMA_BA1 VMA_MA14

E32 E30 A21 C21 E13 D12 E3 F4

VMA_DM0 VMA_DM1 VMA_DM2 VMA_DM3 VMA_DM4 VMA_DM5 VMA_DM6 VMA_DM7

H28 C27 A23 E19 E15 D10 D6 G5

VMA_RDQS0 VMA_RDQS1 VMA_RDQS2 VMA_RDQS3 VMA_RDQS4 VMA_RDQS5 VMA_RDQS6 VMA_RDQS7

H27 A27 C23 C19 C15 E9 C5 H4

VMA_WDQS0 VMA_WDQS1 VMA_WDQS2 VMA_WDQS3 VMA_WDQS4 VMA_WDQS5 VMA_WDQS6 VMA_WDQS7

L18 K16

VMA_ODT0 VMA_ODT1

H26 H25

VMA_CLK0 VMA_CLK0#

G9 H9

VMA_CLK1 VMA_CLK1#

G22 G17

VMA_RAS0# VMA_RAS1#

G19 G16

VMA_CAS0# VMA_CAS1#

H22 J22

VMA_CS0#_0 VMA_CS0#_1

G13 K13

VMA_CS1#_0 VMA_CS1#_1

K20 J17

VMA_CKE0 VMA_CKE1

G25 H10

VMA_WE0# VMA_WE1#

15 D

From GPU

(VGA)

MEMORY INTERFACE

U25C

25mm (max)

5mm (max)

DRAM_RST

R96

25mm (max)

EV@10_4

R95 [email protected]/F_4

R97

EV@51_4

DRAM_RST_M [16,17]

C152 EV@120P/50V_4N

C

Place all these components very close to GPU (Within 25mm) and keep all component close to each Other (within 5mm) except Rser2 This basic topology should be used for DRAM_RST for DDR3/GDDR5.These Capacitors and Resistor values are an example only. The Series R and || Cap values will depend on the DRAM load and will have to be calculated for different Memory ,DRAM Load and board to pass Reset Signal Spec.

B

CLKTESTA CLKTESTB A

EV_SP@R16-M1-70/30_S3

Quanta Computer Inc.

R135 *[email protected]/F_4

PROJECT : ZAB Size

R16-M1-70/-30_S3_MEM(5/7)

route 50ohms single-ended/100ohms diff and keep short 5

4

Document Number

Date: 3

2

Friday, March 18, 2016

Sheet 1

15

of

Rev 1A 45

5

4

3

(VGA) [15,17] [15,17] [15,17] [15,17] [15,17]

VREFC_VMA1 VREFD_VMA1

M8 H1

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VMA_MA15

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

VMA_BA0 VMA_BA1 VMA_BA2

[15,17] VMA_BA0 [15,17] VMA_BA1 [15,17] VMA_BA2

[15,17] [15,17] [15,17] [15,17] [15,17]

VMA_ODT0 VMA_CS0#_0 VMA_RAS0# VMA_CAS0# VMA_WE0#

VMA_ODT0 VMA_CS0#_0 VMA_RAS0# VMA_CAS0# VMA_WE0#

VMA_RDQS1 VMA_WDQS1

M2 N8 M3

[15,17] DRAM_RST_M

K1 L2 J3 K3 L3

VMA_ZQ1

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

ODT CS RAS CAS WE

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

DQSL DQSL DML DMU

VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

DQSU DQSU

T2

RESET

L8

ZQ

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

C

R34 EV@243/F_4

Should be 240 Ohms +-1%

J1 L1 J9 L9

E3 F7 F2 F8 H3 H8 G2 H7

VMA_DQ12 VMA_DQ11 VMA_DQ14 VMA_DQ8 VMA_DQ15 VMA_DQ9 VMA_DQ13 VMA_DQ10

D7 C3 C8 C2 A7 A2 B8 A3

VMA_DQ18 VMA_DQ22 VMA_DQ17 VMA_DQ20 VMA_DQ19 VMA_DQ21 VMA_DQ16 VMA_DQ23

Byte 1

VREFC_VMA2 VREFD_VMA2

M8 H1

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VMA_MA15

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

VMA_BA0 VMA_BA1 VMA_BA2

M2 N8 M3

VMA_CLK0 VMA_CLK0# VMA_CKE0

J7 K7 K9

Byte 2

+1.5V_GFX

CK CK CKE

C7 B7

DRAM_RST_M

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

BA0 BA1 BA2

E7 D3

VMA_RDQS2 VMA_WDQS2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

F3 G3

VMA_DM1 VMA_DM2

U2

VREFCA VREFDQ

VMA_CLK0 J7 VMA_CLK0# K7 VMA_CKE0 K9

[15,17] VMA_CLK0 [15,17] VMA_CLK0# [15,17] VMA_CKE0

NC#J1 NC#L1 NC#J9 NC#L9

B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GFX A1 A8 C1 C9 D2 E9 F1 H2 H9

VMA_ODT0 VMA_CS0#_0 VMA_RAS0# VMA_CAS0# VMA_WE0#

K1 L2 J3 K3 L3

VMA_RDQS3 VMA_WDQS3

F3 G3

VMA_DM3 VMA_DM0

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9

E7 D3

VMA_RDQS0 VMA_WDQS0

C7 B7

DRAM_RST_M

T2

VMA_ZQ2

L8

Should be 240 Ohms +-1%

J1 L1 J9 L9

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2

CK CK CKE ODT CS RAS CAS WE DQSL DQSL DML DMU DQSU DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

E3 F7 F2 F8 H3 H8 G2 H7

VMA_DQ29 VMA_DQ27 VMA_DQ30 VMA_DQ25 VMA_DQ31 VMA_DQ24 VMA_DQ28 VMA_DQ26

D7 C3 C8 C2 A7 A2 B8 A3

VMA_DQ3 VMA_DQ7 VMA_DQ0 VMA_DQ6 VMA_DQ1 VMA_DQ5 VMA_DQ2 VMA_DQ4

VREFC_VMA3 VREFD_VMA3

M8 H1

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VMA_MA15

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

VMA_BA0 VMA_BA1 VMA_BA2

M2 N8 M3

VMA_CLK1 VMA_CLK1# VMA_CKE1

J7 K7 K9

Byte 3

Byte 0

+1.5V_GFX VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GFX A1 A8 C1 C9 D2 E9 F1 H2 H9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9

VMA_ODT1 VMA_CS1#_0 VMA_RAS1# VMA_CAS1# VMA_WE1#

K1 L2 J3 K3 L3

VMA_RDQS7 VMA_WDQS7

F3 G3

VMA_DM7 VMA_DM5

E7 D3

VMA_RDQS5 VMA_WDQS5

C7 B7

DRAM_RST_M

T2

VMA_ZQ4

L8

Should be 240 Ohms +-1%

+1.5V_GFX

VREFCA VREFDQ

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

J1 L1 J9 L9

E3 F7 F2 F8 H3 H8 G2 H7

VMA_DQ58 VMA_DQ63 VMA_DQ59 VMA_DQ60 VMA_DQ57 VMA_DQ62 VMA_DQ56 VMA_DQ61

D7 C3 C8 C2 A7 A2 B8 A3

VMA_DQ47 VMA_DQ42 VMA_DQ46 VMA_DQ43 VMA_DQ44 VMA_DQ40 VMA_DQ45 VMA_DQ41

Byte 7

VREFC_VMA4 VREFD_VMA4

M8 H1

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VMA_MA15

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

VMA_BA0 VMA_BA1 VMA_BA2

M2 N8 M3

VMA_CLK1 VMA_CLK1# VMA_CKE1

J7 K7 K9

VMA_ODT1 VMA_CS1#_0 VMA_RAS1# VMA_CAS1# VMA_WE1#

K1 L2 J3 K3 L3

VMA_RDQS4 VMA_WDQS4

F3 G3

VMA_DM4 VMA_DM6

E7 D3

VMA_RDQS6 VMA_WDQS6

C7 B7

DRAM_RST_M

T2

VMA_ZQ3

L8

Byte 5

+1.5V_GFX

BA0 BA1 BA2

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

CK CK CKE ODT CS RAS CAS WE

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

DQSL DQSL DML DMU

VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

DQSU DQSU

RESET ZQ

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

NC#J1 NC#L1 NC#J9 NC#L9

B2 D9 G7 K2 K8 N1 N9 R1 R9

[15,17] VMA_CLK1 [15,17] VMA_CLK1# [15,17] VMA_CKE1

+1.5V_GFX A1 A8 C1 C9 D2 E9 F1 H2 H9

[15,17] [15,17] [15,17] [15,17] [15,17]

VMA_ODT1 VMA_CS1#_0 VMA_RAS1# VMA_CAS1# VMA_WE1#

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9

J1 L1 J9 L9

+1.5V_GFX

R54 [email protected]/F_4

R481 [email protected]/F_4

R582 [email protected]/F_4

R474 [email protected]/F_4

VREFC_VMA1

VREFD_VMA1

VREFC_VMA2

VREFD_VMA2

VREFC_VMA3

VREFD_VMA3

VREFC_VMA4

C51 [email protected]/16V_4

R49 [email protected]/F_4

C74 [email protected]/16V_4

VRAM De-Coupling

C94 [email protected]/16V_4

R485 [email protected]/F_4

C646 [email protected]/16V_4

Byte 6 D

+1.5V_GFX A1 A8 C1 C9 D2 E9 F1 H2 H9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

DML DMU

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

DQSU DQSU

RESET ZQ

B1 B9 D1 D8 E2 E8 F9 G1 G9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

NC#J1 NC#L1 NC#J9 NC#L9

C

R571 [email protected]/F_4

C671 [email protected]/16V_4

R475 [email protected]/F_4

R489 [email protected]/F_4 VREFD_VMA4

C641 [email protected]/16V_4

R512 [email protected]/F_4

C648 [email protected]/16V_4

VRAM De-Coupling

CLK-A0 Termination

8*0.1uF, 8*1uF, 1*10uF/per VRAM

1uF x 16

R53 [email protected]/F_4

VMA_DQ52 VMA_DQ48 VMA_DQ51 VMA_DQ49 VMA_DQ53 VMA_DQ50 VMA_DQ55 VMA_DQ54

+1.5V_GFX

R52 [email protected]/F_4

R26 [email protected]/F_4

DQSL DQSL

D7 C3 C8 C2 A7 A2 B8 A3

Byte 4

B2 D9 G7 K2 K8 N1 N9 R1 R9

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

CK CK CKE ODT CS RAS CAS WE

VMA_DQ33 VMA_DQ36 VMA_DQ32 VMA_DQ39 VMA_DQ35 VMA_DQ37 VMA_DQ34 VMA_DQ38

+1.5V_GFX

BA0 BA1 BA2

+1.5V_GFX

R25 [email protected]/F_4

C66 [email protected]/16V_4

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

E3 F7 F2 F8 H3 H8 G2 H7

MEM Reference Voltage 4

+1.5V_GFX

R44 [email protected]/F_4

R42 [email protected]/F_4

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

96-BALL SDRAM DDR3 EV_SP@H5TC4G63CFR-N0C

MEM Reference Voltage 3

+1.5V_GFX

VREFCA VREFDQ

R477 EV@243/F_4

Should be 240 Ohms +-1%

96-BALL SDRAM DDR3 EV_SP@H5TC4G63CFR-N0C

MEM Reference Voltage 2

+1.5V_GFX

U27

R490 EV@243/F_4

96-BALL SDRAM DDR3 EV_SP@H5TC4G63CFR-N0C

MEM Reference Voltage 1 +1.5V_GFX

VREFCA VREFDQ

R46 EV@243/F_4

96-BALL SDRAM DDR3 EV_SP@H5TC4G63CFR-N0C

+1.5V_GFX

16

U28 U3

D

1

Channel A, RANK 0: 2Gb/4Gb gDDR3

VMA_DQ[63..0] VMA_WDQS[7..0] VMA_RDQS[7..0] VMA_MA[15..0] VMA_DM[7..0]

VMA_DQ[63..0] VMA_WDQS[7..0] VMA_RDQS[7..0] VMA_MA[15..0] VMA_DM[7..0]

2

+1.5V_GFX

VMA_CLK0

8*0.1uF, 8*1uF, 1*10uF/per VRAM

1uF x 16

R405 B

C601 EV@1u/6.3V_4

C686 EV@1u/6.3V_4

C681 EV@1u/6.3V_4

C598 EV@1u/6.3V_4

C635 EV@1u/6.3V_4

C684 EV@1u/6.3V_4

C99 EV@1u/6.3V_4

C604 EV@1u/6.3V_4

[email protected]/F_4

Dual Rank :80.6R (CS08062FB19) Single Rank :40.2R (CS04022FB28)

+1.5V_GFX

C567

C631 EV@1u/6.3V_4

C544 EV@1u/6.3V_4

C550 EV@1u/6.3V_4

C542 EV@1u/6.3V_4

C546 EV@1u/6.3V_4

C554 EV@1u/6.3V_4

C633 EV@1u/6.3V_4

C556 EV@1u/6.3V_4

C552 EV@1u/6.3V_4

C533 EV@1u/6.3V_4

C535 EV@1u/6.3V_4

C610 EV@1u/6.3V_4

C548 EV@1u/6.3V_4

C57 EV@1u/6.3V_4

C62 EV@1u/6.3V_4

B

VMA_CLK0_COM1 +1.5V_GFX [email protected]/50V_4

R406 [email protected]/F_4

C699 EV@1u/6.3V_4

C649 EV@1u/6.3V_4

C638 EV@1u/6.3V_4

C640 EV@1u/6.3V_4

C665 EV@1u/6.3V_4

C695 EV@1u/6.3V_4

C673 EV@1u/6.3V_4

C537 EV@1u/6.3V_4

VMA_CLK0#

C697 EV@1u/6.3V_4

CLK-A1 Termination +1.5V_GFX

+1.5V_GFX

VMA_CLK1

0.1uF x 16

0.1uF x 16

R526 [email protected]/F_4 C605 [email protected]/16V_4

C634 [email protected]/16V_4

C670 [email protected]/16V_4

C683 [email protected]/16V_4

C685 [email protected]/16V_4

C687 [email protected]/16V_4

C594 [email protected]/16V_4

C599 [email protected]/16V_4

R516

+1.5V_GFX

C659

C543 [email protected]/16V_4

C547 [email protected]/16V_4

C545 [email protected]/16V_4

C551 [email protected]/16V_4

C630 [email protected]/16V_4

C632 [email protected]/16V_4

C558 [email protected]/16V_4

C555 [email protected]/16V_4

C534 [email protected]/16V_4

C553 [email protected]/16V_4

C609 [email protected]/16V_4

C549 [email protected]/16V_4

C591 [email protected]/16V_4

C538 [email protected]/16V_4

C58 [email protected]/16V_4

VMA_CLK1_COM1

Dual Rank :80.6R Single Rank :40.2R

[email protected]/50V_4

+1.5V_GFX

[email protected]/F_4 VMA_CLK1# C676 [email protected]/16V_4

+1.5V_GFX

C694 [email protected]/16V_4

C696 [email protected]/16V_4

C698 [email protected]/16V_4

C639 [email protected]/16V_4

C653 [email protected]/16V_4

C642 [email protected]/16V_4

C536 [email protected]/16V_4

C656 [email protected]/16V_4

For dual rank design: Stuff the terminator 80.6R for clk even 4 pcs single rank only

10uF x 2

+1.5V_GFX

10uF x 2

C532 EV@10U/6.3V_4 C693 EV@10U/6.3V_4

C531 EV@10U/6.3V_4

C680 EV@10U/6.3V_4

A

A

Stitching Caps(0.1uF x 5) +1.5V_GFX

Stitching Caps(0.1uF x 5)

C539 [email protected]/16V_4

+1.5V_GFX

C660 [email protected]/16V_4

C678 [email protected]/16V_4

C682 [email protected]/16V_4

C689 [email protected]/16V_4

C607 [email protected]/16V_4

C608 [email protected]/16V_4

C541 [email protected]/16V_4

C540 [email protected]/16V_4

C679 [email protected]/16V_4

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Date:

Friday, January 29, 2016

Rev 1A

R16-M1-70/-30_S3_VRAM_DDR3 BGA(6/7) 5

4

3

2

Sheet 1

16

of

45

5

4

3

(VGA)

[15,16] [15,16] [15,16]

[15,16] [15,16] [15,16]

VREFC_VMA5 VREFD_VMA5

M8 H1

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VMA_MA15

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

VMA_BA0 VMA_BA1 VMA_BA2

VMA_CLK0 VMA_CLK0# VMA_CKE0

VMA_BA0 VMA_BA1 VMA_BA2

M2 N8 M3

VMA_CLK0 VMA_CLK0# VMA_CKE0

J7 K7 K9

VMA_ODT0 VMA_CS0#_1 VMA_RAS0# VMA_CAS0# VMA_WE0#

[15,16] VMA_ODT0 [15] VMA_CS0#_1 [15,16] VMA_RAS0# [15,16] VMA_CAS0# [15,16] VMA_WE0#

VMA_RDQS1 VMA_WDQS1

DRAM_RST_M

ODT CS RAS CAS WE

DML DMU

VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

DQSU DQSU

T2

VMA_ZQ5

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

DQSL DQSL

C7 B7

DRAM_RST_M

RESET

L8

ZQ

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

R412 EV_4G@243/F_4

Should be 240 Ohms +-1%

J1 L1 J9 L9

E3 F7 F2 F8 H3 H8 G2 H7

VMA_DQ11 VMA_DQ12 VMA_DQ8 VMA_DQ14 VMA_DQ10 VMA_DQ13 VMA_DQ9 VMA_DQ15

D7 C3 C8 C2 A7 A2 B8 A3

VMA_DQ22 VMA_DQ18 VMA_DQ20 VMA_DQ17 VMA_DQ23 VMA_DQ16 VMA_DQ21 VMA_DQ19

Byte 1

VREFC_VMA6 VREFD_VMA6

M8 H1

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VMA_MA15

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

VMA_BA0 VMA_BA1 VMA_BA2

M2 N8 M3

VMA_CLK0 VMA_CLK0# VMA_CKE0

J7 K7 K9

Byte 2

+1.5V_GFX

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

CK CK CKE

E7 D3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

BA0 BA1 BA2

F3 G3

VMA_RDQS2 VMA_WDQS2

[15,16]

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

K1 L2 J3 K3 L3

VMA_DM1 VMA_DM2

U23

VREFCA VREFDQ

NC#J1 NC#L1 NC#J9 NC#L9

B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GFX

A1 A8 C1 C9 D2 E9 F1 H2 H9

VMA_ODT0 VMA_CS0#_1 VMA_RAS0# VMA_CAS0# VMA_WE0#

K1 L2 J3 K3 L3

VMA_RDQS3 VMA_WDQS3

F3 G3

VMA_DM3 VMA_DM0

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9

VMA_RDQS0 VMA_WDQS0

C7 B7

DRAM_RST_M

T2

VMA_ZQ6

L8

J1 L1 J9 L9

BA0 BA1 BA2

ODT CS RAS CAS WE

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

DQSL DQSL DML DMU DQSU DQSU

RESET ZQ

VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

NC#J1 NC#L1 NC#J9 NC#L9

D7 C3 C8 C2 A7 A2 B8 A3

VMA_DQ7 VMA_DQ3 VMA_DQ6 VMA_DQ0 VMA_DQ5 VMA_DQ2 VMA_DQ4 VMA_DQ1

VREFC_VMA7 VREFD_VMA7

M8 H1

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VMA_MA15

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

Byte 3

Byte 0

+1.5V_GFX

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

CK CK CKE

VMA_DQ27 VMA_DQ29 VMA_DQ25 VMA_DQ30 VMA_DQ26 VMA_DQ28 VMA_DQ24 VMA_DQ31

B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GFX

A1 A8 C1 C9 D2 E9 F1 H2 H9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9

Should be 240 Ohms +-1%

VMA_BA0 VMA_BA1 VMA_BA2

M2 N8 M3

VMA_CLK1 VMA_CLK1# VMA_CKE1

J7 K7 K9

VMA_ODT1 VMA_CS1#_1 VMA_RAS1# VMA_CAS1# VMA_WE1#

K1 L2 J3 K3 L3

VMA_RDQS7 VMA_WDQS7

F3 G3

VMA_DM7 VMA_DM5

E7 D3

VMA_RDQS5 VMA_WDQS5

C7 B7

DRAM_RST_M

T2

VMA_ZQ7

L8

+1.5V_GFX

VREFCA VREFDQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2

CK CK CKE ODT CS RAS CAS WE DQSL DQSL DML DMU DQSU DQSU

RESET ZQ

R469 EV_4G@243/F_4

J1 L1 J9 L9

U6

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

E3 F7 F2 F8 H3 H8 G2 H7

VMA_DQ63 VMA_DQ58 VMA_DQ60 VMA_DQ59 VMA_DQ61 VMA_DQ56 VMA_DQ62 VMA_DQ57

D7 C3 C8 C2 A7 A2 B8 A3

VMA_DQ42 VMA_DQ47 VMA_DQ43 VMA_DQ46 VMA_DQ41 VMA_DQ45 VMA_DQ40 VMA_DQ44

Byte 7

VREFC_VMA8 VREFD_VMA8

M8 H1

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VMA_MA15

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

Byte 5

+1.5V_GFX

B2 D9 G7 K2 K8 N1 N9 R1 R9

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

+1.5V_GFX

A1 A8 C1 C9 D2 E9 F1 H2 H9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

[15,16] [15,16] [15,16]

[15,16] [15] [15,16] [15,16] [15,16]

VMA_CLK1 VMA_CLK1# VMA_CKE1

VMA_ODT1 VMA_CS1#_1 VMA_RAS1# VMA_CAS1# VMA_WE1#

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

VMA_BA0 VMA_BA1 VMA_BA2

M2 N8 M3

VMA_CLK1 VMA_CLK1# VMA_CKE1

J7 K7 K9

VMA_ODT1 VMA_CS1#_1 VMA_RAS1# VMA_CAS1# VMA_WE1#

K1 L2 J3 K3 L3

VMA_RDQS4 VMA_WDQS4

F3 G3

VMA_DM4 VMA_DM6

E7 D3

VMA_RDQS6 VMA_WDQS6

C7 B7

DRAM_RST_M

T2

VMA_ZQ8

L8

R128 EV_4G@243/F_4

Should be 240 Ohms +-1%

J1 L1 J9 L9

NC#J1 NC#L1 NC#J9 NC#L9 96-BALL SDRAM DDR3 EV_SP@H5TC4G63CFR-N0C

MEM Reference Voltage 7

+1.5V_GFX

+1.5V_GFX

R394 [email protected]/F_4

R111 [email protected]/F_4

R140 [email protected]/F_4

R129 [email protected]/F_4

VREFC_VMA5

VREFD_VMA5

VREFC_VMA6

VREFD_VMA6

VREFC_VMA7

VREFD_VMA7

VREFC_VMA8

[email protected]/F_4

R421

[email protected]/F_4

C603 [email protected]/16V_4

R397

[email protected]/F_4

C557 [email protected]/16V_4

R118

[email protected]/F_4

VRAM De-Coupling

C180 [email protected]/16V_4

[email protected]/F_4

R144

C212 [email protected]/16V_4

VMA_DQ36 VMA_DQ33 VMA_DQ39 VMA_DQ32 VMA_DQ38 VMA_DQ34 VMA_DQ37 VMA_DQ35

D7 C3 C8 C2 A7 A2 B8 A3

VMA_DQ48 VMA_DQ52 VMA_DQ49 VMA_DQ51 VMA_DQ54 VMA_DQ55 VMA_DQ50 VMA_DQ53

Byte 4

Byte 6

D

+1.5V_GFX

BA0 BA1 BA2

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

CK CK CKE ODT CS RAS CAS WE

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

DQSL DQSL DML DMU

VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

DQSU DQSU

RESET ZQ

B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GFX

A1 A8 C1 C9 D2 E9 F1 H2 H9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 VSSQ#B1 B9 VSSQ#B9 D1 VSSQ#D1 D8 VSSQ#D8 E2 VSSQ#E2 E8 NC#J1 VSSQ#E8 F9 NC#L1 VSSQ#F9 G1 NC#J9 VSSQ#G1 G9 NC#L9 VSSQ#G9 96-BALL SDRAM DDR3 EV_SP@H5TC4G63CFR-N0C

R188 [email protected]/F_4 VREFD_VMA8

R130

[email protected]/F_4

CLK-A0 Termination

8*0.1uF, 8*1uF, 1*10uF/per VRAM

E3 F7 F2 F8 H3 H8 G2 H7

+1.5V_GFX

R420 [email protected]/F_4

C576 [email protected]/16V_4

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

+1.5V_GFX

R404 [email protected]/F_4

R407

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

MEM Reference Voltage 8

+1.5V_GFX

R416 [email protected]/F_4

C596 [email protected]/16V_4

VREFCA VREFDQ

C

MEM Reference Voltage 6

+1.5V_GFX

R414

+1.5V_GFX

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

E3 F7 F2 F8 H3 H8 G2 H7

96-BALL SDRAM DDR3 EV_SP@H5TC4G63CFR-N0C

MEM Reference Voltage 5 +1.5V_GFX

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

R419 EV_4G@243/F_4

Should be 240 Ohms +-1%

96-BALL SDRAM DDR3 EV_SP@H5TC4G63CFR-N0C

C

E7 D3

VREFCA VREFDQ

17

Stuff when 8 pcs(4G)

U7 U24

D

1

Channel A, RANK 1 : 2Gb/4Gb gDDR3

VMA_DQ[63..0] VMA_WDQS[7..0] VMA_RDQS[7..0] VMA_MA[15..0] VMA_DM[7..0]

[15,16] VMA_DQ[63..0] [15,16] VMA_WDQS[7..0] [15,16] VMA_RDQS[7..0] [15,16] VMA_MA[15..0] [15,16] VMA_DM[7..0]

2

C186 [email protected]/16V_4

R177

[email protected]/F_4

VRAM De-Coupling

C247 [email protected]/16V_4

[email protected]/F_4

8*0.1uF, 8*1uF, 1*10uF/per VRAM

VMA_CLK0

1uF x 16

+1.5V_GFX

1uF x 16

R28 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 C104 C306 C165 C286 C47 C309 C184 C179 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4

[email protected]/F_4

EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 C22 C28 C24 C26 C31 C49 C52 C33 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4

C56

VMA_CLK0_COM2

Dual Rank :80.6R Single Rank :40.2R +1.5V_GFX

[email protected]/50V_4

R29

+1.5V_GFX [email protected]/F_4 VMA_CLK0#

EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 C281 C192 C167 C277 C231 C279 C246 C178 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4

EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 C581 C42 C70 C82 C45 C35 C587 C46 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4 EV_4G@1u/6.3V_4

CLK-A1 Termination VMA_CLK1 +1.5V_GFX

0.1uF x 16 +1.5V_GFX

R158

B

[email protected]/F_4 [email protected]/16V_4 C173

C185 [email protected]/16V_4

[email protected]/16V_4 C105 C168 [email protected]/16V_4

[email protected]/16V_4 C307

C303 [email protected]/16V_4

[email protected]/16V_4 C310

C194 [email protected]/16V_4

[email protected]/50V_4

R151 +1.5V_GFX

0.1uF x 16

B

C224

VMA_CLK1_COM2

Dual Rank :80.6R Single Rank :40.2R

[email protected]/16V_4 C27 C50 [email protected]/16V_4

[email protected]/16V_4 C55

C29 [email protected]/16V_4

[email protected]/16V_4 C34

[email protected]/16V_4 C32 C23 [email protected]/16V_4

C25 [email protected]/16V_4

[email protected]/16V_4 C588

[email protected]/16V_4 C584 C43 [email protected]/16V_4

C44 [email protected]/16V_4

[email protected]/F_4 +1.5V_GFX VMA_CLK1#

[email protected]/16V_4 C278

+1.5V_GFX

C280 [email protected]/16V_4

[email protected]/16V_4 C282 C244 [email protected]/16V_4

[email protected]/16V_4 C172

C225 [email protected]/16V_4

[email protected]/16V_4 C164

C216 [email protected]/16V_4

[email protected]/16V_4 C48 C72 [email protected]/16V_4

For dual rank design: Stuff the terminator 80.6R for clk even 4 pcs single rank only

10uF x 2 C276 EV_4G@10U/6.3V_4

C21 EV_4G@10U/6.3V_4

+1.5V_GFX

+1.5V_GFX

Stitching Caps(0.1uF x 5)

C100 [email protected]/16V_4

C36 [email protected]/16V_4

10uF x 2

+1.5V_GFX

C305 EV_4G@10U/6.3V_4

[email protected]/16V_4 C87

C606 [email protected]/16V_4

C148 [email protected]/16V_4

C146 [email protected]/16V_4

C103 [email protected]/16V_4

C30 EV_4G@10U/6.3V_4

Stitching Caps(0.1uF x 5)

C149 [email protected]/16V_4

C147 [email protected]/16V_4

C611 [email protected]/16V_4

C102 [email protected]/16V_4

C101 [email protected]/16V_4

+1.5V_GFX A

+1.5V_GFX +1.5V_GFX

+1.5V_GFX R66 R74 R64 R58 R55 R73 R69 R71

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7

EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4

R432 R443 R428 R422 R424 R444 R438 R437

EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4

R78 R92 R86 R88 R94 R60 R77 R72

VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA14 VMA_MA15

EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4

R449 R460 R459 R455 R464 R425 R448 R441

EV@100/F_4 EV@100/F_4 EV@100/F_4

VMA_BA0 VMA_BA1 VMA_BA2

R35 R486

EV@100/F_4 EV@100/F_4

VMA_CKE0 VMA_CKE1

R410 R133

EV@100/F_4 EV@100/F_4

R399 R134

EV@100/F_4 EV@100/F_4

VMA_ODT0 VMA_ODT1

R27 R487

EV@100/F_4 EV@100/F_4

R43 R169

EV@100/F_4 EV@100/F_4

VMA_CS0#_0 VMA_CS1#_0

R398 R547

EV@100/F_4 EV@100/F_4

R45 R552

EV@100/F_4 EV@100/F_4

VMA_CS0#_1 VMA_CS1#_1

R413 R170

EV@100/F_4 EV@100/F_4

R85 R91 R89

EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4 EV@100/F_4

R450 R465 R456

EV@100/F_4 EV@100/F_4 EV@100/F_4

A

EV@100/F_4 EV@100/F_4

VMA_RAS0# VMA_RAS1#

R408 R508

EV@100/F_4 EV@100/F_4

R33 R141

EV@100/F_4 EV@100/F_4

VMA_CAS0# VMA_CAS1#

R409 R493

EV@100/F_4 EV@100/F_4

R41 R132

EV@100/F_4 EV@100/F_4

VMA_WE0# VMA_WE1#

R411 R482

EV@100/F_4 EV@100/F_4

R32 R145

+1.5V_GFX [15,16] [15,16]

VMA_CS0#_0 VMA_CS1#_0

VMA_CS0#_0 VMA_CS1#_0

2015.11.09 Add that GAE suggest & SCL

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Date:

Friday, January 29, 2016

Rev 1A

R16-M1-70/-30_S3_VRAM_DDR3 BGA(7/7) 5

4

3

2

Sheet 1

17

of

45

1

2

LCD (LDS)

3

4

5

6

7

8

18

LCD Power (LDS)

+3V

+3V R389 *1K/F_4

VIN

+3V

+5V

1u/6.3V_4 C40

EDP_HPD

[4] EDP_HPD

U1 5

C17 R387

C16

C15

C14

IN

C530

C529

0.1u/16V_4 4.7u/25V_8

1000p/50V_4

1000p/50V_4

OUT GND

0.1u/16V_4 1000p/50V_4

4

[4] APU_DISP_ON

100K/F_4

EN

/OC

1

LCDVCC

2 C20 *0.1u/16V_4

3

C38 *2.2u/16V_6

C19 0.1u/16V_4

C37 0.01u/50V_4

C39 22U/6.3V_6

G524B1T11U

A

EDP_AUX_C EDP_AUX#_C

R21 R22

Enable:High Active /2.5A GMT: AL000524004 BCD : AL022802000

*100K/F_4 *100K/F_4

*short_8

V_BLIGHT

R23

*short_6

LCDVCC_R

C928 R20 R17 R15 R390

*22U/6.3V_6 *short_6 *0_4 *short_6 I2CT@0_4

R391

VIN

Front Camera (FCM) CCD

[6] USBP4+ [6] USBP4-

LCDVCC R383 R381

USBP4+_R USBP4-_R

*short_4 *short_4

CCD

+3V +3V +5V PCIERST#

Touch panel [5,11,21,22,23]

[4] APU_DISP_PWM EDP_HPD C528 180P/50V_4

TOUCH Screen (TSN)

[4] EDP_AUX [4] EDP_AUX# [4] EDP_TX1 [4] EDP_TX1#

TPA_PWR TP_RST#

*short_4

R386

33_4

BRIGHT BL_ON EDP_HPD_R

C527 C526

0.1u/16V_4 0.1u/16V_4

EDP_AUX_C EDP_AUX#_C

C525 C524

0.1u/16V_4 0.1u/16V_4

EDP_TX1_C EDP_TX1#_C

0.1u/16V_4 0.1u/16V_4

EDP_TX0_C EDP_TX0#_C

C523 C522

[4] EDP_TX0 [4] EDP_TX0# I2C_SCL_TS_R R12 I2C_SDA_TS_R R11

B

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CN5

CCD_PWR

R388

USBP4+_R USBP4-_R

I2CT@0_4 I2CT@0_4

USBP2+_R/TP_CLK USBP2-_R/TP_DATA [4] [4] [33] [4] [4]

eDP 4k*2k

EDP_TXP2 EDP_TXN2 TS_EN_R EDP_TXP3 EDP_TXN3

EDP_TXP2 EDP_TXN2

C521 C520

0.1U/16V_4 0.1U/16V_4

EDP_TXP2_C EDP_TXN2_C

EDP_TXP3 EDP_TXN3

C519 C518

0.1U/16V_4 0.1U/16V_4

EDP_TXP3_C EDP_TXN3_C

R376

[5] BOARD_ID4

G_5

*100K/F_4 *100K/F_4

33_4 TP_INT#

For Touch or None-Touch C517 180P/50V_4

LVDS_CONN

G_4

Backlight Control (LDS) B

+3VPCU

G_1

R16 *100K/F_4 +3VPCU

+3V

+3V

LID#

LID# [33]

LID591#,HALL intrnal PU D1 1N4148WS

R13

G_0

R19 R18

A

R24 100K/F_4

+3V

R14

R10

10K/F_4 BL_ON 3

3

10K/F_4 *10K/F_4

R9 *I2CT@10K/F_4 2 R212

4

[5] I2C_SCL_TS

TP_INT#

1

R7

APU_DISP_BLEN

2.2K_4

R8 100K/F_4

R392 [email protected]_4

APU_BLEN_R

[33]

2

Q3 MMBT3904-7-F

I2C_SCL_TS_R

3 2

Q14 *I2CT@2N7002K

C

[4,33]

EC_FPBACK#

Q4 DTC144EU

5

3

[5] APU_TP_INT#

R393 [email protected]_4

Q6

*I2CT@0_4 +5V I2CT@0_4 +3V

1

R395 R396

VDD_18

2

1

+3V

2 Q5 2N7002K 1

3

BL#

C

1.8V_S0 [5] I2C_SDA_TS

I2CT@0_4

1

I2C_SDA_TS_R

6 I2CT@PJT138K

Lid Switch (HSR) AL008251000 -- YBT AL008132004 -- ANC

+3VPCU

1U/6.3V_4 1

C515

1

LID#

MR1 APX9132H_AI-TRG

D10 *TVS/6pF_4 2

3

2

D

D

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

EDP/LID/CCD Date: 1

2

3

4

5

6

7

Thursday, March 03, 2016

Sheet

18 8

of

45

5

4

3

2

1

4Kx2K (HDM)

19

+3V

+3V_HDMI R249

C446 [email protected]/16V_4

Add it when using HDMI level shifter

*RP@0_6

C449

C415

C414

C447

C448

[email protected]/16V_4

[email protected]/16V_4

[email protected]/16V_4

[email protected]/16V_4

[email protected]/50V_4

[email protected]/50V_4

HDMI_EQ1

R250

RP@10K/F_4 +3V

R260

*RP@0_4

R248

*RP@10K/F_4 +3V

R256

RP@0_4

[4] [4] [4] [4] [4] [4] [4] [4]

C443 C441 C436 C434 C431 C425 C421 C419

INT_HDMITX0P INT_HDMITX0N INT_HDMITX1P INT_HDMITX1N INT_HDMITX2P INT_HDMITX2N INT_HDMICLK+ INT_HDMICLK-

INT_HDMITX0P_C_R INT_HDMITX0N_C_R INT_HDMITX1P_C_R INT_HDMITX1N_C_R INT_HDMITX2P_C_R INT_HDMITX2N_C_R INT_HDMICLK+_C_R INT_HDMICLK-_C_R

*[email protected]/16V_4 *[email protected]/16V_4 *[email protected]/16V_4 *[email protected]/16V_4 *[email protected]/16V_4 *[email protected]/16V_4 *[email protected]/16V_4 *[email protected]/16V_4

25 26 27 28 29 30 31 32 33

HDMI_EQ0

R257 R258

[4] HDMI_DDCCLK_SW [4] HDMI_DDCDATA_SW

HDMI_DDCCLK_SW1 HDMI_DDCDATA_SW1

*RP@0_4 *RP@0_4

+3V_HDMI

Co-Layout R851

INT_HDMI_HPD

INT_HDMI_HPD_RP

*RP@0_4

C413

HDMI_MB_HPD

IN_D1IN_D1+ IN_D2IN_D2+ IN_D3IN_D3+ IN_D4IN_D4+

OUT_D1OUT_D1+ OUT_D2OUT_D2+ OUT_D3OUT_D3+ OUT_D4OUT_D4+

CEN_PAD

16 15 14 13 12 11 10 9

To Choke

HDMI_DDCCLK_MB1 HDMI_DDCDATA_MB1

R303 R304

*RP@0_4 *RP@0_4

HDMI_DDCCLK_MB HDMI_DDCDATA_MB

INT_HDMITX0P_C1 INT_HDMITX0N_C1 INT_HDMITX1P_C1 INT_HDMITX1N_C1 INT_HDMITX2P_C1 INT_HDMITX2N_C1 INT_HDMICLK+_C1 INT_HDMICLK-_C1

R301 R296 R288 R284 R281 R276 R273 R267

*RP@0_4 *RP@0_4 *RP@0_4 *RP@0_4 *RP@0_4 *RP@0_4 *RP@0_4 *RP@0_4

INT_HDMITX0P_C INT_HDMITX0N_C INT_HDMITX1P_C INT_HDMITX1N_C INT_HDMITX2P_C INT_HDMITX2N_C INT_HDMICLK+_C INT_HDMICLK-_C

37 GND 36 GND 35 GND 34 GND RP@PTN3366BS

HDMI_EQ1

[4,19]

*RP@0_4

D

GND TERM_EN DDC_EN HPD_SNK SDA_SNK SCL_SNK VDD OE_N

U17

Co-Layout

From APU

R848

Co-Layout

VDD EQ1 GND REXT HPD_SRC SDA_SRC SCL_SRC EQ0

C450

HDMI_MB_HPD_RP

24 23 22 21 20 19 18 17

+3V_HDMI

Co-Layout

C445 [email protected]/16V_4

1 2 3 4 [email protected]/F_4 INT_HDMI_HPD_RP 5 HDMI_DDCDATA_SW16 HDMI_DDCCLK_SW1 7 HDMI_EQ0 8

D

HDMI_MB_HPD_RP HDMI_DDCDATA_MB1 HDMI_DDCCLK_MB1

+3V_HDMI +3V_HDMI

[email protected]/16V_4

C

R259

C

Normal Rout

HDMI DDC (HDM) +3V

+3V

HDMI_DDCCLK_SW

Normal Rout

HDMI-detect (HDM) 2

R244 2.2K_4

R253

*shortNRD@0_4

Q22 NRD@2N7002K

HDMI_DDCCLK_COM1

3

R306

*shortNRD@0_4

**Share with normal rout

HDMI_DDCCLK_MB

+3V

+5V +HDMI_5V

R850 NRD@10K/F_4

R309 NRD@10K/F_4

Co-Layout HDMI_HPD_R

R254

*shortNRD@0_4

HDMI_DDCDATA_COM 1

Q23 NRD@2N7002K 3 R307

Co-Layout

HDMI(HDM)

R310

2.2K_4

1 D6

2 RB501V-40

HDMI_DDCDATA_MB

R311

2.2K_4

1 D7

2 RB501V-40

R305 NRD@100K/F_4

Q21

B

NRD@2N7002DW

*shortNRD@0_4 HDMI_DDCDATA_MB

4

HDMI_DDCDATA_SW

HDMI_MB_HPD

*shortNRD@0_4 R847

HDMI_DDCCLK_MB

5

*shortNRD@0_4 R308

INT_HDMI_HPD

3

[4,19]

1

B

2

R245 2.2K_4

2

+3V

6

+3V

Co-Layout

Co-Layout

Normal Rout +5V

+HDMI_5V

EMI

*CM1225-04DE

INT_HDMITX2P INT_HDMITX2N

[email protected]/16V_4 [email protected]/16V_4

INT_HDMITX2P_R3 INT_HDMITX2N_R3

R280 R275

To Choke

INT_HDMITX1P_C INT_HDMITX1N_C

*shortNRD@0_4 INT_HDMITX2P_C *shortNRD@0_4 INT_HDMITX2N_C

INT_HDMITX1P INT_HDMITX1N

C437 C435

[email protected]/16V_4 [email protected]/16V_4

INT_HDMITX1P_R3 INT_HDMITX1N_R3

R287 R283

*shortNRD@0_4 INT_HDMITX1P_C *shortNRD@0_4 INT_HDMITX1N_C

INT_HDMITX0P INT_HDMITX0N

C442 C444

[email protected]/16V_4 [email protected]/16V_4

INT_HDMITX0P_R3 INT_HDMITX0N_R3

R300 R295

*shortNRD@0_4 INT_HDMITX0P_C *shortNRD@0_4 INT_HDMITX0N_C

INT_HDMICLK+ INT_HDMICLK-

C422 C420

[email protected]/16V_4 [email protected]/16V_4

INT_HDMICLK+_R3 INT_HDMICLK-_R3

R272 R266

*shortNRD@0_4 INT_HDMICLK+_C *shortNRD@0_4 INT_HDMICLK-_C

INT_HDMITX0P_C INT_HDMITX0N_C INT_HDMICLK+_C INT_HDMICLK-_C

5 4 3 2 1

5 4 3 2 1

5 6 4 7 GND_3/8 2 9 1 10 ESD4 *CM1225-04DE 5 4 GND_3/8 2 1 ESD3

6 7 9 10

6 7 9 10

INT_HDMITX2P_C INT_HDMITX2N_C

Q16

3

INT_HDMITX1P_C INT_HDMITX1N_C

IN

OUT GND AP2802NTR-G1-01

BCD : AL002802002 GMT : AL005250003 6 7

INT_HDMITX0P_C INT_HDMITX0N_C

9 10

INT_HDMICLK+_C INT_HDMICLK-_C

INT_HDMITX2P_C C408 *220p/50V_4

INT_HDMITX2N_C INT_HDMITX1P_C

D5 *EGA_4

INT_HDMITX1N_C INT_HDMITX0P_C INT_HDMITX0N_C INT_HDMICLK+_C INT_HDMICLK-_C

R265 499_4

R274 499_4

R277 499_4

R282 499_4

Close to Choke

R285 499_4

R291 499_4

R298 499_4

HDMI_DDCCLK_MB HDMI_DDCDATA_MB

R302 499_4 HDMI_MB_HPD

Q17 +5V

R255

R246

+HDMI_5V

*short_4

D23 *EGA_4

2

*short_4

INT_HDMITX2P_C

CN14

1 2

3

A

C432 C426

Co-Layout

INT_HDMITX2P_C INT_HDMITX2N_C

D25 *EGA_4

D4 *EGA_4

HP_DET_CN

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

SHELL1 D2+ D2 Shield D2D1+ D1 Shield D1D0+ D0 Shield D0GND CK+ CK Shield GND CKCE Remote NC DDC CLK DDC DATA GND +5V HP DET SHELL2

20 R299

INT_HDMITX2N_C

R286

*120/F_4 INT_HDMITX1N_C

23 INT_HDMITX0P_C

22

R279

*120/F_4 INT_HDMITX0N_C

INT_HDMICLK+_C R271

A

*120/F_4

21 INT_HDMICLK-_C

HDMI_CONN

2N7002K R247 100K/F_4

*120/F_4

INT_HDMITX1P_C

Quanta Computer Inc.

1

From APU

Co-Layout

PROJECT : ZAB Size

Document Number

Rev 1A

De-Mux (PS8339B )/HDMI Date: 5

4

3

2

Friday, March 04, 2016 1

Sheet

19

of

45

5

4

3

2

1

DP TO VGA (CRT) [5,9,10,25] [5,9,10,25]

R240 R241

CLK_SDATA CLK_SCLK

20

*0_4 *0_4 C398

Power

0.1U/16V_4

CIIC_SDA

D

+3V

CIIC_SCL

DP_HPD

+3V

D

VCCK_V12

R230

4.7K_4

25

27

26 PVCC_33

LDO_RSTB

28 XI

30

29 SMB_SDA

VCCK_12

23

CRT_RED

22

CRT_GRE

21

CRT_BLU

20

VDD_DAC_33

19

HSYNC

18

VSYNC

VGA_SDA

LANE1_N

16

LANE1_P

0.1U/16V_4

2.2U/10V_4

C779 +5V

0.1U/16V_4

Note: C365

C364

0.1U/16V_4

4.7U/6.3V_4

1- Caps should be placed close to chip

C

2- Pin 9's Cap shold be X5R material 3- R,G,B's R should be 75 ohm with +/-1% 4- Suggest to connect Pin 29 and Pin 30 to PCH SMBUS for debug purpose. 5- This configuration is for internal ROM mode and using embedded LDO mode.

RTD2166CG

Slave Address: 0x64/0x65 and 0x68/0x69

DDCDAT

0.1U/16V_4

C368

VGA_SCL

C371

+3V

VCC_33

LANE0_N

12

LANE0_P

0.1U/16V_4

11

0.1U/16V_4

C375

4.7K_4

C385

SMB_SCL

31

32 HPD

AUX_CH_P

C395

0.1U/16V_4

17

HVSYNC_PW R

15

AUX_CH_N

LANE1_N

14

8

VSYNC

DDCCLK

LANE1_N

LANE1_P

+3V

7

HSYNC

SPI_SO

LANE1_P

LANE0_N

SPI_SI

6

13

LANE0_N

VDD_DAC_33

TP37

0.1U/16V_4

RTD2166

BLUE_P

LANE0_P

SPI_CLK

5

R229

[4] DP2_TX1#

LANE0_P

*4.7K_4

[4] DP2_TX1

C382

AVCC_12

R854

[4] DP2_TX0#

4

GREEN_P

R853

[4] DP2_TX0

0.1U/16V_4

VCCK_V12

RED_P

AUX_N

C397

24

GND

AUX_P

POL2

C394

3

9

[4] DP2_AUX

0.1U/16V_4

AUX_CH_N

AVCC_33

10

C393

2

EXT1.2V_CTRL

EPAD

R243 100K/F_4

[4] DP2_AUX#

1

DP_HPD

*short_4

C

AVCC33 AUX_CH_P

4.7K_4

R242

[4] DP2_HPD

U16

POL1/SPI_CEB

VDD_DAC_33 L18 BLM15BB470SN1D(47/0.3)_4

33

AVCC33 L9 BLM15BB470SN1D(47/0.3)_4

+3V

B

+5V

OE#

VCC

5

5 4 3 2 1

CRT_B1 CRTVDD5

U36

1

ESD2 CRT_R1 CRT_G1

C741 *0.1u/16V_4

5 4 GND_3/8 2 1

6 7 9 10

6 7

CRT_R1 CRT_G1

9 10

CRT_B1 CRTVDD5

CRTVDD5

BCD : AL002802002 GMT : AL005250003 +5V

*CM1225-04DE

2 3

A

Y

4

R667

*33_4

CRTHSYNC

5 4 3 2 1

DDCDAT CRTHSYNC CRTVSYNC DDCCLK

GND *74AHCT1G125GW

R670

*short_4

5 4 GND_3/8 2 1

6 7 9 10

6 7

DDCDAT CRTHSYNC

9 10

CRTVSYNC DDCCLK

*CM1225-04DE R666

3

IN

OUT GND

1 2

Close to RT2166

0.1u/16V_4

CRT_RED

L8

BLM15BB470SN1D(47/0.3)_4

CRT_R1

CRT_GRE

L7

BLM15BB470SN1D(47/0.3)_4

CRT_G1

CRT_BLU

L6

BLM15BB470SN1D(47/0.3)_4

CRT_B1

+5V

R225 75/F_4

0.22u/10V_4 CRTVDD5

C332

*220p/50V_4

C333

0.1u/16V_4

R224 75/F_4

R221 75/F_4

C360

C354

C345

C344

C353

C359

10p/50V_4

10p/50V_4

10p/50V_4

10p/50V_4

10p/50V_4

10p/50V_4

U34

1 VSYNC R654

*0_4

2

OE# A

VCC Y

5 4

11

CRT_11

12

DDCDAT

13

CRTHSYNC

14

CRTVSYNC

15

DDCCLK

TP35

CRT_CONN

C750 *0.1u/16V_4 R663

*33_4

CRTVSYNC

A

3

CN13

6 1 7 2 8 3 9 4 10 5

47/F_4

C336

B

CRTVDD5 C334

AP2802NTR-G1-01

17

*0_4

DDCCLK DDCDAT

2.2K_4 2.2K_4

Q15

ESD1 HSYNC R671

R217 R220

16

RTD2166 integrate 5V HSYNC/VSYNC buffer inside IC Reserved for debug

GND

C338

2.2P/50V_4 CRTVSYNC

C339

2.2P/50V_4 CRTHSYNC

C337

1n/50V_4

DDCCLK

C341

1n/50V_4

DDCDAT

vendor test report A

vendor projector result

*74AHCT1G125GW R661

*short_4

R662

47/F_4

Quanta Computer Inc. PROJECT : ZAB

Co-Layout

Size

Document Number

Rev 1A

CRT/DP2VGA(RTD2166) Date: 5

4

3

2

Sheet

Monday, March 07, 2016 1

20

of

45

5

4

3

2

LAN & Card reader Combo (LAN)

21

Tramsformer

LAN_XTALI

C348

2 1

10p/50V_4

1

SP8

All termination trace > 30 mils

Y1 U35

TP32 R223

2.49K/F_4

RSET C351

10 mils

*10P/50V_4

MDI_2+ MDI_2-

7 8 9

MDI_3+ MDI_3-

10 11 12

48 47 46 45 44 43 42 41 40 39 38 37

+LANVCC

18 17 16

LAN_MX2+ LAN_MX2-

TCT3 TD3+ TD3-

MCT3 MX3+ MX3-

TCT4 TD4+ TD4-

15 MCT4 14 MX4+ 13 MX4TRANSFORMER

LAN_MCT1

LAN_MCT3 LAN_MX3+ LAN_MX3-

C331 0.01U/50V/X7R_4

+3V REGOUT VDDREG

VDD10

MDI_3+ MDI_3-

+LANVCC +3V

MDIP0 MDIN0 AVDD10 MDIP1 MDIN1 MDIP2 MDIN2 AVDD10 MDIP3 MDIN3 HV_GIGA VDD3

REG_OUT VDDREG ENSWREG VDD1 VD33 ISOLATEBPIN PERSTBPIN CLKREQBPIN MS_BS/SD_WP# DV33_18 HSON HSOP

RTL8411B-CG

QFN48

36 35 34 33 32 31 30 29 28 27 26 25

ENSWREG R226 R228 ISOLATEB PERSTBPIN PCIE_REQ_LAN#_R SP7 VDD33/18 PCIE_RXN0_C2 C387 PCIE_RXP0_C2 C392

R227 *short_4

*short_8

R232 1K/F_4

+LANVCC

VDD10 *short_4 +LANVCC

C374

PCIE_RXN0 PCIE_RXP0

15K/F_4

[2] [2]

RJ45 Connector

13 14 15 16 17 18 19 20 21 22 23 24

0.1U/16V_4

+CARD_3V3 C

C714 1000P/3KV_1808

R231 0.1u/16V_4 0.1u/16V_4

CARD_3V3 SD_D1 SD_D0/MS_D1 SD_CLK/MS_D0 SD_CMD/MS_D2 SD_D3/MS_D3 SD_D2/MS_CLK VDDTX HSIP HSIN REFCLK_P REFCLK_N

1 2 3 4 5 6 7 8 9 10 11 12

MDI_1+ MDI_1MDI_2+ MDI_2-

TERM9

MDI_0+ MDI_0VDD10

R234

NAC@0_4

R233

IOAC@0_4

PCIERST#

SP1 SP2 SP3 SP4 SP5 SP6

CLK_PCIE_LANN CLK_PCIE_LANP PCIE_TXN0 [2] PCIE_TXP0 [2]

[5,11,18,22,23]

IOAC_RST#

C390 0.1U/16V_4

D

LAN_MCT2

R219

E_PAD

LAN_MX1+ LAN_MX1-

MCT2 MX2+ MX2-

25

49

HV_GIGA RSET LV_CEN CKXTAL2 CKXTAL1 MS_CD# SD_CD# LED0 LED_CR LANWAKEB LED1/GPO LED2

U15

21 20 19

TCT2 TD2+ TD2-

75/F_8

4 5 6

75/F_8

TP34

75/F_8

TP33

VDD10 D

LAN_MCT0 LAN_MX0+ LAN_MX0-

MCT1 MX1+ MX1-

R215

MDI_1+ MDI_1-

PCIE_LAN_WAKE#_R

24 23 22

TCT1 TD1+ TD1-

75/F_8

1 2 3

R216

C347

MDI_0+ MDI_0-

R218

TP36

TP31

10p/50V_4

*10P/50V_4

LAN_XTAL2

GND

C352

4 3

25MHZ

CN10 LAN_MX0+ LAN_MX0LAN_MX1+ LAN_MX2+ LAN_MX2LAN_MX1LAN_MX3+ LAN_MX3-

[22,33]

[6] [6]

1 2 3 4 5 6 7 8

12 11

G G

0+ 01+ 2+ 213+ 3-

C

10 9

G G

CONN_RJ45_SINK EVDD10

For RTL8111H Place 0.1 uF close to each pin 11, 32,48 +LANVCC

RTL8111H (LDO mode)

40 mils (Iout=1A)

close to each VDD10 pin-- 3, 8, 33, 46

Crad Reader Connector

close to each VDD10 pin-- 46 (reserve)

REGOUT

VDD10 C355

C373

C342

C346

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

4.7U/6.3V_4

4.7U/6.3V_4

40 mils (Iout=1A)

R222

*short_8

C356 0.1u/16V_4

For RTL8111H Place 4.7 uF close to each pin 12,35

40 mils (Iout=1A)

CN2

EMI C343 0.1u/16V_4

C396 0.1u/16V_4

C366 0.1u/16V_4

C350 0.1u/16V_4

C362 *1U/6.3V_4

SP7 SP8 SP6 SP1 SP2

C363 *0.1u/16V_4

R365 R362 R363

*short_4 *short_4 *short_4

SP3

R364 R359

*short_4 *short_4

SP4 SP5

R360 R361

*short_4 *short_4

SD_CLK_R +VCC_XD

WP CD DATA2 DATA1 DATA0 VSS2 CLK VDD VSS1 CMD CD/DATA3

EVDD10

VDD10

B

10 mils R239

VDDREG

30 mils

40 mils

R855

C508

*2K/F_4

4.7u/6.3V_4

SD-CARD

B

C502 0.1u/16V_4

*short_6

VDD33/18

C372

C391

C386

C361

C357

1U/6.3V_4

0.1U/16V_4

*4.7U/6.3V_4

0.1U/16V_4

16 17

NC NC

12 13 14 15

+CARD_3V3

11 10 9 8 7 6 5 4 3 2 1

GND GND GND GND

C349

10 mils Close to CONN

C369

*4.7U/6.3V_4 0.1U/16V_4

EMI SP1 SP2 SP3 SP4 SP5 SP6

Place close to pin 27 Close to Pin20

Leakage circuit

Place connect to Pin35 C505

C506

C507

C503

C504

C509

*10p/50V_4

*10p/50V_4

*10p/50V_4

*10p/50V_4

*10p/50V_4

*10p/50V_4

IOAC +3V

+3V

3V_S0

Share Pin

R235 *10K/F_4

+3VPCU

+LANVCC

SP1 SP2 SP3 SP4 SP5 SP6 SP7 SP8 SP9

PCIE_REQ_LAN#_R

3

1 Q18 *2N7002K

3

+3V_LAN

R261

IOAC@0_8

R262

NAC@0_8

C440

*short_4 *[email protected]/16V_4

R294 *IOAC@100K/F_4

2

R268

+3V_S5

Q20 IOAC@AO3413

MAIN POWER(3V_S0)

1

[5] PCIE_REQ_LAN#

+3V

2

R292 10K/F_4

C400 10U/6.3V_4

C383 0.1u/16V_4

C370 *0.1u/16V_4

C399 *0.1u/16V_4

SD_D1 SD_D0 SD_CLK SD_CMD SD_D3 SD_D2 SD_WP SD_CD#

MS_D1 MS_D0 MS_D2 MS_D3 MS_CLK MS_BS MS_INS#

+LANVCC A

A

[33] LANPWR#

R293 IOAC@10K/F_4

2

R290 IOAC@10K/F_4

EC_PCU [33] IOAC_LAN_WAKE#

R269

IOAC@0_4

C439 *IOAC@1000p/50V_4

LANVCC

3

1

PCIE_LAN_WAKE#_R

Q19 IOAC@2N7002K [5,12,22]

PCIE_LAN_WAKE#

R297

Quanta Computer Inc.

NAC@0_4

APU 3V_S5(Ext PU)

PROJECT : ZAB Size

Document Number

Rev 1A

LAN-CR COMBO Date: 5

4

3

2

Thursday, March 03, 2016

Sheet 1

21

of

45

5

4

3

2

1

22

NGFF_M.2 WiFi & BT (NGF) CN3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75

[6] USBP2+ [6] USBP2D

[2] PCIE_TXP1 [2] PCIE_TXN1 [2] PCIE_RXP1 [2] PCIE_RXN1 [6] CLK_PCIE_W LANP [6] CLK_PCIE_W LANN CLKREQ_W LAN# W AKE_W LAN#

C

R384 R385

[6] CLK_LPC_DEBUG [6,25,33] LPC_LFRAME#

CLK_LPC_DEBUG_C LPC_LFRAME#_C

*0_4 *0_4

FOR Debug card, MP remove them.

+W L_VDD +W L_VDD

NGFF GND 3.3Vaux USB_D+ 3.3Vaux USB_DLED#1 GND PCM_CLK SDIO CLK(O) PCM_SYNC SDIO CMDIO) PCM_IN SDIO DAT0(IO) PCM_OUT SDIO DAT1(IO) LED#2 SDIO DAT2(IO) GND SDIO DAT3(IO) UART Wake SDIO Wake(I) UART Rx SDIO Reset Key 5 KEY1 Key 6 KEY2 Key 7 KEY3 Key 8 KEY4 UART Tx GND UART CTS PETp0 UART RTS PETn0 Clink RESET GND CLink DATA PERp0 CLink CLK PERn0 COEX3 GND COEX2 REFCLKP0 COEX1 REFCLKN0 SUSCLK(32KHz) GND PERST0# CLKREQ0# W_DISABLE#2 PEWake0# W_DISABLE#1 GND NFC I2C SM DATA PETp1 NFC I2C SM CLK PETn1 NFC I2C IRQ GND NFC Reset# PERp1 RESERVED3 PERn1 RESERVED4 GND RESERVED5 Reserved1 3.3Vaux Reserved2 3.3Vaux GND

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74

C11 C5 C6 C13 C12

SUSCLK W LAN_RST# BT_EN RF_EN

A_LAD0_R A_LAD1_R A_LAD2_R A_LAD3_R

R374 R377 R375

R378 R379 R380 R382

10U/6.3V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4

NAC@0_4 IOAC@0_4 *0_4

*short_4 *short_4 *short_4 *short_4

D

PCIERST# [5,11,18,21,23] IOAC_RST# [21,33] PLTRST# [5,25,33] BT_EN [33] RF_EN [33]

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

WIFI card reset (non-IOAC) WIFI card reset (IOAC) Debug card reset

[6,25,33] [6,25,33] [6,25,33] [6,25,33]

+W L_VDD C

W LAN_NGFF_CONN_E_KEY

Leakage circuit

+W L_VDD

IOAC@AO3413 3+3V_W LAN R2

IOAC@0_8

R1

+3V R373 *4.7K_4

NAC@0_8

R367 [email protected]_4

2

Q1 1

+3VPCU

+W L_VDD

+3V

Keep 0 Ohm (don't change to short pad)

C7 R4 *IOAC@100K/F_4

C4 *10U/6.3V_4

2

*[email protected]/16V_4

C1 *0.1u/16V_4

C3 *0.1u/16V_4

C2 *0.1u/16V_4

1

[5] PCIE_CLKREQ_W LAN#

3 Q30 IOAC@2N7002K

APU 3V_S0(Int PU)

CLKREQ_W LAN#

IOAC 3V_S0

R3

[33] W LANPW R#

R370

NAC@0_4

C9

IOAC@10K/F_4

*IOAC@1000p/50V_4

Low

M2 card power enable

High

M2 card power disable

B

+W L_VDD

EC PCU [33] IOAC_W LAN_W AKE# [5,12,21]

***ZRZ reserved for 1.5V's module (doesn't use) Q2

R366

IOAC@0_4

R369

*0_4

3

W AKE_W LAN#

1

Q28 IOAC@2N7002K

IOAC 3V_S0

APU 3V_S5(Ext PU)

*IOAC@AO3413

+W L_VDD

3+3V_W LAN

1

+1.5VSUS

PCIE_LAN_W AKE#

R371 [email protected]_4

2

B

C8

W LANPW R#

R6 *IOAC@100K/F_4

2

R5 *IOAC@10K/F_4

R372 *10K/F_4

2

*[email protected]/16V_4

3

[5] SUS_CLK C10

1

Q29 *2N7002K

APU 3V_S5(Ext PU)

C516 *22P/50V_4

*IOAC@1000p/50V_4 R368

A

SUSCLK

+WL_VDD

*0_4

A

Quanta Computer Inc. PROJECT :ZAB Size

Document Number

Rev 1A

NGFF(WiFi&BT combo) Date: 5

4

3

2

Thursday, March 03, 2016

Sheet 1

22

of

45

5

4

3

2

1

PCIE to SATA III (HDD) AKE35ZN0N00 (1 Mb)...EC AKE37FN0N05 (4 Mb)..SSD

refer to support list

+3.3V_10048

Power up sequence +3.3V & +1.2V

23

SPI ROM

+3.3V_10048

R679 *[email protected]_4

90%

+3.3V_10048 +3.3V_10048 8 7 6 5

HOLD#_10048 SPI_CLK_10048 SPI_DO_10048

*SSD@W25X40CLSNIG

D

C777 *[email protected]/16V_4

HOLD#0:Operation Lock 1:Normal Operation

**[email protected]_4

R674

*shortSSD@0_4

PCIERST#

[5,11,18,21,22] D

Close to IC +3V

+3.3V_10048 R673

H/W Strapping refer to datasheet:

R653

*shortSSD@0_4 +1.2V_10048

T>0ms

R687

SPI_DO 0: Spin up by H/W 1: Spin up by S/W

[email protected]/F_4

SPI_DI_10048 SPI_CS_10048 SPI_DO_10048 SPI_CLK_10048 PREXT_10048

CE# VDD SO HOLD# WP# SCK VSS SI

TP69

1 2 3 4

PERST_10048 +3.3V_10048 +1.2V_10048

U38 SPI_CS_10048 SPI_DI_10048 WP#_10048

PERST

2nd source: TXC:BG620000040 HHE:BG620000039

Frequency Tolerance: +/-30PPM CL: 20pf

[email protected]/1A_2X2 EXTL_10048

U37

L and C close to pin2 XO_10048

C765 SSD@10u/6.3V_4 low ESR close to pin 1

Y5 SSD@20MHz

C756 SSD@15P/50V_4

XTAL-CAP=NPO type

Cout is mandatory.

EXTL_10048 VCC33IN4 GPIO0_I2C_CLK4 GPIO1_I2C_DATA4

*shortSSD@0_4 C761 SSD@10u/6.3V_4

1 2

Internal 1.25V voltage

+3.3V_10048 R672

3 4

C759 [email protected]/16V_4

TP68 TP67 TP66 TP65

+1.2V_10048 +3.3V_10048

close to pin3/pin 1

XI_10048

+1.2V_10048 +1.2V_10048

Cin is mandatory.

XI & XO follow differential layout rule for Min. jitter

1 2 3 4 5 6 7 8 9 10 11 12

VSSPWM EXTL VCC33IN GPIO0 GPIO1 GPIO2 VCC12_1 GND1 VCC33_1 GND2 VCC12_2 VDD12S_1

C771

[email protected]/16V_4

C766

[email protected]/16V_4

C749

[email protected]/16V_4

13 14 15 16 17 18 19 20 21 22 23 24

+1.2V_10048

GND4 VCC12_4 TESTMODE LED PERST# VCC33_2 VCC12_3 GND3 SPI_DI SPI_CS# SPI_DO SPI_CK PREXT

L17

+1.2V_L10048

SRXP_B SRXN_B GNDA1 STXN_B STXP_B SREXT VCC33S STXP_A STXN_A GNDA2 SRXN_A SRXP_A

>40mil

49 48 47 46 45 44 43 42 41 40 39 38 37

+1.2V_10048

VCC33P PTXN PTXP GNDA3 PRXN PRXP VDD12P XI XO PECLKN PECLKP VDD12S_2

36 35 34 33 32 31 30 29 28 27 26 25

+3.3V_10048 PTXN_10049 PTXP_10048

C762 C760

[email protected]/16V/X7R_4 [email protected]/16V/X7R_4

PCIE_RXN2 PCIE_RXP2

PCIE_TXN2 PCIE_TXP2

+1.2V_10048 XI_10048 XO_10048

CLK_PCIE_SSDN CLK_PCIE_SSDP

+1.2V_10048

[2] [2]

[2] [2]

[6] [6]

SSD@ASM1061

C

Vendor suggest: AL902525001(RT9025-25GSP) Delete... Just choose one of external 1.25V regulator or IC internal regulator (@Pin 2).

+3.3V_10048

C758

[email protected]/16V_4

C763

[email protected]/16V_4

C755

[email protected]/16V_4

C768

[email protected]/16V_4

C754

[email protected]/16V_4

C748

[email protected]/16V_4

C769

[email protected]/16V_4

C757

[email protected]/16V_4

C770

[email protected]/16V_4

C767

[email protected]/16V_4

C772

[email protected]/16V_4

SRXN_A_10048 SRXP_A_10048

+1.2V_10048

SREXT_10048 +3.3V_10048 STXP_A_10048 STXN_A_10048

+3.3V_10048

C

R657 [email protected]/F_4

Close to IC Close to ASM1061

Option; refer to datasheet or contact FAE

NGFF_M.2 SSD (NGF) +3V

+3V_SATA

+3V_SATA

Close SSD CONN

1.5A R650 6/25 Add R580/R581 by Kingston SSD.

CN12

*shortSSD@0_4

SSD_PRESENCE

B

From ASM1061 SRXP_A_10048 SRXN_A_10048

C724 C723

[email protected]/50V_4 [email protected]/50V_4

SATA_RXP_SSD_C SATA_RXN_SSD#_C

STXN_A_10048 STXP_A_10048

C722 C721

[email protected]/50V_4 [email protected]/50V_4

SATA_TXN_SSD#_C SATA_TXP_SSD_C

TP58

RESET_C SSD_PEDET

+3V_SATA

NGFF GND 3.3V GND 3.3V PERn3 NC PERp3 NC GND DAS PETn3 NOTCH/3.3V PETp3/NOTCH NOTCH/3.3V GND/NOTCH NOTCH/3.3V PERn2/NOTCH NOTCH/3.3V PERp2/NOTCH NC GND/CONFIG_0 NC PETn2 NC PETp2 NC GND NC PERn1 NC PERp1 NC GND NC PETn1 NC PETp1 DEVSLP GND NC PERn0/SATA-B+ NC PERp0/SATA-BNC GND NC PETn0/SATA-ANC PETp0/SATA-A+ PERST# GND CLKREQ# REFCLKn PEWake# REFCLKp N/C GND N/C NOTCH NOTCH NOTCH NOTCH NOTCH NOTCH NOTCH NOTCH NC SUSCLK(32KHz) PEDET 3.3V GND 3.3V GND 3.3V GND 76 77

R632 *shortSSD@0_4

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74

C738

C739

*[email protected]/10V_4

*SSD@10u/6.3V_4

C718

C716

C726

C720

C715

SSD@10u/6.3V_4

[email protected]/16V_4

[email protected]/16V_4

[email protected]/16V_4

[email protected]/16V_4

rating = 1000mA @ 128G DAS

TP61 B

Type

pin

Description

+3V_SATA DEVSLP

SSD_PLTRST#

R644 R645

1

*SSD@10K/F_4 SSD@1K/F_4

This pin is grounded on the SSD. May be used by host to determine if slot is empty or populated

PRESENCE

10

DAS#

Device Activity Signal

21

WWAN/SSDIND_N

This pin connect to Ground

TP60 TP63 TP62

38 PCH_SUSCLK

Device Sleep Signal

If system didn't support DEVSLP, set DEVSLP Sleep Signal pin power high and keep (from power on), device will ignore. If system support DEVSLP, set DEVSLP Sleep Signal pin power low (from power on) device, device will support DEVSLP function. Device Sleep Signal H: SSD enter sleep model. Device Sleep Signal L: SSD exit sleep model.

TP59

GND GND

R628

+3V_SATA

*shortSSD@0_8

53

REFCLKN

no connect on SSD

55

REFCLKP

no connect on SSD

56

MFG1

Manufacturing pin. Use determined by vendor. Must be a noconnect on the host board

58

MFG2

Manufacturing pin. Use determined by vendor. Must be a noconnect on the host board

68

SUSCLK

no connect on SSD

69

IFDET

This pin connect to Ground

SSD@SSD_NGFF_CONN_M_KEY

Card pin69 = Ground (SATA card) A

A

Quanta Computer Inc. PROJECT :ZAB Size

Document Number

Rev 1A

M.2 SSD/ASM1061 Date: 5

4

3

2

Friday, March 04, 2016

Sheet 1

23

of

45

5

4

3

2

1

DC-DET circuit(ADO)

Codec(ADO)

+15V to VIN

R742

+5V

24

*short_6

VIN

HP-R2

3 +5V

LINE1-VREFO-L

R752 *1M_6

LINE1-VREFO-R

1

C807 *10u/6.3V_4

PVDD

Q49 *AO3404

2

HP-L2

R750 *100K/F_4

C852

C854 1U/6.3V_4

C856

2.2U/10V_4

ADOGND

INT_AMIC-VREFO C851

10u/6.3V_4

ADOGND

R782

DC-DET

R758

2

*0_4

Q51 *DTC144EU

+5VA

100K/F_4

1

C853

1U/6.3V_4

D

10u/6.3V_4

CODEC_VREF

3

MIC2-VREFO

C858 C855 0.1u/16V_4

D

10u/6.3V_4

+AZA_VDD

DMIC_DAT

C823 10u/6.3V_4

25

26

AVSS1

28

29

30

27 LDO1-CAP

VREF

MIC2-VREFO

31 LINE1-VREFO-L

LINE1-VREFO-R

32

33

HP-OUT-L

AVDD1

LINE1-L

21

LINE1-R

20

R343 analog

*short_6 digital C840

19 18

SLEEVE

17

RING2

+3VPCU

2.2K_4

13

PCBEEP

SENSEA

*short_4

R828

*short_4

HP-L2

R835

62_4

R839

62_4

SLEEVE_R RING2_R

HP_JD#

15 Placement near

R819

RING2

ADOGND

16

14

SLEEVE

HP-R2

10u/6.3V_4

trace width of SLEEVE & RING2 are required at least 40mil and its length should be asshort as possible

Audio Codec

R778

200K/F_4

R775

100K/F_4

LINE1-L

C874

LINE1-VREFO-L

R810

LINE1-VREFO-R

R809

4.7K_4

LINE1-R

C873

4.7U/6.3V_4

R834 *10K/F_4

4.7U/6.3V_4

R838 *10K/F_4

C876

4.7K_4

C883

C885

[27] [27]

HP-L3

[27]

HP-R3

[27]

HP_JD#

[27]

C887

100p/50V_4 100p/50V_4 100p/50V_4 100p/50V_4

ADOGND

HP_JD# +3V

Analog

12

RESETB

22

D-Mic (MIC)

C826

0.1u/16V_4

BEEP_1

C827 100p/50V_4

R759

22K_4

D37

1N4148WS

D36

1N4148WS

+3V

SPKR

+3V

*short_4

[5]

PCBEEP_EC

R768 10K/F_4

A-test only stuff Single MIC * : dual **: DNI

+3V_DMIC R214

1st: AL403010A00/ KMM40301026-18DS 2nd: AL403010000/ KMM40301026-18DZ

1.6Vrms

10u/6.3V_4

*short_4

C822 0.1u/16V_4

2.2K_4

R827 23

Digital

PCBEEP

C

R818

24

C825

+AZA_VDD

*short_6

HP/LINE1 JD SYNC

DGND

MIC2/LIN2 JD

R766

R316

+3V

34

35

SPDIF-OUT

1

49

SPDIFO/FRONT JD

11

48

TP85

PDB

10

0.1u/16V_4

MONO-OUT

PVDD2

DVDD-IO

10u/6.3V_4

SPK-R+

SDATA-IN

47

9

46

MIC2-L/RING2

LDO3-CAP

45

PD# C836

MIC2-R/SLEEVE

SPK-R-

BIT-CLK

R_SPK+ Low is power down amplifier output

C833

MIC-CAP

ALC255-CG

SPK-L-

8

44

NC

SPK-L+

7

R_SPK-

PVDD1

6

43

0.1u/16V_4

LINE1-R

SDATA-OUT

42

L_SPK-

C837

10u/6.3V_4

MIC2-VREFO

LINE2-R

AVDD2

DVSS

41

L_SPK+ C839

ADOGND

LINE2-L

LINE1-L

5

+5V_PVDD

L21 PBY160808T-600Y-N_60_3A_6

PVDD

HEADPHONE/MIC/LINE combo (ADO)

U44

LDO2-CAP

4

40

DC-DET

Digital

39

GPIO1/DMIC-CLK

10u/6.3V_4

GPIO0/DMIC-DATA

C850

Place next to pin 40

Analog

AVSS2

DVDD

38 ADOGND

CBP

3

37

2

ADOGND

DMIC_CLK

C846 0.1u/16V_4

10u/6.3V_4

HP-OUT-R

C843

CBN

CPVDD

+1.5VA

CPVEE

36

Place next to pin 26

+3V_DMIC [33]

C732 C733 C731

10u/6.3V_4 0.1u/16V_4 10p/50V_4

C

+1.5V

C847

33_4

C824

PCH_AZ_CODEC_SDIN0

[5]

PCH_AZ_CODEC_BITCLK

[5]

PCH_AZ_CODEC_SDOUT

[5]

C478

*short_4

DMIC_CLK_L1

3

R659

*short_4

DMIC_DAT_L1

4 7 8

C477

DATA GND GND

VDD LR GND GND

1 2

Left

5 6

Single DMIC DUAL MAIN

0.1u/16V_4 10u/6.3V_4

*22p/50V_4

CLK

KMM40301026-18DS

2 D18

C812 10p/50V_4

R660

DMIC_DAT_L

1 *TVS/6pF_4

ACZ_SDIN R767

APU 1.5V *short_4

DMIC_CLK_L

*10p/50V_4

*0_4 *0_4 *0_4 *0_4 *0_4 *short_4 *1000p/50V_4

DVDD_IO

22_4

R318

[5]

*10p/50V_4

R757

PCH_AZ_CODEC_SYNC

2 D19

DMIC_CLK_L

*short_4

*0_4

C746

R840 R784 R771 R785 R779 R342 C875

R756

R317

C747

Tied at one point only under the codec or near the codec

DMIC_DAT_L

[5]

1 *TVS/6pF_4

U14 PCH_AZ_CODEC_RST#

+3V_DMIC

Place next to pin 9 C743 C742 C744

0.1u/16V_4

ADOGND

**SP17@10u/6.3V_4 **[email protected]/16V_4 **SP17@10p/50V_4 U12

*SP17@0_4

DMIC_CLK_L2

3

R668

*SP17@0_4

DMIC_DAT_L2

4

CO-LAYOUT

2 1 D21 **SP17@TVS/6pF_4

R669

DMIC_DAT_L

2 1 D22 **SP17@TVS/6pF_4 **SP17@10p/50V_4 C751

DMIC_CLK_L

**SP17@10p/50V_4 C752

Cap need near AVDD1 and AVDD2 power source input

7 8

CLK DATA GND GND

VDD LR GND GND

17" Right SP17@: 17" only

1 2 5 6

*SP17@KMM40301026-18DS

DUAL SECOND Stuff when dual MIC

+3V_DMIC C735 C736 C737

B

**SP15@10u/6.3V_4 **[email protected]/16V_4 **SP15@10p/50V_4 U13

DMIC_CLK_L3

3

DMIC_DAT_L

R655

*SP15@0_4

DMIC_DAT_L3

4

Codec PWR 5V(ADO)

Mute(ADO)

+5V

DATA GND GND

VDD LR GND GND

2 5 6

15" Right SP15@: 15" only

*SP15@KMM40301026-18DS

DUAL SECOND Stuff when dual MIC

2

R754 1K/F_4 PD#

HCB2012KF220T60/6A/22ohm_8

CLK

B

+1.5V

ANALOG

L24

7 8

1

Codec PWR 1.5V(ADO)

+AZA_VDD

DIGITAL

2 1 D17 **SP15@TVS/6pF_4

*SP15@0_4

2 1 D20 **SP15@TVS/6pF_4 **SP15@10p/50V_4 C745

R656

**SP15@10p/50V_4 C740

DMIC_CLK_L

D34

3

*RB500V-40

1

PCH_AZ_CODEC_RST# +1.5VA

+5VA U47 3 2 1

A

IN

OUT

R762 *10K/F_4

4

GND SHDN

SET

5

R798

C862

C866

*10U/6.3V_4

*0.1u/16V_4

C820 *1U/6.3V_4

Q50 *PJA138K D33

DIGITAL

RB500V-40

AMP_MUTE#

*29.4K/F_4

L23

+1.5V

[33]

ANALOG BLM15AG121SN1D(120/0.5)_4 A

C861

*G923-330T1UF C867

C863

*0.1u/16V_4

R800 *10K/F_4

*10U/6.3V_4

pin3

Internal Speaker(ADO)

ADOGND R796

close

1U/6.3V_4

*0_4 ADOGND

R_SPK+ R_SPKL_SPKL_SPK+

R817 R816 R815 R814

*short_6 *short_6 *short_6 *short_6

4 ohm : 40mil for each signal

R_SPK+_1 R_SPK-_1 L_SPK-_1 L_SPK+_1

CN22 1 2 3 4

5 6

SPK_CONN_4P C881

C880

C879

C878

1000P/50V_4

1000P/50V_4

1000P/50V_4

1000P/50V_4

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Date:

Friday, March 04, 2016

Place these EMI components next to codec 5

4

3

Codec(AL255) / HP / SPK / DMIC 2

Sheet 1

24

of

45

Rev 1A

5

4

3

2

1

25

G-sensor (H3D) R769

*shortGS@0_6

+3V

+G_SEN_PW D

C810

C828

[email protected]/16V_4

D

U42 1 14

GS@10U/6.3V_4

Vdd_IO VDD

NC NC

2 3

C821 GS@22P/50V_4 D35 D31

[5] ACCEL_INTA [26] ACCEL_INT2 [5,9,10,20] [5,9,10,20]

R739 R738 R747

CLK_SDATA CLK_SCLK

ACCEL_INTA_R ACCEL_INT2_R

GS@RB500V-40 *GS@RB500V-40

PU on CPU side

*shortGS@0_4 *shortGS@0_4 G_MBDATA_R *shortGS@0_4 G_MBCLK_R

7 6 4 8

+G_SEN_PW CLK_SDATA

11 9

C806

RESERVED RESERVED

INT1 INT2 SA0 SDA SCL

GND GND GND GND

CS

10 15

5 12 13 16

GS@33P/50V_4 GS@LIS3DHTR

CLK_SCLK

C808

GS@33P/50V_4

C

C

+G_SEN_PW

R737 R749

G_MBDATA_R G_MBCLK_R

*[email protected]_4 *[email protected]_4

TPM (TPM)

+TPM_VDD

B

CLKRUN#: PU 8.2 K on EC side

R712

[6,33] CLKRUN# [5,22,33]

R729 R730

D27

PLTRST#

15 18 21 24 20 27 *shortTPM@0_4 SERIRQ_R *shortTPM@0_4 PCLK_TPM_R 19 LPC_CLKRUN#_D 13 *shortTPM@0_4 PLTRST#_R 17 LPCPD#_R 28

TPM@RB500V-40

26 31

VDD3 VDD2 VDD1 NC7 NC8

D24

[6] LPCPD# R728 SP@10K/F_4

A

33

R727 *10K/F_4

+TPM_VSB

1

DECOUPLING CAPACITORS NOTE: Place 0.1 uF capacitors as close as possible to the device power pins. +3V_S5 PP GPX/GPIO2 GPIO1

GPIO0/XOR_OUT GPIO3/BADD TEST

CLKRUN/GPIO04 LRESET/SPI_RST LPCPD

B.M.

+3V

LAD3 LAD2/SPI_IRQ LAD1/MOSI LAD0/MISO LFRAME/SCS SERIRQ LCLK/SCLK

GND1 GND2 GND3 GND4

[6,22,33] LPC_LAD3 [6,22,33] LPC_LAD2 [6,22,33] LPC_LAD1 [6,22,33] LPC_LAD0 [6,22,33] LPC_LFRAME# [6,33] SERIRQ [6] PCLK_TPM

R714 *TPM@10K/F_4

9 16 23 32

SERIRQ: PU 10k on EC side (reserved)

*shortTPM@0_4

VSB

U41

22 14 8

R700

NC1 NC2 NC3 NC4 NC5 NC6

4 3 30 29 6 5

TP73

+TPM_VSB

R696

TP71 TP70 TP72

*shortTPM@0_4 B

C785 TPM@10U/6.3V_4 R695

*TPM@10K/F_4 +3V

2 7 10 11 12 25

C787 [email protected]/16V_4

+TPM_VDD R694

[email protected]/F_6 C783 TPM@10U/6.3V_4

C800 [email protected]/16V_4

C784 [email protected]/16V_4

C797 [email protected]/16V_4

TPM@NPCT650ABAYX_QFN32

TPM@RB500V-40 This module is LPC interface IF SPI interface , reset need link PCIERST#

A

w/o TPM: Stuff with TPM: DNI

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

TPM (NPCT650) Date: 5

4

3

2

Thursday, March 03, 2016

Sheet 1

25

of

45

5

4

3

2

1

SATA HDD (HDD) SATA REDRIVER (HDD) +601_VCC +3V

+601_VCC

R711

D

R706 R707 R709

*[email protected]_4 *[email protected]_4 *[email protected]_4

EQ2 EQ1 DEW1

R705 R708 R710

*[email protected]_4 *[email protected]_4 *[email protected]_4

R682 R681 R683

*[email protected]_4 *[email protected]_4 *[email protected]_4

DE1 DE2 DEW2

R677 R676 R686

*[email protected]_4 *[email protected]_4 *[email protected]_4

R680

*[email protected]_4

EN

R675

[email protected]_4

*SRD@0_4 C789

C778

C780

C790

C407

SRD@10U/6.3V_4

SRD@1U/6.3V_4

SRD@1U/6.3V_4

[email protected]/10V_4

[email protected]/10V_4

26

EQ2 H - 14dB X - 0dB L - 7dB

DE1 H - -2dB X - -4dB L - 0dB

EQ1 H - 14dB X - 0dB L - 7dB

DE2 H - -2dB X - -4dB L - 0dB

DEW1 H - Long Duration X - NC (Long) L - Short Duration

DEW2 H - Long Duration X - NC (Long) L - Short Duration

D

EQ1 DEW1

EQ2

SW7 - EN H - Enabled L - Standby Mode

U39

[6] SATA_TXN0 [6] SATA_TXP0 [6] SATA_RXP0 [6] SATA_RXN0

C788 C786

*[email protected]/50V_4 *[email protected]/50V_4

SATA_TXN0C SATA_TXP0C

C782 C781

*[email protected]/50V_4 *[email protected]/50V_4

SATA_RXP0C SATA_RXN0C

1 2 3 4 5 6 7 8 9 10

DEW2 EN DE2 DE1 +601_VCC

C

RX1P RX1N GND TX2N TX2P

VCC EQ2 GND EQ1 DEW1

20 19 18 17 16

+601_VCC

PPAD TX1P TX1N GND RX2N RX2P

DEW2 EN DE2 DE1 VCC

GND GND GND GND GND

21 15 14 13 12 11

SATA_TXN0_PS SATA_TXP0_PS

R701 R697

*SRD@0_4 *SRD@0_4

SATA_TXN0_PS_R SATA_TXP0_PS_R

SATA_RXP0_PS SATA_RXN0_PS

R691 R688

*SRD@0_4 *SRD@0_4

SATA_RXP0_PS_R SATA_RXN0_PS_R

CN15 23

22 23 24 25 26

SATA_TXP0_PS_R SATA_TXN0_PS_R

0.01u/50V_4 0.01u/50V_4

C835 C832

SATA_TXP0_C SATA_TXN0_C

SATA_RXN0_PS_R SATA_RXP0_PS_R

0.01u/50V_4 0.01u/50V_4

C831 C829

SATA_RXN0_C SATA_RXP0_C

*SRD@SN75LVCP601RTJR

R735

[6] DEVSLP_HDD

+5V

*0_4

+5V_HDD

*short_8 C796

+ C791 4.7U/6.3V_4

*100u/6.3V_3528

C798 *0.1u/16V_4

Co-Layout

C792 *0.1u/16V_4

C793 0.01u/50V_4

R704

[25] ACCEL_INT2

GND1 RXP RXN GND2 TXN TXP GND3

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

60mil R715

GND23

1 2 3 4 5 6 7

C799 0.01u/50V_4

C

3.3V 3.3V 3.3V GND GND GND 5V 5V 5V GND RSVD GND 12V 12V 12V

*0_4 24

GND24 HDD_CONN(on-board)

SATA_TXP0 SATA_TXN0

R699 R703

SATA_RXN0 SATA_RXP0

R690 R693

*short_4 *short_4

SATA_TXP0_R SATA_TXN0_R

R698 R702

*short_4 *short_4

SATA_TXP0_PS_R SATA_TXN0_PS_R

*short_4 *short_4

SATA_RXN0_R SATA_RXP0_R

R689 R692

*short_4 *short_4

SATA_RXN0_PS_R SATA_RXP0_PS_R

B

B

SATA ODD (ODD)

IOAC power +15V to VIN

CN11

+3VPCU

VIN

1

+5V

C272

0.01u/50V_4

*0.1u/16V_4

ODD_PLUGIN# +3V C321 *0.1u/16V_4

C317 10U/6.3V_4

C690

*short_8

[33] ODD_POWER

R206

IOAC@0_4

[5] PCH_ODD_EN

R205

*IOAC@0_4

ODD_EN

R637

R192 IOAC@22_8

3 ODD_EN_Q

2

C323

R207 *IOAC@100K/F_4

*100u/6.3V_3528

NAC@0_8

Q10 IOAC@2N7002K

[email protected]/16V_4 Q13 IOAC@2N7002DW

[33]

10K/F_4 +3V

1

EC_ODD_EJ#

1

IOAC@100K/F_4

[5]

R190

15

ODD_CONN

R208

3

2

+5V_ODD

180P/50V_4

C273

0.01u/50V_4

ODD_EN_Q

+5V

R196

1

C320

C702 33_4 10K/F_4

SATA_RXN1 [6] SATA_RXP1 [6]

6

R630 R631

SATA_DP +5V_ODD_R

8 9 10 11 12 13

SATA_TXP1 [6] SATA_TXN1 [6]

4 Q12 IOAC@AO6402A

2

0.01u/50V_4 0.01u/50V_4

2

C710 C707

3

SATA_RXN1_C SATA_RXP1_C

+5V_ODD 6 5 2 1

R211 IOAC@100K/F_4

5

0.01u/50V_4 0.01u/50V_4

1

C712 C711

4

GND15

SATA_TXP1_C SATA_TXN1_C

2

DP +5V +5V RSVD GND GND

1 2 3 4 5 6 7

MOD_EN_5V

GND1 RXP RXN GND2 TXN TXP GND3

+

GND14

14

A

A

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

HDD/REDRIVER/ODD Date: 5

4

3

2

Friday, March 04, 2016

Sheet 1

26

of

45

5

4

3

2

1

USB Charger to 3.0 (UBC) +USBPWR0

U21

C499 1U/6.3V_4

9 13 4 5

[33] USB_CTL1

R328 R327

+5VPCU

100K/F_4 10K/F_4 10K/F_4

CTL2 CTL3

6 7 8

EN

(RILIM_LO 1.2A)

17

GND_PAD FAULT ILIM_SEL

ILIM_LO ILIM_HI

(RILIM_HI 2.3A)

STATUS

CTL1

C510 100u/6.3V_1206

R355 39K/F_4

R356 20K/F_4

C497 470P/50V_4

C511 0.1u/16V_4

14

GND

11 10

DM_IN DP_IN

USBP5-_C USBP5+_C

2 3

USBP5-_C

10 9

C

[6] USB30_RX1+

*[email protected]/10V_4

USB3_RXP1_C

8

C495

*[email protected]/10V_4

USB3_RXN1_C

7

USB30_RX1+_R

TP96

USB30_TX1-_R USB30_TX1+_R

TP100

+USB_RE_PWR

1

1

1

0

1

1

X

TP90 TP91 USBP5-_C USBP5+_C

TP93

with charger

TP92 +USBPWR0

U20

C1 AOUT+

AIN-

AOUT-

GND

VDD(1V8)

BOUT+

BIN+

BOUT-

BIN-

1

USB3_TXP1_RE_C

C484

USB30_TX1+_C

*[email protected]/16V_4

C501

2

USB3_TXN1_RE_C

C489

*1.6P/50V_4

R358

USB30_RX1-_C USB30_RX1+_C

3 4

USB3_RXP1_RE

R341

*URD@0_4

USB30_RX1+_C

5

USB3_RXN1_RE

R350

*URD@0_4

USB30_RX1-_C

C498

USB30_RX1-_R USB30_RX1+_R

*1.6P/50V_4

R357

*short_4

URD@PTN36001

C490

R347

*short_4

36001_C2

USB30_TX1-_C USB30_TX1+_C

R334 R332

*short_4 *short_4

USB3_TXN1_NRD USB3_TXP1_NRD

C488 C483

0.1U/16V/X7R_4 0.1U/16V/X7R_4

USB30_TX1-_C USB30_TX1+_C

USB30_RX1USB30_RX1+

R346 R337

*short_4 *short_4

USB3_RXN1_NRD USB3_RXP1_NRD

R349 R340

*short_4 *short_4

USB30_RX1-_C USB30_RX1+_C

Co layout

*short_4

C514 *1.6P/50V_4

2 C513 0.1u/16V_4 USBP5+_C USB30_RX1-_R

3 4 5

I/O 1 I/O 6 VDD GND_2 NC_1 NC_2 I/O 2 I/O 5 I/O 3 I/O 4

10

USB30_TX1+_R

9 8

C

7

USBP5-_C

6

USB30_RX1+_R

USB protection diodes for ESD. as close as possible to USB connector pins.

C512 *1.6P/50V_4

*short_4 USBP6-_R USBP6+_R

+USB_RE_PWR

R331 36001_C1

R326

36001_C2

+USBPWR1 CN16 USB3.0_CONN

C492 R352

+USBPWR1

*short_4

*URD@10K/F_4 R335

1 2 3 4 5 6 7 8 9

*short_4

*1.6P/50V_4

*URD@10K/F_4 USB30_RX2-_R USB30_RX2+_R

[6] USB30_RX2[6] USB30_RX2+

fine tune re-driver setting

B

U22

1

Co layout R324

*URD@10K/F_4

USB30_TX1-_R

USB30_TX1-_R USB30_TX1+_R

[6] USBP6[6] USBP6+

R353

VBUS DD+ GND SSRXSSRX+ GND SSTXSSTX+

USB30_ESD_AZ1065-06F.R7G

USB30_TX1USB30_TX1+

*URD@10K/F_4

1 2 3 4 5 6 7 8 9

[email protected]/10V_4

R339

R325

1 2 3 4 5 6 7 8 9

*short_4

USB30_TX1-_C

*[email protected]/16V_4

+USBPWR0

CN19 USB3.0_CONN

12/25 Add for ESD

AIN+

6

[6] USB30_RX1-

C493

1

DCP

TP101

USB30_RX1-_R

TP98

12 36001_C1 USB3_TXN1_C

*[email protected]/10V_4

11

CDP

13 12 11 10

C491

[6] USB30_TX1-

USB3_TXP1_C

*[email protected]/10V_4

0

USB 3.0 Connector (UB3)

TP99

USBP5+_C

TP97

2015-11-16_Change to NXP

C2

C486

[6] USB30_TX1+

1

RILIM_LO is optional and the ILIM_LO pin may be left unconnected if the following conditions are met: 1. ILIM_SEL is always set high 2. Load Detection - Port Power Management is not used 3. Mouse / Keyboard wake function is not used If conditions 1 and 2 are met but the mouse / keyboard wake function is also desired, it is recommended to use RILIM_LO < 80.6 kΩ. The following equation programs the typical current limit: (1) IOS_typ(mA) = 50,250/{RILIM_XX(KΩ)+0.1} RILIM_XX corresponds to either RILIM_HI or RILIM_LO as appropriate.

TP94

+USB_RE_PWR

1

USBP5- [6] USBP5+ [6]

TP95

*URD@0_6

27

ILIM_SEL

1

D

CTL1 CTL2 DM_OUT CTL3 DP_OUT SLGC55544VTR

USB 3.0 redriver (UB3)

R338

CTL3

SDP

iPAD charging current is about 2.1A so set on 2.3A 1.2A current limit of USB 3.0 SDP mode

GMT:AL003703000(G3703)_X TI:AL002544001(TPS2544) Silergy:AL055544000(SLGC55544VTR)

VDD_18_S5

CTL2

80 mils (Iout=2A)

C487

*1.6P/50V_4 *short_4

VBUS DD+ GND SSRXSSRX+ GND SSTXSSTX+

U19 USB30_TX2-_R

1 2 3

C485 0.1u/16V_4 USBP6-_R

4

USB30_RX2-_R

5

I/O 6 VDD GND_2 NC_1 NC_2 I/O 2 I/O 5 I/O 3 I/O 4

*short_4

10

USB30_TX2+_R

9 8 7

USBP6+_R

6

USB30_RX2+_R

B

11

R323

I/O 1

13 12 11 10

13 12 11 10

R333

1 2 3 4 5 6 7 8 9

GND_1

D

R329

15 16

ILIM_LO ILIM_HI

[5] USB_OC1# [33] USB_BC_ON

[33] USB_CHARGE_ON

12

OUT

GND_1

IN

11

1

+

80 mils (Iout=2A)

13 12 11 10

+5VPCU

USB30_ESD_AZ1065-06F.R7G [6] USB30_TX2[6] USB30_TX2+

C475 C471

0.1U/16V_4 0.1U/16V_4

USB30_TX2-_C USB30_TX2+_C

USB30_TX2-_R USB30_TX2+_R

R321

*short_4

C480 *1.6P/50V_4

USB protection diodes for ESD. as close as possible to USB connector pins.

C472 *1.6P/50V_4

TP107 +5V_S5

TP106 TP109

C460 1u/6.3V_4

DB USB2.0 (UB2)

5 +USBPWR3

Enable: Low Active /2.5A GMT: AL000524007 EMS: AL005203001 BCD: AL002822000

+5V_S5

1u/6.3V_4 C849

IN

OUT

A

GND USBON#

[6] USBP1+ [6] USBP1-

+USBPWR3

U45

5

4

/EN /OC G524B2T11U

1 2 3

[6] USBP0+ [6] USBP0-

C857 C868 470P/50V_4

C848 0.1u/16V_4

C864 10U/6.3V_4

*100U/6.3V_1206

[24]

HP_JD#

[24] SLEEVE_R

[5] USB_OC3# [24] RING2_R

[24] HP-L3 [24] HP-R3

IN

CN18

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

+USBPWR1

U18

OUT GND

[33] USBON#

USBON#

4

/EN

/OC

1

Close to CONN

TP110 TP112

2 3

TP108

C468 C470 470P/50V_4 0.1u/16V_4

USBP6-_R USBP6+_R USB30_RX2-_R USB30_RX2+_R USB30_TX2-_R USB30_TX2+_R

TP111 TP113 TP102 TP103 TP105 TP104

C461 100U/6.3V_1206 12/25

Add for ESD

G524B2T11U [5] USB_OC2#

Enable: Low Active /2.5A GMT:AL000524007 EMS:AL005203001 BCD:AL002822000 A

27 28

Quanta Computer Inc. PROJECT : ZAB

DB_CONN ADOGND

Size

Document Number

Rev 1A

USB3/CHARGER Date: 5

4

3

2

Friday, March 04, 2016

Sheet 1

27

of

45

5

4

3

2

1

28

USB Type C (UTC)

USB 3.0 redriver

Close to connector *CRD@0_6

[6] USB30_TX3-

C664

*[email protected]/16V_4

USB3_TXP3_C

11

C657

*[email protected]/16V_4

USB3_TXN3_C

10 9

[6] USB30_RX3+

*[email protected]/16V_4

USB3_RXP3_C

8

C650

*[email protected]/16V_4

USB3_RXN3_C

7

AIN+

AOUT-

GND

VDD(1V8)

BOUT+

BIN+

BOUT-

C645

[email protected]/16V_4

AOUT+

AIN-

BIN-

R549

*CRD@0_4

2

USB3_TXN3_RE_C

R539

*CRD@0_4

USB3_TXN3_RE_C2

USB3_RXP3_RE_C

R514

*CRD@0_4

USB3_RXP3_RE_C2

USB3_RXN3_RE_C

R492

*CRD@0_4

USB3_RXN3_RE_C2

C662

R187

*shortTYP_C@0_4

USB2_TYPC_7P_C USB2_TYPC_7N_C

[email protected]/16V_4

D

C651

[email protected]/16V_4

[email protected]/16V_4

Type C1_HSIO_ ESD

USB3_TXP3_RE_C2

USB3_TXP3_B0+

USB3_TXP3_B0+_C [email protected]/16V_4

R168

*shortTYP_C@0_4

USB3_TXP3_B0+_R

C229

C222

USB3_TXN3_B0-_C [email protected]/16V_4

3 4 5

CRD@PTN36001

36001_CC2

6

[6] USB30_RX3-

C654

U29 USB3_TXP3_RE_C

*shortTYP_C@0_4

[6] USBP7+ [6] USBP7-

*shortTYP_C@0_6 C667

1

R179

+MUX_PWR R180

+USB_RE_PWR_C

C1

D

[6] USB30_TX3+

+3V_S5

12 36001_CC1

R157

USB2.0 ESD

Type-C MUX

+USB_RE_PWR_C

C2

VDD_18_S5

+MUX_PWR U8

1 6 10

C655 +MUX_PWR

[email protected]/16V_4

R175 TYP_C@10K/F_4

R174

USB3_TXP3_RE_C2 USB3_TXN3_RE_C2

3 4

USB3_RXP3_RE_C2 USB3_RXN3_RE_C2

7 8

*shortCRD@0_4 *shortCRD@0_4

USB3_TXN3_NRD USB3_TXP3_NRD

R538 R548

*shortCRD@0_4 *shortCRD@0_4

USB3_TXN3_RE_C2 USB3_TXP3_RE_C2

USB30_RX3USB30_RX3+

R510 R521

*shortCRD@0_4 *shortCRD@0_4

USB3_RXN3_NRD USB3_RXP3_NRD

R491 R513

*shortCRD@0_4 *shortCRD@0_4

USB3_RXN3_RE_C2 USB3_RXP3_RE_C2

25810_POL# R137 25810_EN

2

*shortTYP_C@0_4CBTL02043A_SEL 9

From CC Ctrl

C0_P C0_N

A1_P A1_N

C1_P C1_N

XSD

VSS05 VSS11 VSS20

SEL

TAB

19 18

USB3_TXP3_B0+ USB3_TXN3_B0-

USB3_TXN3_B0-

R165

*shortTYP_C@0_4

USB3_TXN3_B0-_R

17 16

USB3_RXP3_B1+ USB3_RXN3_B1-

USB3_RXP3_B1+

R534

*shortTYP_C@0_4

USB3_RXP3_B1+_R

15 14

USB3_TXP3_C0+ USB3_TXN3_C0-

13 12

USB3_RXP3_C1+ USB3_RXN3_C1USB3_RXN3_B1-

R520

*shortTYP_C@0_4

USB3_RXN3_B1-_R

5 11 20 USB3_TXP3_C0+

21

USB3_TXP3_C0+_C [email protected]/16V_4

R153

*shortTYP_C@0_4

USB3_TXP3_C0+_R

C214

C207

USB3_TXN3_C0-_C [email protected]/16V_4

TYP_C@CBTL02043ABQ

Q8 TYP_C@2N7002K

Co layout

CBTL02043ABQ_SEL

1

Co layout

A0_P A0_N

3

R535 R546

2

B0_P B0_N B1_P B1_N

*TYP_C@0_4 CBTL02043A_XSD

USB30_TX3USB30_TX3+

VDD01 VDD06 VDD10

+USB_RE_PWR_C

Low

Port A to Port B

Hi

Port A to Port C

USB3_TXN3_C0-

CBTL02043ABQ_XSD: Active-low chip enable L: Normal operation H: Shutdown

R147

*shortTYP_C@0_4

USB3_TXN3_C0-_R

USB3_RXP3_C1+

R511

*shortTYP_C@0_4

USB3_RXP3_C1+_R

USB3_RXN3_C1-

R494

*shortTYP_C@0_4

USB3_RXN3_C1-_R

C

C

R171

R138

36001_CC1

*CRD@10K/F_4

36001_CC2

*CRD@10K/F_4

R172

*CRD@10K/F_4

R139

*CRD@10K/F_4

fine tune re-driver setting

+TYPEC_VBUS

+CC_PWR *shortTYP_C@0_8 *shortTYP_C@0_8

Type-C CC

[email protected]/25V_4

C237 [email protected]/25V_4 D2 TYP_C@TVS-AZ5725-01F_4

1

R194 R195

CN9

A1

Vendor suggest input cap 120u

Q9 TYP_C@AON7401

+TYPEC_VBUS_C

+CC_PWR C713

TYP_C@150U/6.3V_3528

+TYPEC_VBUS_C TYP_C@TPS25810RVCR(QFN)

U11

1 2 3

5

C208

[33] EC_TypeC_CHG_HI

R176

*shortTYP_C@0_4 25810_EN

6

TYPEC_CHG *shortTYP_C@0_4TYPEC_CHG_HI

7 8

25810_REF R186

10

TYP_C@100K/F_4 25810_REF_RTN 9 12

EN

TPS25810RVC

CHG CHG_HI REF REF_RTN GND

CC1 CC2

FAULT# LD_DET# UFP# POL# AUDIO# DEBUG# PwPd

11 13

25810_CC1 25810_CC2

1 20 19 18 17 16

25810_FAULT# 25810_LD_DET# 25810_UFP# 25810_POL# 25810_AUO# 25810_DBG#

R209 TYP_C@10K/F_4 R203

*shortTYP_C@0_4

R199

*shortTYP_C@0_4

A3

+TYPEC_VBUS

A4

25810_CC1

A5

USB2_TYPC_7P_C

A6

USB2_TYPC_7N_C

A7

+5V_S5

TYP_C@10U/6.3V_4

4

C257

CC_OC#

25810_UFP#_G2 R191

TYP_C@100K/F_4

3

R185

TI

15 14

USB3_TXN3_C0-_R

[5]

Q11

APU_TypeC_UFP# 25810_POL# [33]

TYPEC_SBU1

TP13 C223

A8

+TYPEC_VBUS

A9

USB3_RXN3_B1-_R

A10

USB3_RXP3_B1+_R

A11

[email protected]/25V_6

25810_UFP#_G1 2

[5]

TYP_C@2N7002K

21

Q40 25810_UFP#

R189 C261 TYP_C@10K/F_4 [email protected]/25V_4

1

[33] EC_TypeC_EN

OUT OUT

3

B

IN1 IN1 IN2 VAUX

GND GND GND GND GND GND

2 3 4 5

TYP_C@10U/6.3V_4 TYP_C@10U/6.3V_4

A2

[email protected]/25V_6

+ C264 C263

USB3_TXP3_C0+_R +TYPEC_VBUS

A12

2

GND

GND

TX1+

RX1+

TX1-

RX1-

VBUS

VBUS

CC1

SBU2

D+

D-

D-

D+

SBU1

CC2

VBUS

VBUS

RX2-

TX2-

RX2+

TX2+

GND

GND

B12 B11 B10 B9

USB3_RXP3_C1+_R USB3_RXN3_C1-_R +TYPEC_VBUS

C658

B8

TYPEC_SBU2

B7

USB2_TYPC_7N_C

B6

USB2_TYPC_7P_C

B5

25810_CC2

B4

+TYPEC_VBUS

[email protected]/25V_6 TP14

C652

B3

USB3_TXN3_B0-_R

B2

USB3_TXP3_B0+_R

B

[email protected]/25V_6

B1

TYP_C@USB_Type_C_CONN

1

22 23 24 25 26 27

1 2 3 4

TYP_C@2N7002K

G1 G2 G3 G4

2

C666 +5V_S5

U9 USB3_TXP3_B0+_R USB3_RXP3_B1+_R +3V_S5

25810_FAULT# 25810_UFP# 25810_EN

R202 R200 R580

1 2 3

USB3_TXP3_C0+_R USB3_RXP3_C1+_R

TYP_C@10K/F_4 TYP_C@10K/F_4 *TYP_C@10K/F_4

4 5

A

R197 R193

TYP_C@10K/F_4 TYP_C@10K/F_4

R201 R624

*TYP_C@0_4 25810_LD_DET# *TYP_C@0_4 25810_POL#

R625 R198

TYP_C@10K/F_4 TYP_C@10K/F_4

R184 R183

*TYP_C@0_4 TYPEC_CHG *TYP_C@0_4 TYPEC_CHG_HI

R579 R574

TYP_C@10K/F_4 *TYP_C@10K/F_4

9 8

USB3_TXN3_B0-_R USB3_RXN3_B1-_R

USB2_TYPC_7P_C

1 2 3

GND LINE-6 LINE-5 LINE-8 LINE-7

7 6

TYP_C@AZ1043-08F

Test Only 25810_AUO# 25810_DBG#

U10

LINE-1 LINE-2 LINE-3 LINE-4

USB3_TXN3_C0-_R USB3_RXN3_C1-_R

TYPEC_SBU1 25810_CC1

4 5

LINE-1 LINE-2 LINE-3 LINE-4

9 8

USB2_TYPC_7N_C

7 6

TYPEC_SBU2 25810_CC2

GND LINE-6 LINE-5 LINE-8 LINE-7

TYP_C@AZ1045-08F

Quanta P/NAMAZING P/NUSD保保保保 BC104308Z00, AZ1043-08F.R7G0.08TX RX ( USB3.0 GEN1 5G ) BC104508Z00, AZ1045-08F.R7G0.08D+ D- SBU1 SBU2 CC1 CC2 BC005725Z00, AZ5725-01F.R7G0.009 PD 5V ( follow ZAA) A

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

USB Type-C Date: 5

4

3

2

Saturday, March 05, 2016 1

Sheet

28

of

45

5

4

3

2

1

29

Stich cap

LED(UIF)

+5V

R822

*1M/F_4

+3VPCU

R826

*1M/F_4

+3V

R813

*1M/F_4

+3VPCU

D

C844 0.1u/16V_4

2

C494 0.1u/16V_4

C18 0.1u/16V_4

C764 0.1u/16V_4

C423 0.1u/16V_4

C466 0.1u/16V_4

R812

124/F_4

1

D45 *MLVS0402K11

VIN

C438 0.1u/16V_4

VIN

C41 0.1u/25V_4

LED1

Amber

2

+3VPCU

3

1

47/F_4

1

R821

2

C463 0.1u/16V_4

D

Blue

[33] SUSLED#

C335 0.1u/16V_4

+1.2VSUS

+3VPCU

Power LED [33] PWRLED#

+3VPCU

C473 0.1u/25V_4

C416 0.1u/16V_4

C340 0.1u/16V_4

C500 0.1u/16V_4

C842 0.1u/16V_4

C358 0.1u/25V_4

+3VPCU

D44 *MLVS0402K11

+5V

+5V

C884 39P/50V_4

for ESD C

R831

*1M/F_4

R825

*1M/F_4

+3VPCU C

SPAD11 *SPAD-RE157X1282NP

SPAD8 *SPAD-RE157X491NP

1

SPAD13 *SPAD-C197NP

1

LED2

SPAD5 *SPAD-C298NP

SPAD4 *SPAD-C298NP

SPAD2 *SPAD-RE531X205NP

1

1

1

1

SPAD9 *SPAD-RE157X315NP

SPAD14 *O-ZAB-1

1

SPAD10 *SPAD-C276NP

1

SPAD12 *SPAD-RE157X1267NP

1

2

2

D46 *MLVS0402K11

HOLE(OTH)

1

1

1 HOLE3 *H-ZAB-5

B

HOLE4 *H-ZAB-2

HOLE25 *H-C217D217N

1

HOLE1 *O-ZAB-2

HOLE12 *O-ZAA-1

6 5 4

A

Quanta Computer Inc.

1

1 2 3

HOLE10 *H-O146X87D146X87N

1

HOLE6 *H-C87D87N

1

HOLE2 *HG-TC354IC236BC236D118P2 7 6 8 5 9 4

HOLE23 *H-C236D161P2

1

HOLE20 *H-C236D161P2

1

HOLE22 *H-C236D161P2

1

1

1 HOLE17 *HG-C354D134P2 7 6 8 5 9 4

1 2 3

HOLE15 *HG-C354D134P2 7 6 8 5 9 4

1 2 3

HOLE7 *HG-C354D134P2 7 6 8 5 9 4

1 2 3

HOLE16 *HG-C354D134P2 7 6 8 5 9 4

1

H-C256D161P2 H-C256D161P2 H-C256D161P2 HOLE8 HOLE9 HOLE11 SSD@MBZAA001010 SSD@MBZAA001010 SSD@MBZAA001010

1

H-C236I180D140P2 HOLE19 EV@MBZRQ001010

1 2 3

HOLE14 *HG-C315D134P2 7 6 8 5 9 4

1 2 3

1 2 3

HOLE13 *HG-C315D134P2 7 6 8 5 9 4

H-C236I180D140P2 HOLE21 EV@MBZRQ001010

1

1

H-TC217IC197BC197D126P2 HOLE18 WLAN_MBZAA002010

HOLE5 *H-ZAB-6

Layout set on BOT

1 2 3

Layout set on Bottom

A

SPAD7 *SPAD-RE157X488NP

3

Amber

D47 *MLVS0402K11

B

SPAD6 *SPAD-ZAB-3NP

1

1

SPAD1 *SPAD-ZAB-2NP

1

124/F_4

SPAD3 *SPAD-ZAB-1NP

1

R829

1

[33] BATLED1#

2

1

[33] BATLED0#

47/F_4

1

Blue R830

1

+3VPCU

Battery

PROJECT :ZAB Size

Document Number

Rev 1A

LED/HOLE/EMI Date: 5

4

3

2

Tuesday, February 16, 2016

Sheet 1

29

of

45

5

4

3

2

1

30

TOUCH PAD(TPD)

TP_PWR D

D

VDD_18 +3V

+3V

TP_PWR R832 2.2K_4

Q55 4

[5] I2C_SCL_TP 1

[5] APU_I2C_INT#

I2C_SCL_TP_R

3

I2C_INT#_TP

3

2

1.8V_S0 Q56 2N7002K *0_4

R811 2.2K_4

5

R824 10K/F_4

2

R836 10K/F_4

1

[5] I2C_SDA_TP

+3V_S5 I2C_SDA_TP_R

6

R833 PJT138K

R823 C

*0_4

TP_PWR

Q57 +3V_S5

R820

1

*short_4

C

3 +3V

*0.1u/16V_4

TP_PWR

VIN

TP_PWR

AO3413 C882 0.22u/10V_4

2

C877

C870 0.1u/16V_4

R837

R777 *1M_6

R772 *10K/F_4

[33] PTP_PWR_EN#

R783 *22_8

[33] TPCLK [33] TPDATA

C871 10p/50V_4

I2C_SDA_TP_R R807 I2C_SCL_TP_R R808 I2C_INT#_TP R805

C872

*short_4 *short_4 *short_4

CLK_SDATA_R CLK_SCLK_R

10p/50V_4

B

3

CN20 TPCLK_CN TPDATA_CN

*short_4 *short_4

8 7 6 5 4 3 2 1

PTP_PWR_EN#

2

Q53 *DTC144EU

2

2

Q52 *DTC144EU

R781 *1M_6

Q54 *2N7002K 1

R801 R802

C886 *1000p/50V_4

1

10K/F_4

3

10K/F_4

1

R792

3

10K/F_4 R793

9 10 B

[33] TPD_INT# [33] TPD_EN

TP_CONN

20160205_EMI

A

A

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

Touch Pad Date: 5

4

3

2

Thursday, March 03, 2016

Sheet 1

30

of

45

5

4

3

2

KEYBOARD (KBC)

C

MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 MY17 MY16 MY15 MY14 MY13 MY12 MY11 MY10 MY9 MY8 MY7 MY6 MY5 MY4 MY3 MY2 MY1 MY0

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 MY17 MY16 MY15 MY14 MY13 MY12 MY11 MY10 MY9 MY8 MY7 MY6 MY5 MY4 MY3 MY2 MY1 MY0

NBSWON#_R

R791

[33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33] [33]

33_4

NBSWON# [33]

29 30

D43 *AZ5725-01F_4

MX4 MX5 MX6 MX7 MY3 MY2 MY1 MY0 MY7 MY6 MY5 MY4 MY11 MY10 MY9 MY8 MX0 MX1 MX2 MX3 MY15 MY14 MY13 MY12

C893 C894 C895 C896 C897 C898 C899 C900 C901 C902 C903 C904 C905 C906 C907 C908 C909 C910 C911 C912 C913 C914 C915 C916

*220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4

2015-12-07_ B changes from PWM to DAC D

+3V +5V

20160205_EMI C929 1000P/50V_4

R841 10K/F_4

C892 0.01u/50V_4 C890

[33] FAN1_RPM

2.2U/10V_4

U48 2

[4] THERM_ALERT#

R842

1 *short_4 4

[33] FAN1_DAC

VIN

VO GND /FON GND GND VSET GND

3 5 6 7 8

CN8

30mils

TH_FAN_POWER

1 2 3

C891

C889

2.2U/10V_4

0.01u/50V_4

4 5

FAN_3P

APL5606AKI

FANPWR = 1.6*VSET C

SP15@KB_CONN

2

SP17@KB_CONN

C865 180P/50V_4

MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 MY17 MY16 MY15 MY14 MY13 MY12 MY11 MY10 MY9 MY8 MY7 MY6 MY5 MY4 MY3 MY2 MY1 MY0 NBSWON#_R

29 30

1

D

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

31

CPU FAN CTRL(THM)

CN23 CN17

1

SP15@ 15" Only

SP17@ 17" Only

+3VPCU +3V_LDO_EC

RP5

R773 reserve switch 10K/F_4(MP remove)

10 9 8 7 6

1 2 3 4 5

MX0 MX1 MX2 MX3

*10K_10P8R

6

5

C834 0.1u/16V_4

for test

SW3 *POWER_SW 3 4

1 2

NBSWON#

MX7 MX6 MX5 MX4

B

B

KB_BL LED (KBL) +5V

+5V *[email protected]/16V_6

1

C595 R466 KBL@10K/F_4

Q32 KBL@AO3413

2

3

3

CN4

Q35 KBL@DTC144EU

1

2

[33] KB_BL_LED A

20mil +5V_KB

R427

C578

C579

[email protected]/6.3V_4

20mil

*shortKBL@0_4

[email protected]/50V_4

+5V_KB_R

1 2 3 4

5 6 A

KBL@KB_backlight

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

KB/FAN Date: 5

4

3

2

Thursday, March 03, 2016

Sheet 1

31

of

45

5

4

3

2

1

32

POA(FPD) or PBA D

+3V_LDO_EC

R859

FPD@0_4

+3VPCU

R860

*FPD@0_4

+3V

R865

*FPD@0_4

[33] POA_FP_PWREN#

change from +3V_LDO_EC to +POA_PWR

+POA_PWR

+POA_PWR C476 *[email protected]/16V_6 D49 1

*FPD@D5V0X1B2LP-7B USBP3+_R 2

D50 1

*FPD@D5V0X1B2LP-7B USBP3-_R 2

D

1

Don't change to short pad

R336

FPD@10K/F_4

Q24 FPD@AO3413

2

C927

20mil

3

*FPD@1000p/50V_4

R866 *FPD@0_4

+POA_PWR_Q

R806

C496 [email protected]/6.3V_4

*shortFPD@0_4

CN21

20mil

+POA_PWR_R USBP3+_R USBP3-_R

C869 [email protected]/50V_4 R861 R862 R863 R864

[33] POA_EN# [33] POA_PWR_INT# [33] POA_AUTH_ERR [33] POA_POWERREQ

C

FPD@0_4 FPD@0_4 FPD@0_4 FPD@0_4

1 2 3 4 5 6 7 8

10 9

C

FPD@CONN_AOP

Don't change to short pad

Co-Layout USBP3+ USBP3-

R790 R795

FPD@0_4 FPD@0_4

R804 R803

FPD@0_4 FPD@0_4

USBP3+_R USBP3-_R

U46 +3VPCU B

R788

*FPD@0_4 C860 *[email protected]/50V_4

R787

*FPD@0_4 USBP3+_U *FPD@0_4 USBP3-_U

R789 R794

[6] USBP3+ [6] USBP3*FPD@100/F_4

[33,35,37,40]

C859

MAINON

*[email protected]/16V_4

1 2 3 9 10

Y+ YGND VCC SEL

MM+ DD+ OE#

4 5 6 7 8

TP89 TP88 USBP3-_R2 R799 *FPD@0_4 USBP3-_R USBP3+_R2 R797 *FPD@0_4 USBP3+_R R786 *FPD@0_4

B

*FPD@PI3USB103ZLEX

20160205_DNI because PBA doesn't have leakage issue

A

SEL

OE#

Y+

Y-

X

H

Hi-Z

Hi-Z

L

L

M+

M-

H

L

D+

D-

Quanta Computer Inc. PROJECT :ZAB Size

Document Number

Spec define: High Active Date: 5

4

3

Rev 1A

POA Friday, March 04, 2016 2

Sheet

32

of 1

45

A

5

4

L22

BLM15AG121SN1D(120/0.5)_4

3

+3VPCU_ECPLL

+A3VPCU

EC(KBC)

C830 0.1u/16V_4

L19

BLM15AG121SN1D(120/0.5)_4

C803

2

1

+3V_LDO_EC

+3VPCU_EC S5_ON

(For PLL Power)

R731

33

10K/F_4

0.1u/16V_4 ECAGND SB_ACDC [34] POA_EN# [32] BT_EN [22]

+VSTBY_FSPI C451

C845

C801

C474

C479

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

+VSTBY_FSPI +3V_EC

[22]

C467 1u/6.3V_4

Layout put in device side(ESD)

[5] SIO_RCIN# IOAC_WLAN_WAKE#

*short_4

113 123

[31] KB_BL_LED [5] DNBSWON#

*short_4 TP80

AMP_MUTE#

71 72 73 35 34 122 95 94

ODD_POWER [34] ACIN [34] TEMP_MBAT# Layout put in device side(ESD) [22] WLANPWR# [24] PCBEEP_EC R745 33_4 [37] DDR4_SUSON_2V5 [34] AC_Protect C809 180P/50V_4 EC_SPI_SCK EC_SPI_CS0# EC_SPI_SDI EC_SPI_SDO [31] [31]

MY16 MY17

105 101 102 103 56 57 32

TS_EN

100 125

[35,36,40] S5_ON [30] PTP_PWR_EN#

EC_SPI_SDI EC_SPI_SDO

Please do not place any pull-up resistor on GPG0, GPG2, and GPG6 (Reserved hardware strapping). B

TMRI0/WUI2/GPC4(Dn) TMRI1/WUI3/GPC6(Dn)

N/A

SUSON MAINON VRON PLTRST# RSMRST# CPU_ID

R724 R774 R776 R765 R734 R725

100K/F_4 100K/F_4 100K/F_4 100K/F_4 *10K/F_4 *SP@0_4

R723 C802

LID#

SM BUS PU(KBC)

IOAC_RST# [21,22] EC_FPBACK# [18] TPCLK [30] TPDATA [30]

+3V_LDO_EC

Closed to EC

24 25 28 29 30 31

PWRLED# [29] BATLED1# [29] SUSLED# [29] BATLED0# [29] MAINON [32,35,37,40] USB_CTL1 [27]

47 48

FAN1_RPM [31] POA_AUTH_ERR

120 124

107 18 21

MBCLK MBDATA

R719 R720

4.7K_4 4.7K_4

2ND_MBCLK 2ND_MBDATA

R721 R722

4.7K_4 4.7K_4

EXTERNAL SERIAL FLASH ADC0/GPI0(X) ADC1/GPI1(X) ADC2/GPI2(X) ADC3/GPI3(X) ADC4/WUI28/GPI4(X)

KSO16/SMOSI/GPC3(Dn) KSO17/SMISO/GPC5(Dn) PWM6/SSCK/GPA6(Up)

HWPG

112

RSMRST#

SSCE0#/GPG2(X) SSCE1#/GPG0(X)

SPI ENABLE

TACH2/GPJ0(X) GPJ1(X) DAC2/TACH0B/GPJ2(X) DAC3/TACH1B/GPJ3(X)

KSO0/PD0 KSO1/PD1 KSO2/PD2 KSO3/PD3 KSO4/PD4 KSO5/PD5 KSO6/PD6 KSO7/PD7 KSO8/ACK# KSO9/BUSY KSO10/PE KSO11/ERR# KSO12/SLCT KSO13 KSO14 KSO15

[32]

CORE_PWM_PROCHOT#

[37,40]

C

2 R741

2N7002K

Layout put in device side(ESD) 33_4

RSMRST# RF_EN

ICMNT

66 67 68 69 70

[5]

[22]

180P/50V_4

C838

+3V_LDO_EC

DGPU_OPP [12] VRON [5,38] LANPWR# [21] POA_FP_PWREN#

76 77 78 79

SYS_HWPG_R

EC_TypeC_CHG_HI CLR_CMOS [7]

U40

25mA

8

VCC

+3V_LDO_EC [32]

*short_4 SYS_HWPG

R852

[28]

R685

EC_SPI_WP# 10K/F_4

R713

EC_SPI_HOLD# 7 10K/F_4

3

WP#

SPI_SI SPI_SO CS# SPI_SCK

SPI_HOLD GND

1

GPJ7 GPJ6

2 128

R736

33_4

SYS_SHDN# [12,35,40] TPD_INT# [30]

ECAGND L20

+3V B

R763 10K/F_4

IT8987E/BX [40] HWPG_0.775VS5 [40] HWPG_1.8VS5

C811

[38] VRM_PWRGD

0.1u/16V_4

[37] HWPG_VDDR [36] HWPG_0.95VS5

BLM15AG121SN1D(120/0.5)_4

[40] HWPG_1.5V [37] HWPG_2.5V

TP87

PLTRST#

TP84

HWPG

TP83

MAINON

TP86

RSMRST#

TP77

S5_ON

+3VRTC

R664

*0_4

+3VPCU

[40] HWPG_1.5VSUS

[39]

BATT_Switch

R652 100K/F_4

*SP@0_4

PJA138K Q44

C734 *0.1u/16V_4

Just for A

2 [5] VDDGFX_PD

*1N4148WS

D38

1N4148WS

D41

*1N4148WS

D26

*1N4148WS

D40

*1N4148WS

D28

*1N4148WS

D42

*1N4148WS

D30

*1N4148WS

3D39

*CZ@1N4148WS

HWPG

HWPG

[5]

Q46 *CZ@2N7002K

*CZ@100K/F_4

2 Q47 **CZ@2N7002K

BI_GATE SW1 BI_SW 6

5

*1N4148WS

D29

3

R716

D32

C795 *[email protected]/10V_4

C753 *0.1u/16V_4

Vgs = 1.5V 2

R651

1

GFX_PWRGD

+3V

WRST# 2 1

Vgs = 1.5V

A

2015.10.20 SCL v1.10 & DG v1.08 TYP1: No connect (**) Q45 *PJ4N3KDW

Quanta Computer Inc.

1 2

4

TP76

*0_4

6

EC_PWROK

R658

R665 *10K/F_4

+3VRTC

3 4

C794 *10P/50V_4

HWPG(KBC)

Layout put in device side(ESD)

MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7

SW2

BI

4

W25X10CLSNIG

C804 180P/50V_4

BATT Detect SW

[34]

R684 10K/F_4

EC_SPI_SDI EC_SPI_SDO EC_SPI_CS0# EC_SPI_SCK

5 2 1 6

EC requirement

2

TP75

+3V_LDO_EC

SPI NOR FLASH(128KB) (KBC)

[34]

ECAGND

10U/6.3V_4

1

TP74

SUSB#

[4,34,38,39]

Q48

VSTBY

KBMX

3

SUSON

EC need read CPU temperature even in UMA mode or GPU off mode

100K/F_4

A/DAVCC D/A

5

TP79

Change EC SMBus PU voltage from +3V_GFX to +3V_S5 due to it also connect to CPU(SIC/SID) and GPU.

+3V_S5

NBSWON# [31] SUSC# [5]

C841

FSCK/GPG7 FSCE#/GPG3 FMOSI/GPG4 FMISO/GPG5

SUSON

CPU_ID

R780

3

TP42

???

[18]

Battery B/I SW (SYP)

DNBSWON#

ITE suggest RSMRST# PD CPU_ID: CZ@: Internal PU TYP3@: External PD

[35] SYS_HWPG

NBSWON#

D

TP78

33_4 180P/50V_4

1

N/A

Power sequence

A

RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn)

2

PCH/VGA

SM Bus 3 SM Bus 4

PWRSW/GPE4(Up) RI1#/WUI0/GPD0(Up) RI2#/WUI1/GPD1(Up)

WAKE UP

3 4

SM Bus 2

C805 180P/50V_4

85 86 89 90

Battery [31] [31] [31] [31] [31] [31] [31] [31]

*10K/F_4 10K/F_4 *10K/F_4

PROCHOT_EC

VSTBY ADC5/DCD1#/WUI29/GPI5(X) UART port ADC6/DSR1#/WUI30/GPI6(X) ADC7/CTS1#/WUI31/GPI7(X) RTS1#/WUI5/GPE5(Dn) PWM7/RIG1#/GPA7(Up) DTR1#/SBUSY/GPG1/ID7(Dn) CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn) CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn)

1

SM Bus 1

TACH0A/GPD6(Dn) TACH1A/TMA1/GPD7(Dn)

VSTBY

58 59 60 61 62 63 64 65

SM BUS ARRANGEMENT TABLE

36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55

MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15

R726 R744 R746

1

*10K/F_4 *10K/F_4

[31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31] [31]

LID#_R

SIO_A20GATE SIO_RCIN# SERIRQ

PWM DAC4/DCD0#/GPJ4(X) DSR0#/GPG6(X) GINT/CTS0#/GPD5(Up) PS2DAT1/RTS0#/GPF3(Up) DAC5/RIG0#/GPJ5(X) PS2CLK1/DTR0#/GPF2(Up) TXD/SOUT0/GPB1(Up) RXD/SIN0/GPB0(Up)

VCORE

[24]

R751

80 119 33 88 81 87 109 108

[26]

R732 R733

PWM0/GPA0(Up) PWM1/GPA1(Up) PWM2/GPA2(Up) PWM3/GPA3(Up) PWM4/GPA4(Up) PWM5/GPA5(Up)

12

[28] EC_TypeC_EN [5] SUSB# [5] EC_PWROK [4,18] APU_DISP_BLEN [31] FAN1_DAC [21] IOAC_LAN_WAKE#

AVSS

C

EC_ODD_EJ#

CIR VSTBY

75

C819 180P/50V_4

[26]

CRX0/GPC0(Dn) CTX0/TMA0/GPB2(Dn)

[30]

D48 Layout put in device side TVM0G5R5M220R

TS_EN

33_4

TPD_EN

MBCLK [34] MBDATA [34] 2ND_MBCLK [4,12] 2ND_MBDATA [4,12]

VSTBY

IT8987E/BX

VSS VSS VSS VSS

R755

[18] TS_EN_R

R743

GA20/GPB5(X) VSTBY SERIRQ/GPM6(X) VCC ECSMI#/GPD4(Up) VSTBY VSTBY ECSCI#/GPD3(Up) LPC VSTBY GPIO WRST# VSTBY KBRST#/GPB6(X) VSTBY PWUREQ#/BBO/SMCLK2ALT/GPC7(Up)/SMCLK2ALT VSTBY

VSS

C813 *10p/50V_4

WRST#

33_4

3

1

*22_4

[5] SIO_A20GATE [6,25] SERIRQ [28] 25810_POL# [5] SIO_EXT_SCI#

PS2CLK0/TMB0/CEC/GPF0(Up) PS2DAT0/TMB1/GPF1(Up) PS2CLK2/WUI20/GPF4(Up) PS2DAT2/WUI21/GPF5(Up)

110 111 115 116 117 118

*10K/F_4

1

R322 100K/F_4

LPCPD#/WUI6/GPE6(Dn)

27 49 91 104

R753

17 126 5 15 23 14 4 16

[27]

2

2

PROCHOT_EC D8 RB500V-40

SMCLK0/GPB3(X) SMDAT0/GPB4(X) SMCLK1/GPC1(X) SMDAT1/GPC2(X) PECI/SMCLK2/WUI22/GPF6(Up) SMDAT2/WUI23/GPF7(Up) VSTBY

SM BUS

CLK_PCI_EC

LAD0/GPM0(X) LAD1/GPM1(X) LAD2/GPM2(X) LAD3/GPM3(X) VCC LPCRST#/WUI4/GPD2(Up) VSTBY LPCCLK/GPM4(X) VCC LFRAME#/GPM5(X) VSTBY

USB_BC_ON [27] USB_CHARGE_ON CLKRUN# [6,25] +3V

R770

+3V R740

PS/2

+3V_LDO_EC

VCC VSTBY VSTBY VSTBY VSTBY VSTBY VSTBY_FSPI

U43 10 9 8 7 22 13 6

[6,22,25] LPC_LAD0 [6,22,25] LPC_LAD1 [6,22,25] LPC_LAD2 [6,22,25] LPC_LAD3 [5,22,25] PLTRST# [6] CLK_PCI_EC [6,22,25] LPC_LFRAME#

8.2K_4

SIO_EXT_SCI#

Layout put in device side

[27]

99 98 97 96 93

0.1u/16V_4

WUI42/GPH6/ID6(Dn) WUI41/GPH5/ID5(Dn) WUI40/GPH4/ID4(Dn) WUI19/GPH3/ID3(Dn) CLKRUN#/WUI16/GPH0/ID0(Dn)

2 *2.2/F_6

19 20

1 R319

3 74

+3V_S5

GPH7 AVCC

Reserved for EC debug

11 26 50 92 114 121 106

*2.2/F_6

KSI0/STB# KSI1/AFD# KSI2/INIT# KSI3/SLIN# KSI4 KSI5 KSI6 KSI7

R717

+3V_S5

R748

L80HLAT/BAO/WUI24/GPE0(Dn) L80LLAT/WUI7/GPE7(Up)

C469

84 83 82

2 2.2/F_6

VSTBY

1 R320

EGCLK/WUI27/GPE3(Dn) EGCS#/WUI26/GPE2(Dn) EGAD/WUI25/GPE1(Dn)

+3V

2.2/F_6

USBON#

C888

R718

+3V_LDO_EC

D

POA_PWR_INT# [32] POA_POWERREQ [32]

0.1u/16V_4

C430

1

2 2.2/F_6

D/C#

127

1 R278

+3V_LDO_EC

+3V_S5 [34] +3VPCU_EC

12 mils

PROJECT : ZAB Size

Document Number

Rev 1A

EC (ITE8987E/BX) Date: 5

4

3

2

Friday, March 04, 2016

Sheet 1

33

of

45

4

3

2

VA2

15-12-10 SMT ME request: change FP & pin order

VA1

PQ30 TPCA8109

5

3

1

1 2 3

2

2 24737_ACN

PD7 P4SMAFJ20A

2 PC3 0.1u/25V_4

PR37 220K/F_4

4

PC21 0.1u/25V_4

D

5

PR197 *short_4

PC1 0.1u/25V_4

Power_conn 50320-0040n-001-4p-l-smt

34

PQ3 TPCA8109

VIN

1

1

4 3 2 1

PR199 0.02/F_0612

PD6 SV1040

1 2 3

PJ1

1

PC161 0.1u/25V_4

PC162 2200p/50V_4

PR65 33K/F_4

4

5

24737_ACP

PC2 2200p/50V_4 PD1 1N4148WS

PR43 220K/F_4

recommend 200mA at least.

1

6

2

5

3

4

D

PR198 *short_4 D/C#

PR70 10K/F_4

[33]

PR34 *short_4

3

PQ1 IMD2AT108

2 24737_ACP PQ33 2N7002K

PC5 0.1u/25V_4

PC9 0.1u/25V_4

PC4 0.1u/25V_4

2 ACDET

REGN

16

24737_REGN C

PC25 0.1u/25V_4

PR17 20_1206

[33] ACIN

20

PD2 RB500V-40

VCC BTST

17 24737_BST PC14 47n/50V_6

5

*short_4

HIDRV

4

1

PQ2 2N7002DW

PR27

*short_4

PR32

*short_4

24737_LX

4

PL2 6.8uH_7X7X3

15

24737_DL

1

SCL

PQ32 AON7410

+3VPCU

PGND PC37 0.1u/25V_4 BAT-V

BI [33]

B

10K/F_4

24737_BM#

PR67

10K/F_4

24737_CMPOUT

PR41

316K/F_4

24737_ILIM

PR64

if no external switch control=> stuff if has external switch control=> DNI

11 3

CMPOUT

PR59 100/F_4

24737_CMPIN +3VPCU

PR36 100K/F_4

PR14 100K/F_4

3

PR73 *100K/F_4

BATT_CONN 50458-00801-v02-8p-l

4

24737_SRP

ILIM

TEMP_MBAT# [33] PR44 1M/F_4

PR46 10_4

CMPIN

SRN

12

PR45 7.5_6

24737_SRP PC24 *680p/50V_6

24737_BM#

PR56 100/F_4

2

4-Cells bq24707A

PR16 SP@162K/F_4

PR15 *0_4

CORE_PWM_PROCHOT#

0／ ／0

10／ ／7.5

10／ ／7.5

10／ ／7.5

REGN MAX voltage 6.5V V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr =0.793V for 3.965A current limit

[4,33,38,39]

3

2

2

R1 [33] ICMNT

PU to +3V_GFX in GPU side 24737_CMPOUT

R1

A

MBDATA [33]

45W ZRZL UMA

51K

R2

GPU_THROTTING#

3

2

PC16 100p/50V_4 PR69 *short_4

100K

24737_CMPOUT

PQ6 *EV@2N7002K

100K

[33] AC_Protect

CS41152FB08

78W ZAB DIS

162K

100K

PROJECT : ZAB

For BATT Only

Size

Document Number

Rev 1A

Charger (BQ24737RGRR)

CS41622FB11 Date: 4

A

Quanta Computer Inc.

1

115K

Pin10 ILIM=0.793V Rsr = 0.01ohm

2

CS35102FB04

65W ZAB UMA

[12]

PQ4 2N7002K

1

PD4 PDZ5.6B MBCLK [33]

5

Others

1

1

1

bq24737

PC40 *47p/50V_4

PD3 PDZ5.6B

B

PC172 10U/25V_8

PC19 0.01u/50V_4

PQ5 *2N7002K

PC31 *47p/50V_4

PC177 10U/25V_8

SRP／ ／SRN

PC29 0.1u/25V_4

R2 PR57 100/F_4

PC28 2200p/50V_4

24737_SRN

24737_SRN

GND GND GND GND GND

PC171 *100p/50V_4

BAT-V

PR215 *short_4

21 22 23 24 25

8 7 6 5 4 3 2 10 1

PR216 *short_4

PC30 0.1u/25V_4

PC38 0.1u/25V_4

IOUT

9

13

2

PR30 *4.7_6

4

7

PJ2

10

14

BM#

SRP PR58 *0_4

PR213 0.01/F_0612

PU1 BQ24737RGRR

SDA

LCDRV 9

MBCLK

24737_DH

19

ACOK# PHASE

8

MBDATA

18

PQ31 AON7410

3 2 1

5

3

2

6

PR52 *0_4 PR53

PC157 10u/25V_8

PR29 *short_6

PC8 0.47u/25V_6

[5] ACPRESENT

[33] SB_ACDC

PC152 2200p/50V_4

5

24737_VCC

5

PR47 100K/F_4

3 2 1

PR50 100K/F_4

VIN PC20 1u/16V_4

ACN

24737_ACDET 6 C

ACP

PR23 11K/F_4

1

PR20 63.4K/F_4

+3VPCU

PR51 *10K/F_4

1

24737_ACN

3

2

Saturday, March 05, 2016

Sheet 1

34

of

45

5

4

3

SYS_SHDN#

SYS_SHDN#

2

1

35

[12,33,40]

VL

+3VPCU

3V_LDO PR297 10K/F_4

[33] SYS_HWPG

VIN

PR170 10K/F_4

PC247 *680p/50V_6

RDSon=4.9mohm PR302 *short_6

3

12

51225_FB2

3 2 1

51225_DL2

4

PC126

1/F_4

0.1u/25V_4

PL15 2.2uH_7X7X3

5

VREG3 GND

11

PR163

PR299 6.49K/F_4

21

+ PC244 220u/6.3V_6X4.2

PR167 *4.7_6

4

C

22 PQ53 AON7752

PC246 0.1u/25V_4 PC128 *680p/50V_6

PR169 9.31K/F_4

RDSon=14.5mohm

PC149 0.1U/16V_4

PC147 10U/6.3V_4

PC254 10U/6.3V_4

+5VPCU

CT2

7

6

VIN2

VIN2

2 VIN1

VOUT1 VOUT1

4

11

GND

PU17 APL3523A

MAINON

S5_ON MAINON

PC262 1000P/50V_4

PR183 *short_4

+3V_LDO_EC 3V_LDO

PR176

0_4

+3VPCU

PR181

*0_4

+3V_LDO_EC TDC : 100MA

GND

VBIAS

ON1

PC134 *0.1U/16V_4

PC140 1000P/50V_4

For EC power auto recovery Don't change to short pad

Soft-Start

PC253 10U/6.3V_4

PR184 *short_4

3

[32,33,37,40]

PC263 *0.1U/16V_4

PC139 0.1U/16V_4

15

0.1U/16V_4

5

B

+3V

8 9

OUT2 OUT2

PC138 0.1U/16V_4

15

10

CT1

PC257 1000P/50V_4

ON2

PC133 1U/6.3V_4

5

ON2

CT2

11

13 14

PC136

ON1

PC256 *0.1U/16V_4

PC132 1U/6.3V_4

+3V_S5

VBIAS

12

PR310 *short_4

TDC : 3.9A PEAK : 5.2A Width : 160mil

Width : 100mil

+5V

PR313 *short_4

3

+3VPCU

MAINON PC135 *0.1U/16V_4

10

GND

L(ripple current) =(9-3.3)*3.3/(2.2u*0.355M*9) ~2.676A Iocp=14-(2.676/2)=13.162A Vth=(12.662A*14.5mOhm)+1mV +3VPCU =184.599mV R(Ilim)=(184.599mV*8)/10uA TDC : 2.38A =147.68K PEAK : 3.17A

8 9

0.1U/16V_4 S5_ON

A

8

51225_SW2

CT1

GND

PU13 APL3523A

4

S5_ON

51225_VBST2

12

OUT2 OUT2

PC142 0.1U/16V_4

PC259

[33,36,40]

51225_DH2

9

1

7

6

VOUT1 VOUT1

TDC : 3.6A PEAK : 4.8A Width : 160mil

PC148 1U/6.3V_4

VIN2

VIN2

1

2 VIN1

13 14

VIN1

PC143 1U/6.3V_4

+5V_S5

PC144 10U/6.3V_4

10

VIN1

+5VPCU

PR166

PR171 +5VPCU

+5VPCU

GND

51225_EN1

+3VPCU

OCP:14A

TDC : 5.25A PEAK : 7A Width : 220mil B

GND

L(ripple current) =(9-5)*5/(1u*0.3M*9) =7.407A Iocp=17-(7.407/2)=13.296A Vth=(13.296A*4.9mOhm)+1mV =66.151mV R(Ilim)=(66.151mV*8)/10uA ~52.92K

VO1

GND

19

OCP:17A

VFB1

6

23

14

VFB2

24

2

DRVL2

DRVL1

GND

51225_FB1

SW 2

PU11 TPS51225RUKR

SW 1

GND

15

5 6 7

PR303 *4.7_6

18

51225_DL1

VBST1

25

S2 S2 S2

PC137 0.1u/25V_4

51225_SW1

8

VBST2

CS2

1/F_4

17

DRVH1

CS1

0.1u/25V_4 G2

51225_VBST1

EN2 DRVH2

5

S1/D2

PR301 15.8K/F_4

+

16

+3VPCU 3.3 Volt +/- 5% TDC : 8.4A PEAK : 11.2A OCP : 14A Width : 340mil

4

EN1

150K/F_4

9

51225_DH1 PR172

PGOOD

VCLK

PC131

20

1

1

51225_EN1

63.4K/F_4

G1 51225_SW1

PC252 220u/6.3V_6X4.2

VREG5

2 D1 D1 D1

7

VIN

13

PQ54 AON6978

PL16 2.2uH_7X7X3

C

PQ52 AON7410

PR300 100K/F_4

+5VPCU 5 Volt +/- 5% TDC : 10.35A PEAK : 13.8A OCP : 17A Width : 420mil

PC240 10u/25V_8

5

+5VPCU

D

PC241 2200p/50V_4

3 2 1

PR165 10K/F_4

4.7u/6.3V_4

PR173 *short_4

PC243

PC248 2200p/50V_4

PC242

PC245 10u/25V_8

51225_VIN

PC236 *33u/25V_6x4.5

PC127

2

+

26

D

10U/6.3V_4

1

SYS_SHDN#

0.1u/25V_4

VIN

PC141 1000P/50V_4

Soft-Start

A

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

SYSTEM 5V/3V (RT6575AGQW) Date: 5

4

3

2

Tuesday, March 29, 2016

Sheet 1

35

of

45

5

4

3

2

1

36 D

D

VIN PU2000

Fsw=550KHz

VCC PR2000 73.2K/F_4

G5335QT2U

*short_4G5335-PWRGD-1 1

PGOOD LX LX LX LX LX LX

+5VPCU

C

G5335-AGND-1

PR2005

*0_4

PR2006

*short_4

G5335-PFM-1

3

PFM

10 11 16 17 18 25

PR2009

S5_ON

G5335-EN-1

*short_4

2

PC2016 *0.047U/16V_4

PGND PGND

G5335-AGND-1

PGND 23

PL2000 0.68uH_7X7X3 1 2 C

PR2007 *4.7_6

PC2015 *680p/50V_6

EN PGND

G5335-SS-1

PC2005 0.1U/25V_4

G5335-LX-1

Pulse-Skipping mode

[33,35,40]

PGND

VDDP_0.95V_S5

20 G5335-BST-1 PR2003 2.2/F_6

PR2004

[33] HWPG_0.95VS5

AMD requirements (depends on OPN) Refer to datasheet...SR: 55366 / BR:53557 1.05V: 2.49K ohm, CS22492FB22 0.95V: 0 ohm, CS00002JB38

PR316 SP@0_4

PC2014 *1000P/50V_4

R1

12 PR2008 3.83K/F_4

13 14 15 19

SS

PR2010 20K/F_4 AGND

PC2017 0.047U/16V_4 B

FB

G5335-AGND-1

PC2006 22U/6.3V_6

BST

PC2004 *0.01U/25V_4

G5335-TON-1

PC2013 0.1U/16V_4

PR2002 100K/F_4

6

PC2012 *22U/6.3V_6

TON

PC2011 *22U/6.3V_6

PC2003 10U/6.3V_4

+3V

24

VDDP_0.95V_S5 0.95 Volt +/- 5% TDC : 7.56A PEAK : 10A Width : 320mil

PC2007 22U/6.3V_6

IN

22

PC2010 22U/6.3V_6

G5335-VCC-1 21

9

PC2009 22U/6.3V_6

PR2001 10_4

IN

PC2008 22U/6.3V_6

+5VPCU

NC

PC2000 10u/25V_8

7

8 PC2002 2200p/50V_4

IN

PC2001 *0.1U/25V_4

IN

4

5

PR317 *100/F_4

G5335-AGND-1

R2

VFB=0.8V

G5335-FB-1

APU_VDDP_RUN_FB_H

[4]

APU_VDDP_RUN_FB_L

[4]

B

PR311 *0_4 PR2011

Vo=0.8*(R1+R2)/R2 =0.95V

*short_4

PR314 *short_4

G5335-AGND-1 G5335-AGND-1

5

VDDP_0.95V_S5

MAIND

[37,40] MAIND

4

PQ16 AON6752 1 2 3

A

VDDP_0.95V

+0.95V TDC : 6.38A PEAK : 8.5A Width : 260mil

A

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

VDDP_0.95V_S5 (G5335QT2U) Date: 5

4

3

2

Saturday, March 05, 2016

Sheet 1

36

of

45

5

4

3

2

1

37

+3V

PR2016 100K/F_4

[18,24,26,29,30,34,35,36,38,39,40,41,42,43] [27,28,35,38,39,41,43] [9,10] [9,10] [3,7,9,10,29] PC2021 *0.1U/16V_4

Fsw=500KHz PR2021

1P35V_TON

*short_4

PR2031

*0_4

TON

1P35V_LGATE

PL2001 1uH_7X7X3

0.1u/25V_4

12

PR2025 *4.7_6

+5V_S5

PAD

PQ2006 AON7752

PR2026 *short_4

PC2039 *680p/50V_6

C

21

VDDQ 5

PC2040 1U/6.3V_4

+

PC2033 *330u/2.5V_6X4.2

15

2.2/F_6

PC2037 22U/6.3V_6

1P35V_PHASE

4 PC2029

PR2022

PC2036 22U/6.3V_6

16

+1.2VSUS

PC2032 22U/6.3V_6

1P35V_BOOT

5

9

13 CS FB

PGND

6

3 PR2030

1P35V_FB

1P35V_S5 +5V_S5

18

4

1P35V_VID

*0_4

10

VDD

14

PC2038 *10U/6.3V_4

LGATE

VLDOIN

+1.2VSUS

C

PHASE

VTTREF

VID

4 19 PC2030 0.033U/10V_4

1P35V_UGATE

VTTGND

GND

PR2023 100/F_4

1P35V_S3 PR2027

8

BOOT1 PU2001 RT8231BGQW

PC2034 0.1U/16V_4

17

3 2 1

1 +SMDDR_VREF

UGATE VTTSNS

11

TDC : 0.45A PEAK : 0.6A Width : 20mil

VTT

5

2 PC2026 10U/6.3V_4

PQ2005 AON7410

3 2 1

20

PGOOD

+SMDDR_VTT

S5

S3

7

499K/F_4

TDC : 0.38A PEAK : 0.5A Width : 20mil

PC2035 22U/6.3V_6

PR2019 249K/F_4

PC2025 0.1U/25V_4

PC2022 *0.1U/16V_4

+1.2VSUS 1.2 Volt +/- 5% TDC : 6A PEAK : 8A OCP : 10A Width : 240mil

VIN

PC2031 0.1U/16V_4

*short_4

1P35V_CS

PR2020

1P35V_PGOOD

MAINON

1P35V_S3

[32,33,35,40]

D

Ilimit=10A

1P35V_S5

D

VIN +5V_S5 +SMDDR_VTT +SMDDR_VREF +1.2VSUS

PC2028 2200P/50V_4

*short_4

PC2024 10u/25V_8

SUSON

*short_4

PR2018

PC2027 10u/25V_8

[33,40]

PR2017

PC2023 0.1U/25V_4

[33] HWPG_VDDR

Rds(on)=14.5mohm 1P35V_VDDQ PR2032 7.87K/F_4

VID

Ref. Voltage

High

0.675V

Low

0.75V

PR2033 10K/F_4

OCP=10A L ripple current =(19-1.2)*1.2/(1u*500k*19) =2.248A Vtrip=10-(2.248/2)*14.5mohm =128.702mV Rlimit=128.702mV/5uA*10=257.4Kohm

DDR=1.2V PR2032=7.87K/F_4 PR2033=10K/F_4

S3

S5

VDDQ

VTTREF

VTT

S0

1

1

ON

ON

ON

S3 (mainon off)

0

1

ON

ON

OFF

S4/S5

0

0

OFF

OFF

OFF

B

B

Chechk PU high with HW

+2.5VSUS 2.5Volt +/- 5% TDC : 0.78A PEAK : 1.04A Width : 40mil

+2.5VSUS Power Rail For DDR4

+3V

+3V_S5

10/27 Reserve +2.5V for DDR4 VDDSPD +2.5VSUS

PR322 *short_4

PU18

5

VIN

[33] HWPG_2.5V

4

PG

PC260 4.7U/6.3V_4

LX

3

+2.5VSUS

PR323 *short_6

3

PR321 100K/F_4

PL17 [36,40]

2.2uH/1.85A_2.5X2X1.2

MAIND

MAIND

2

PC258 0.47uF/6.3V_2

GND

2

PR320 47.5K/F_4

R1

+2.5V

PC249 10U/6.3V_4

FB

PR307 *short_4

EN

+2.5V [40]

G5719BTB1U

6

[33] DDR4_SUSON_2V5

1

PR306 *10K/F_4

1

PQ22 *AO3404 SUSON

Chechk Enable Sequence with HW

Vo=(0.6(R1+R2)/R2)

A

PR315 15K/F_4

PC250 *10U/6.3V_4

TDC : 0.03A PEAK : 0.04A Width : 20mil

PC251 0.1U/16V_4

R2

A

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

DDR4_+1.2VSUS (RT8231BGQW) Date: 5

4

3

2

Saturday, March 05, 2016

Sheet 1

37

of

45

5

4

3

2

1

38

VDDCR_NB

PC13 330p/50V_4

PR54 2.2/F_6

VIN PC61 2200p/50V_4

PC52 10u/25V_8

VDDCR_NB

+

[4] APU_SVC C

[4,33,34,39]

CORE_PWM_PROCHOT#

20

PR10

*short_4

62771_SVC

3

PR8

*short_4

62771_VRHOT

4

PR7

*short_4

62771_SVD

5

39 ISUMN_NB

40

26

ISUMP_NB

VDD

VDDP

25

38

37

PGOOD_NB

LGATE_NB

PGOOD

PHASE_NB

SVC

UGATE_NB

VR_HOT_L

BOOT_NB

34

LGATE_NB

33

PHASE_NB

32

UGATE_NB

31

BOOT_NB

30

BOOT_2

VSUMG+

PR3

3.65K/F_4

+VDDCR_NB TDC : 15.75A PEAK : 21A OCP : 26.5A Width : 600mil Load Line = -4mV/A

VSUMG-

PR12

1/F_4

PR60 2.2/F_6

C

VIN

UGATE1 BOOT1

41

Add 9 GND VIAs for thermal pad

PR31

3.65K/F_4

ISEN2

PR19

10K/F_4

VSUM-

PR49

1/F_4

VIN

BOOT_1 ISEN1

LGATE_1

7 6 5

OCP RC time constant

PR234 *short_4

AMD CZ/Bristol/Stoney 35W - SVI2

PC159 0.01u/50V_4

A

Close to the GPU side.

+VDDCR_NB TDC : 15.75A PEAK : 21A OCP : 26.5A Width : 600mil Load Line = -4mV/A

+VDDCR_CPU TDC : 33.75A PEAK : 45A OCP : 68A Width : 1600mil Load Line = -2.1mV/A

DCR=1.1mOhm VDDCR_CPU

+

PC166 0.1u/16V_4 VSUM+ PR26

PR231 10_4

PQ35 AON6998

PL9 0.36uH_10X10X4 1 2

PC42 2200p/50V_4

D1 D1 D1 8 G2

VSUM-

[4] APU_VDD_RUN_FB_L

PHASE_1

PC72 10U/6.3V_4

Close with phase1 inductor

9

S1/D2

S2 S2 S2

PR48 11K/F_4

PC27 47n/16V_4

PC26 0.15u/10V_4

PHASE_1

PR226 10K/F_4_3435NTC

PR38 549/F_4

Load line setting

1 G1

PR39 2.61K/F_4

PC70 0.1u/16V_4

PC36 0.22u/25V_6

PR203 2.1K/F_4

3.65K/F_4

ISEN1

PR202

10K/F_4

VSUM-

PR63

1/F_4

PR11 *10K/F_4

+VDDCR_GFX TDC : 30A PEAK : 40A OCP : 56A Width : 1200mil Load Line = -2.1mV/A

A

ISEN2

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

VDDCR_CPU / NB (SL62771HRTZ) Date: 5

4

B

PR62 2.2/F_6

PC155 0.22u/25V_6

PR204 300_4

+

VDDCR_CPU TDC : 33.75A PEAK : 45A OCP : 68A Width : 1600mil Load Line = -2.1mV/A

ISEN1

VSUMPR207 133K/F_4

[4] APU_VDD_RUN_FB_H

Parallel

+

PC153 0.22u/25V_6

PR232 10_4 PR235 *short_4

VDDCR_CPU

ISEN2

UGATE_1

PC156 330p/50V_4

DCR=1.1mOhm

PR24 *10K/F_4

PR205 2K/F_4

PC158 1000p/50V_4

PQ38 AON6998

VSUM+

VSUM+

VDDCR_CPU

PR83 2.2/F_6

BOOT_1

S2 S2 S2 21

ISEN2

ISEN1 13

LGATE_2

12

ISUMP 14

15

UGATE_1

PC165 0.1u/25V_4

PC160 680p/50V_4

PHASE_1

22

2

PC163 390p/50V_4

23

PC169 10u/25V_8

PC23 100p/50V_4 PR206 200K/F_4

8 G2

PC53 PR75 1n/50V_4 2.2/F_6

62771_COMP

Place NTC close to the VDDCORE Hot-Spot. OCP=100'C

EP

PL8 0.36uH_10X10X4 1 2

PHASE_2

LGATE_1

24

ISUMN

Place NTC close to the VDDNB Hot-Spot. OCP=100'C

62771_FB

B

RTN

IMON

ISUMN

IMON_NB

9

S1/D2

PC59 1n/50V_4

NTC

PHASE_2

2

LGATE_2

7 6 5

PHASE1

17

10

NTC_NB

62771_RTN

2

PC154 1000p/50V_4

PR200 133K/F_4

PC7 1000p/50V_4

PR2 133K/F_4

PR84

27.4K/F_4

IMON

PR91 10K/F_4

PR230 470K_4_4700NTC

PR87

27.4K/F_4

PR90 10K/F_4

PR229 470K_4_4700NTC

IMON_NB

LGATE1

VSEN

1 11

NTC

PWROK

16

NTC_NB

9

62771_VSEN

62771_PWROK

FB

*short_4

LGATE2

COMP

PR6

APU_PWRGD_SVID_REG

ENABLE

18

[4,39]

VRON

19

PR201 *100K/F_4

[5,33]

PC69 10U/6.3V_4

PHASE2

1 G1 62771_EN

PC49 2200p/50V_4

27

PC35 0.22u/25V_6 UGATE_2

PC71 0.1u/16V_4

SVT

PHASE_2

PC48 10u/25V_8

8

UGATE_2

28

4

62771_EN

29

PC41 10u/25V_8

*short_4

UGATE2 PU2 ISL62771HRTZ-TS2775

+

4

PR4

VDDIO

3

7

PC47 10u/25V_8

6

62771_SVT

PC46 0.1u/25V_4

62771_VDDIO

*short_4

2

*short_4

PR5

3

[4] APU_SVT

PR9

BOOT2

D1 D1 D1

VDD_18

SVD

1

BOOT_2 [4] APU_SVD

PC231 *33u/25V_6x4.5

VRM_PWRGD

VRM_PWRGD

VSEN_NB

36 35

[33]

FB_NB

COMP_NB

PR40 *short_4

+

PC11 0.1u/16V_4

+3V

PR42 10K/F_4

PC181 330u/2V_7343

PC182 10U/6.3V_4

PC183 0.1u/16V_4

PQ7 AON6998

DCR=1.4mOhm

4

3

PR74 2.2/F_6

LGATE_NB

VSUMG-

OCP

PC66 0.1u/25V_4

2 D1 D1 D1 8 G2

D

PC60 *220u/2V_7343

62771_COMP_NB

PR214 10K/F_4_3435NTC

PR21 549/F_4

PL5 0.36uH_7X7X4 1 2

PHASE_NB

PC43 1n/50V_4

62771_FB_NB

Close with PHASE_NB inductor

S2 S2 S2

62771_VSEN_NB

PC17 68p/50V_4

9

S1/D2

7 6 5

PR33 133K/F_4

1 G1 PHASE_NB

PR13 11K/F_4

PC18 390p/50V_4

PR66 1/F_4

UGATE_NB

PR1 2.61K/F_4

PC12 47n/16V_4

PR18 2K/F_4

VSUMG+

PC6 0.1u/16V_4

PC10 680p/50V_4

PC22 0.22u/25V_6

RC time constant +5V_S5

ISUMN_NB

PR22 300_4

PC32 1U/6.3V_4

PR35 33K/F_4

PC15 1000p/50V_4

PC33 1U/6.3V_4

Close to the CPU side. D

PC51 10u/25V_8

BOOT_NB PR25 1.87K/F_4

PC73 *220u/2V_7343

Load line setting

PC188 330u/2V_7343

PR236 *short_4 [4] APU_VDDNB_RUN_FB_H

PC189 330u/2V_7343

PR28 10_4

3

2

Saturday, March 05, 2016

Sheet 1

38

of

45

Rev 1A

5

4

3

2

1

39 PR120 CZ@1/F_4

+5V_S5

D

D

PC213 CZ@1U/6.3V_4

PC103 CZ@1U/6.3V_4

39

CZ@10K/F_4 PC105 [email protected]/25V_6

33 UGATE_GFX2

[4] GFX_SVC

PR148

62771_SVC_GFX *shortCZ@0_4

PR149

62771_VRHOT_GFX 4 *shortCZ@0_4

3

SVC

UGATE_NB

32

PR252

CZ@10K/F_4

31

PR127

*shortCZ@0_4

1 G1 [4,33,34,38]

CORE_PWM_PROCHOT#

VR_HOT_L

BOOT_NB

+5V_S5

PHASE_GFX2

9

S1/D2

PC209 CZ@2200p/50V_4

PHASE_NB

PR257

PC97 CZ@10u/25V_8

PGOOD

34

PC100 CZ@10u/25V_8

LGATE_NB

PC206 [email protected]/25V_4

40

26 VDDP

25

37

38

VDD

ISUMN_NB

BOOT_GFX2

PGOOD_NB

2

20

VIN PR121 [email protected]/F_6

D1 D1 D1

GFX_PWRGD

ISUMP_NB

35

VSEN_NB

PR248 CZ@10K/F_4

[33] GFX_PWRGD

FB_NB

COMP_NB

36

+3V

PL12 [email protected]_7X7X4DCR=1mOhm 1 2

PHASE_GFX2

VDDCR_GFX

NTC_NB

PHASE1

NTC

UGATE1

IMON_NB

BOOT1

[email protected]/F_4

PR138

CZ@10K/F_4

22

UGATE_GFX1

VSUM-_GFX

PR259

CZ@1/F_4

21

BOOT_GFX1

7 6 5

Add 9 GND VIAs for thermal pad

VIN PR122 [email protected]/F_6

Close with inductor

PR246 phase1 CZ@10K/F_4_3435NTC

VSUM+_GFX

PR253

[email protected]/F_4

ISEN1_GFX

PR255

CZ@10K/F_4

VSUM-_GFX

PR279

CZ@1/F_4

VSUM-_GFX

[4] APU_VDDGFX_RUN_FB_H

OCP A

S2 S2 S2

7 6 5 PR133 CZ@475/F_4

Load line setting

PR123 [email protected]/F_4 PR134 CZ@11K/F_4

PC219 CZ@330p/50V_4

PC114 CZ@22n/25V_4

PR245 CZ@10_4 PR110 *shortCZ@0_4

PC110 [email protected]/10V_4

PR256 [email protected]/F_4

PQ49 CZ@AON6998

[4] APU_VDDGFX_RUN_FB_L PR109 *shortCZ@0_4 PR242 CZ@10_4

Parallel

RC time constant

VDDCR_GFX

+

+

PC81 *CZ@220u/2V_7343

LGATE_GFX1

3

ISEN1_GFX

PR254 CZ@2K/F_4

PC216 PR247 CZ@1000p/50V_4 CZ@300_4

PL13 [email protected]_7X7X4DCR=1mOhm 1 2

PC202 *CZ@330u/2V_5x4.2

PHASE_GFX1

PC197 CZ@10U/6.3V_4

9

S1/D2

4

PHASE_GFX1

PC221 [email protected]/25V_6

PC94 CZ@1n/50V_4

PR128 CZ@133K/F_4

B

PC210 CZ@2200p/50V_4

2

UGATE_GFX1 VSUM-_GFX

PC199 [email protected]/16V_4

PC225 [email protected]/25V_6

PC101 CZ@10u/25V_8

ISEN2_GFX PC106 [email protected]/25V_6

PC98 CZ@10u/25V_8

BOOT_GFX1

VSUM+_GFX

VDDCR_GFX

VDDCR_GFX TDC : 30A PEAK : 40A OCP : 56A Width : 1200mil Load Line = -2.1mV/A

41

8 G2 PC214 CZ@680p/50V_4

3

ISEN1_GFX

PR114 [email protected]/F_6

PC109 CZ@390p/50V_4

+

PR258 *CZ@10K/F_4

1 G1 PR249 CZ@200K/F_4

PR280 *CZ@10K/F_4 ISEN2_GFX

PC222 [email protected]/16V_4

A

PC217 [email protected]/50V_4

Quanta Computer Inc.

Close to the GPU side.

PROJECT : ZAB Size

Document Number

Rev 1A

VDDCR_GFX (ISL62771HRTZ) Date: 5

4

C

PC190 CZ@330u/2.5V_6X4.2

PR131

ISEN2_GFX

+

PC196 CZ@330u/2V_7343

VSUM+_GFX

PHASE_GFX1

PC198 CZ@10U/6.3V_4

LGATE_GFX1

23

PC200 [email protected]/16V_4

LGATE_GFX2

24

PC92 CZ@1n/50V_4

27

PQ48 CZ@AON6998

PR115 [email protected]/F_6

LGATE_GFX2 S2 S2 S2

PHASE_GFX2

ISEN2

ISEN1

UGATE_GFX2

28

12

ISUMP

13

29

PC207 [email protected]/25V_4

PC112 CZ@100p/50V_4

EP

8 G2

D1 D1 D1

62771_COMP_GFX

Place NTC close to the VDDCORE Hot-Spot. OCP=100'C

14

IMON

ISUMN

10 PC226 CZ@1000p/50V_4

PR268 CZ@133K/F_4

PC227 *[email protected]/16V_4

IMON_GFX

LGATE1

15

IMON_NB_GFX 2

PR270 CZ@100K/F_4

PR243

[email protected]/F_4

11

PWROK

BOOT_GFX2

30

ISUMN_GFX

Place NTC close to the VDDNB Hot-Spot. OCP=100'C

PR111 CZ@10K/F_4

B

PR244 CZ@470K_4_4700NTC

PR269 CZ@100K/F_4 PR272 CZ@100K/F_4

PR271 CZ@100K/F_4

NTC_GFX

LGATE2

RTN

NTC_NB_GFX 1

PHASE2

ENABLE

VSEN

8

62771_PWROK_GFX9 *shortCZ@0_4

17

62771_EN_GFX *shortCZ@0_4

PR142

UGATE2 PU7 CZ@ISL62771HRTZ-TS2775

SVT

62771_RTN_GFX

PR147

VDDIO

FB

APU_PWRGD_SVID_REG

7

62771_VSEN_GFX 16

[4,38]

62771_SVT_GFX *shortCZ@0_4

COMP

[5] VDDGFX_EN

62771_VDDIO_GFX 6 *shortCZ@0_4

PR146

BOOT2

18

PR267 *CZ@100K/F_4

PR145

SVD

19

VDD_18

[4] GFX_SVT

5

62771_FB_GFX

PR144

[4] GFX_SVD

62771_EN_GFX

62771_SVD_GFX *shortCZ@0_4

4

C

3

2

Saturday, March 05, 2016

Sheet 1

39

of

45

5

4

3

2

1

40

VIN +3VPCU

VDD_18_S5

VDD_18_S5

3

PD5 DA2J10100L

11

[33] HWPG_1.8VS5

PC178 *2200P/50V_4

VDD_18_S5 1.8 Volt +/- 5% TDC : 2A PEAK : 2.67A Width : 80mil

554FB_1.8V

R2

Vo=0.6*(R1+R2)/R2

PC65 *68P/50V_4

PR89 10K/F_4

TDC : 1.13A PEAK : 1.5A Width : 60mil

S5_ON

3

VL SYS_SHDN#

PR179 200K/F_4

PR177 1.2K/F_4

VDDCR_FCH_S5

PR233 10K/F_4_3435NTC

PC129 0.1u/25V_4

3

2.469V

1

2

+

3

[33] HWPG_0.775VS5 S5_ON

4

2

4 1

PC74 10U/6.3V_4 PR94 56/F_4

VCC PGD EN

PC82 *0.1u/16V_4

S5_ON

5

FB

PR96 47/F_4

Vout = (1+Rg/Rh)*0.5

2 PQ24 2N7002K

PU12A AS393MTR-E1

PC130 0.1u/25V_4

PR178 200K/F_4

PQ43 2N7002K

C

5 6

PR101 100/F_4 PC78 33n/10V_4

1

2

VDDCR_FCH_S5 0.775 Volt +/- 5% TDC : 0.68A PEAK : 0.9A Width : 40mil

Rg

6

DRV

2

PR105 *short_4

PC75 10U/6.3V_4

[12,33,35]

1

PU6 G9336TB1U

PC77 0.1u/16V_4

GND

PR104 100K/F_4 C

PC79 0.1u/16V_4

PR174 200K/F_4

-

3

+5VPCU

PC80 10U/6.3V_4

PR168 *short_6

Thermal Protection VL

PQ10 AO3404

2

PQ21 DTC144EU

(1) Need fine tune for thermal protect point (2) Note placement position (3) Thermal protection setting = 92'C

VDDP_0.95V_S5

+3V

PR92 20K/F_4

R1

554EN_1.8V

PC45 *0.1u/16V_4

3

6

3

EN

D

PQ20 AO3409

2

1

PG FB

PR76 *short_4

PR164 1M_6

PQ9 AO3404

8

4 PC64 1U/6.3V_4

5

S5_ON

PC68 *22P/50V_4

VDD_18

554PG_1.8V S5_ON

PR217 *2.2/F_6

SVIN

PR78 *short_4

[33,35,36]

2

PC186 22U/6.3V_6

3

8

3

PC187 0.1u/16V_4

1

LX

MAIND

2

NC

PC57 10U/6.3V_4 PR77 100K/F_4

LX

PL6 1uH_7X7X3 554LX_1.8V

1

7

+3V

PR86 10_4

PVIN

GND

PC54 0.01U/50V_4

NC

1

10 D

RT8068AZQW

PVIN

1

PU4

9

+

7

PU12B AS393MTR-E1

Rh

For EC control thermal protection (output 3.3V) +3VPCU

+3V

+1.5VSUS Reserve for +1.5V Wifi Card PC228 4.7U/6.3V_4

EN

GND

PL1

3

2.2uH/1.85A_2.5X2X1.2

PC179 *4.7U/6.3V_4 PR224 *100K/F_4

2

FB

PR285 22.6K/F_4

G5719BTB1U

PC123 10U/6.3V_4

PU15 [33] HWPG_1.5VSUS

6

R1 R2

Vo=(0.6(R1+R2)/R2)

PC120 *10U/6.3V_4

+3VPCU

+3V

PC125 0.1U/16V_4

[33,37]

PR221

SUSON

5

*0_4

PR211

1

*10K/F_4

PR286 15K/F_4

PG

+1.5VSUS JP13 *0.001/F_3720

4

1

10K/F_4 PC122 0.47uF/6.3V_2

PR153

LX

EN

LX

GND

PL3

3

1

B

2

*2.2uH/1.85A_2.5X2X1.2

2 PR219 *22.6K/F_4

FB

MAINON

PG

+1.5VSUS 1.5Volt +/- 5% TDC : 1.65A PEAK : 2.2A Width : 80mil

PC170 *0.1U/16V_4

*G5719BTB1U

6

B

5

*short_4

+1.5V 1.5Volt +/- 5% TDC : 0.57A PEAK : 0.76A Width : 40mil

PC176 *0.47uF/6.3V_2

PR278

VIN

PU9 [33] HWPG_1.5V

4

+1.5V

VIN

PR277 100K/F_4

R1 PC167 *10U/6.3V_4

PC164 *10U/6.3V_4

R2

Vo=(0.6(R1+R2)/R2) VIN

+3V

PR327 1M_6

VDD_18

+5V

PR186 22_8

PR185 *220_8

+2.5V

PR180 22_8

VDDP_0.95V

PR175 *22_8

VIN

PR189 22_8

PR196 1M_6

MAINON_ON_G

[36,37]

Thermal protection

3

3

3

3

3

MAIND

3

3

MAIND

PQ25 2N7002K

2

PQ23 *2N7002K

PQ28 2N7002K

PQ29 2N7002K

VL

PC150 *2200p/50V_4

PR901

5

*150/F_4

HYST=VCC for 10 degree Hys. HYST=GND for 30 degree Hys.

1

PQ26 *2N7002K

2

1

PQ27 2N7002K

2

1

2

1

PR325 *100K/F_6

PR902

*22K/F_4

PR903

*24K/F_4

PU901

2

1

MAINON

2

1

[32,33,35,37]

PQ57 DTC144EU

1

A

2

PR328 1M_6

PR220 *15K/F_4

VCC

PC901 *0.1U/16V_4

4

SET GND

HYST

OT#

1

A

2 3

Rset(Kohm)=0.0012T*T-0.9308T+96.147 SYS_SHDN#

*TMP708AIDBVR

Need fine tune for thermal protect point Note placement position TEMP=85'C

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

+1.8V/+0.775V/+1.5V/Thermal Date: 5

4

3

2

Friday, March 18, 2016

Sheet 1

40

of

45

5

4

3

2

1

41

Interface SVI2 R16M-M2-50 (37W)

+5V_S5

TDC : 45A PEAK : 60A OCP : 75A Width : 1600mil Load Line = -1mV/A

PR124 EV@1/F_4

EV@10K/F_4

PR130

*shortEV@0_4

62771_VRHOT_GPU *shortEV@0_4

4

PR161

62771_SVD_GPU *shortEV@0_4

5

VR_HOT_L

BOOT_NB

31

PL11 [email protected]_7X7X4 1 2

7

PR160

62771_EN_GPU *shortEV@0_4

8

VDDIO

62771_PWROK_GPU 9 *shortEV@0_4 [email protected]/16V_4

PR154 PC234

NTC_NB_GPU 1

LGATE2

PWROK

LGATE1

NTC_NB

PHASE1

NTC

UGATE1

IMON_NB

BOOT1

+5V_S5

LGATE_GPU2

4

BOOT_GPU2

1 2 3

30

PQ45 EV@AON6752

29

UGATE_GPU2

28

PHASE_GPU2

27

LGATE_GPU2

24

VSUM+_GPU PR292

[email protected]/F_4

ISEN2_GPU

EV@10K/F_4

PR295

VSUM-_GPU PR143

23 22

UGATE_GPU1

21

BOOT_GPU1

1

C

ISEN1_GPU

EV@1/F_4

PR125 [email protected]/F_6

ISEN2

PQ44 EV@AON6752

PC232 EV@330p/50V_4

[email protected]/F_4

Load line setting PR141 EV@634/F_4

PR266 EV@11K/F_4

PR137

PC230 EV@47n/16V_4

+VGPU_CORE

PC224 [email protected]/10V_4

VSUM+_GPU VSUM+_GPU PR282

[email protected]/F_4

ISEN1_GPU

EV@10K/F_4

PC104 EV@2200p/50V_4

+

4

PC192 EV@330u/2V_7343

PR132 EV@300_4

1 2 3

PC117 EV@1000p/50V_4

+

PC191 EV@330u/2V_7343

4

+VGPU_CORE

PC88 EV@10U/6.3V_4

LGATE_GPU1

PL10 DCR=1.1mOhm [email protected]_7X7X4 1 2

PC89 [email protected]/16V_4

PC119 [email protected]/25V_6 ISEN1_GPU

PR135 EV@2K/F_4

B

1 2 3 PHASE_GPU1 VSUM-_GPU

PR136 [email protected]/F_4

PC111 EV@680p/50V_4

PC102 EV@10u/25V_8

4

PQ46 EV@AON6414AL

PC121 [email protected]/25V_6

EV@220p/50V_4

PC113 EV@390p/50V_4

PC107 [email protected]/25V_6 UGATE_GPU1

ISEN2_GPU

PC203 EV@10u/25V_8

Add 9 GND VIAs for thermal pad

PC205 [email protected]/25V_4

BOOT_GPU1

5

ISEN1

41

12

ISUMP

13

ISUMN 15 ISUMN_GPU

EP

5

PC115 PR261 *EV@0_4

17

COMP 19

62771_COMP_GPU

RTN

IMON

14

10 PC233 EV@1000p/50V_4

PR287 EV@133K/F_4

PC235 *[email protected]/16V_4

Place NTC close to the VDDCORE Hot-Spot. OCP=100'C

PR239 EV@10_4 PR238 *shortEV@0_4

+

PR294 *EV@10K/F_4

LGATE_GPU1 PHASE_GPU1

+VGPU_CORE

VIN IMON_GPU PR290 EV@100K/F_4

PR107

[email protected]/F_4

11

IMON_NB_GPU 2

PHASE2

ENABLE

62771_RTN_GPU

Place NTC close to the VDDNB Hot-Spot. OCP=100'C

PR108 EV@10K/F_4

B

PR241 EV@470K_4_4700NTC

PR291 EV@100K/F_4 PR289 EV@100K/F_4

PR276 EV@100K/F_4

NTC_GPU

UGATE2 PU8 EV@ISL62771HRTZ-TS2775

SVT

VSEN

GPU_PG_EN

PR288 EV@100K/F_4

6

62771_SVT_GPU *shortEV@0_4

62771_VSEN_GPU 16

[42] 0.95_GFX_EN

62771_VDDIO_GPU *shortEV@0_4 *EV@0_4

PR159

FB

62771_EN_GPU

PR157 PR158

18

+1.8V_GFX +3V_GFX

[12] GPU_SVT_R

BOOT2

62771_FB_GPU

[11,12,14,42]

SVD

DCR=1mOhm PC193 *EV@330u/2V_7343

PR156

2

5

PQ47 EV@AON6414AL

C

[12] GPU_SVD_R

PC215 EV@2200p/50V_4

PR264

33 32

+

PC194 EV@10U/6.3V_4

3

5

62771_SVC_GPU *shortEV@0_4

PC99 PR119 EV@1n/[email protected]/F_6 3

[12] GPU_PWM_PROCHOT#

PR155

PC195 [email protected]/16V_4

UGATE_NB

PHASE_GPU2 [12] GPU_SVC_R

PC208 EV@10u/25V_8

SVC

4

4

PHASE_NB

UGATE_GPU2

PC204 EV@10u/25V_8

LGATE_NB

PGOOD

EV@10K/F_4

PC212 [email protected]/25V_4

PGOOD_NB

PR265

VIN

PC229 *EV@33U/25V_6x4.5

39

40

26

25

37

38

VDD

VDDP

PC108 [email protected]/25V_6

34

PC93 PR113 EV@1n/[email protected]/F_6 3

20

[42] GPU_PG_EN

PR126 [email protected]/F_6 BOOT_GPU2

1 2 3

35

ISUMP_NB

PR129 EV@10K/F_4

D

PC211 EV@1U/6.3V_4

VSEN_NB

COMP_NB

+3V_GFX

FB_NB

36

PC218 EV@1U/6.3V_4

ISUMN_NB

D

PR262 [email protected]/F_4 PR283

PR152 *EV@10K/F_4

Close with phase1 inductor

VSUM-_GPU PR151

EV@1/F_4

ISEN2_GPU

PR240 EV@10K/F_4_3435NTC VSUM-_GPU

[14] GPUVDDC_SENSE A

A

OCP [14] GPUVSS_SENSE

RC time constant

PR237 *shortEV@0_4 PR275 EV@10_4

Parallel

PC118 [email protected]/16V_4

PC223 [email protected]/50V_4

Quanta Computer Inc. PROJECT : ZAB Size

Close to the GPU side.

Rev 1A

+VGPU CORE (SL62771HRTZ) Date:

5

Document Number

4

3

2

Saturday, March 05, 2016

Sheet 1

41

of

45

4

3

2

+PCIE_VDDC_GFX

EV@RT8068AZQW PL7 EV@1uH_7X7X3

10 PR85 EV@10_4

8 4

PC58 EV@10U/6.3V_4 PC63 EV@1U/6.3V_4 PR79 EV@10K/F_4 PR81 *shortEV@0_4 554PG_0.95V

PVIN

LX LX

PR80 *[email protected]/F_6

PC67 *EV@22P/50V_4

6 PC50 *EV@2200P/50V_4

R1

R2

PR82 *shortEV@0_4

TDC : 0.04A PEAK : 0.05A Width : 20mil

+3V_GFX

VIN

+1.8V_GFX

PR218 EV@22_8

VDD_18_S5

PR222 EV@1M_6

PR225 EV@22_8

1.8GFXD

1 PC180 EV@2200p/50V_4 PQ42 EV@2N7002K

C

+1.8V_GFX

1

PQ41 EV@2N7002K

1

1

PQ37 EV@AO3404

2

PQ39 EV@2N7002K

2

3

2

PQ40 EV@2N7002K

1

PQ19 EV@2N7002K

2

1

PC95 [email protected]/10V_4

3

3 PR228 EV@1M_6

0.95_GFX_EN 2

2

EV@20K/F_4

PR117 *EV@100K/F_6

+3V_GFX

PR227 EV@1M_6

3 PR118

PR88 EV@11K/F_4

EV@100K/F_4

PR112 *EV@10K/F_4

[5] DGPU_PWREN

+0.95V 0.95 Volt +/- 5% TDC : 1.58A PEAK : 2.1A Width : 80mil

3

PR116

PR93 [email protected]/F_4

VIN

3

PC91 [email protected]/16V_4

CZ : DNI CZL: mount

D

PC62 *EV@68P/50V_4

2

PC96 *[email protected]/16V_4

+3V

V0=0.6*(R1+R2)/R2

PC56 *[email protected]/16V_4

PQ18 EV@AO3413 1

+3V

PQ8 *EV@MDV1528Q

554FB_0.95V

554EN_0.95V

+3V_GFX

C

3

NC

11

[41] 0.95_GFX_EN

4

PC185 PC184 [email protected]/16V_4 EV@22U/6.3V_6

+PCIE_VDDC_GFX

PG EN

1.8GFXD

2

SVIN FB

5

554LX_0.95V

1

7

D

NC

GND

PC55 [email protected]/50V_4 +3V_GFX

PVIN

3 2 1

PU5

9

42

VDDP_0.95V_S5

+0.95V 0.95 Volt +/- 5% TDC : 1.58A PEAK : 2.1A Width : 80mil

5

+3VPCU

1

3

5

TDC : 0.38A PEAK : 0.5A Width : 20mil

CZ : 0.22uF(CH4222K9B04) CZL: 0.1uF (CH4103K1B08)

CZ : 20K (CS32002FB29) CZL: 10K (CS31002FB26)

VIN PU2003

24

Fsw=550KHz

VCC PR2044 [email protected]/F_4

EV@G5335QT2U

G5335-PWRGD 1

PGOOD LX LX LX LX LX LX

+5VPCU PR2048 PR2049

*EV@0_4 G5335-PFM 3

*shortEV@0_4

PFM

PC2051 [email protected]/25V_4

10 G5335-LX 11 16 17 18 25 PR2050 *[email protected]_6

Pulse-Skipping mode

[41] GPU_PG_EN

GPU_PG_EN

PR2052

G5335-EN

*shortEV@0_4

2

EN PGND PGND PGND

G5335-AGND

PGND 23

R1 PR2051 EV@10K/F_4

PC2060 *EV@1000P/50V_4

PC2061 *EV@680p/50V_6

PC2062 *[email protected]/16V_4

G5335-SS

B

PL2003 [email protected]_7X7X3 1 2

PC2059 [email protected]/16V_4

PR2046 [email protected]/F_6

[5] PE_PWRGD

G5335-AGND

+1.5V_GFX

20 G5335-BST

PC2058 *EV@22U/6.3V_6

BST PR2047 *shortEV@0_4

B

PC2050 *[email protected]/25V_4

G5335-TON

PC2057 *EV@22U/6.3V_6

PR2045 EV@100K/F_4

6

PC2056 EV@22U/6.3V_6

TON

+1.5V_GFX 1.5 Volt +/- 5% TDC : 3.66A PEAK : 4.88A Width : 160mil

PC2055 EV@22U/6.3V_6

PC2049 EV@10U/6.3V_4

+3V_GFX

22

PC2054 EV@22U/6.3V_6

IN

9

PC2048 EV@10u/25V_8

21

IN

PC2053 EV@22U/6.3V_6

G5335-VCC

NC

PC2052 EV@22U/6.3V_6

PR2043 EV@10_4

PC2047 EV@2200p/50V_4

IN +5VPCU

PC2046 *[email protected]/25V_4

IN

7

8

PGND

12 13

R2

14 15

Vo=0.8*(R1+R2)/R2 =1.5V

PR2053 EV@11K/F_4

19

SS AGND

PC2063 [email protected]/16V_4

FB

G5335-AGND

4

5

VFB=0.8V

G5335-FB

PR2054

A

G5335-AGND

G5335-AGND

*shortEV@0_4

A

G5335-AGND

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

GPU_POWER/VDDC_GFX Date: 5

4

3

2

Saturday, March 05, 2016

Sheet 1

42

of

45

5

4

3

2

1

43

For Type 1 & 3 D

D

VDDCR_FCH_S5

VDDCR_NB

PR97 1M_6

3 PR102 *0_4

PR103 1K/F_4

PQ12 2N7002K

1

PC83 *0.1u/16V_4

3

VDDCR_FCH_ALW 0.775~1.2 Volt +/- 5% TDC : 0.15A PEAK : 0.2A Width : 20mil

COMP_OUT1

1

-

1

VDDCR_FCH_ALW

PU16A AS393MTR-E1 +5V_S5

VDDCR_FCH_S5

FCH_PC

PQ14 AO3416

PR106 *short_6

PQ17 AO3416

2

1

PR95 100K/F_4

PC76 *0.1u/16V_4

PR100 1K/F_4 PR99 *0_4

5 6

+

1

1

PC84 *0.1u/16V_4

3

2

3 PQ11 2N7002K

2

[5] APU_S5_MUX_CTRL

+

PQ15 AO3416

C

1

3

C

2

4

2

PQ13 AO3416

3

3

PR98 100K/F_4

VDDCR_NB

2

VIN

8

+3V_S5

+5V_S5

2

+5V_S5

PC87 0.1u/16V_4

7

-

PU16B AS393MTR-E1

PC86 22u/6.3V_6

PC85 22u/6.3V_6

COMP_OUT1 B

B

A

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

VDDCR_FCH_ALW Date: 5

4

3

2

Saturday, March 05, 2016

Sheet

43 1

of

45

A

5

4

3

2

1

Model

MODEL

REV

ZAB M/B

A

Change List

Page

B

From

To

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

2015-11-03 Change DP to VGA IC from IT6516 to RTD2166 (cost) First Release

D

ZAB M/B

2015-xx-xx Add

C

B

D

C

B

A

A

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

CHANGE LIST Date: 5

4

3

2

Friday, January 29, 2016

Sheet 1

44

of

45

5

4

3

2

1

D

D

C

C

B

B

A

Quanta Computer Inc. PROJECT : ZAB Size

Document Number

Rev 1A

POWER STATUS Date: 5

4

3

Friday, January 29, 2016 2

Sheet

45

of 1

45

A