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BL6 Block Diagram WWW.ROSEFIX.COM

PCB STACK UP LAYER 1 : TOP

LAYER 2 : GND LAYER 3 : IN1 LAYER 4 : IN2

USB-0

LAYER 5 : VCC LAYER 6 : BOT

EXT_LVDS EXT_CRT EXT_HDMI

VGA P15,16,17,18,19, 20,21,22

DDRIII-SODIMM1 DDRIII-SODIMM2

SATA - HDD P26

PCI-E x16

rPGA 989 P3, 4, 5, 6 FDI

DMI

P26

P14

B

3G

USB-10

CK505

P24

SATA PCI-E

SATA 5

P2

PCI-Express

P25

USB-4

SIM Card

POWER SYSTEM ISL88731 P.34 ISL82882C P.39 RT8210B P.35 UPI6116A P.37 UP6163 P.36 UPI6111A P.38 MAX8792A P.41 RT8152C P.42

PCIE-5

WLAN

P24

P25

HDMI Con.

PCIE-3 DMI

SATA 1

ESATA Con.

INT_HDMI

P23

P14

SATA 0 FDI

USB-13

HDMI Level Shift

PCI-E

CRT Con.

DMI(x4)

SATA - ODD

ESATA Re-driver

INT_CRT

PCI-E Graphics Interfaces

Dual Channel DDR III 800/1066/1333 MHZ

DDR SYSTEM MEMORY

P12,13

B

INT_LVDS

Arrandale (UMA+VGA)

A

LCD/CCD Con. P23

SWITCH CIRCUIT

A

USB-5

Ibex Peak-M USB-2

Bluetooth Con.

P24

USB 2.0 (Port0~13) USB

P31

PCH

USB-8

USB Con.

P7, 8, 9, 10, 11

P31

PCIE-6 USB-9

USB Con.

Giga/10/100 Lan

RTC

P28

P31

+VCC_CORE

C

C

BATTERY USB-3

Cardreader

+1.5V +1.5VSUS

P7

P29

Azalia

IHDA LPC

NVRAM

+VTT +1.05V

NVRAM Con P33

Cardreader Con. P29 3 IN 1

LPC

+1.8V

Audio Codec

P30

Port-A

Port-B

P27

FAN D

MIC JACK

MDC Con. P27

+1.5V_S5 +3VPCU +3V_S5 +3V +5VPCU +5V_S5 +5V +SMDDR_VTERM +SMDDR_VREF +VGPU_CORE +VAXG

EC

P27

HP

K/B Con.

HALL Sensor

SPI Flash

SPK Con. P27

P27

P3

P31

P23

P30

Touch Pad /B Con.

Power /B Con.

P31

P31

D

Quanta Computer Inc. PROJECT : BL6 Size

Document Number

Rev A1A

Block Diagram Date: 1

2

3

4

5

6

7

Wednesday, April 07, 2010

Sheet 8

1

of

45

5

4

3

2

WWW.ROSEFIX.COM

1

CLOCK Gen +3V

+1.05V

250mA(20mils)

L20

PBY160808T-601Y-N_1A

+VDDIO_CLK

80mA(20mils)

+3V_CK505_VDD

L43

D

C798 10U/6.3V_8X

C480 0.1U/10V_4X

C485 0.1U/10V_4X

U29 R302 *0_6

+1.5V

5 29

150mA(20mils) L39

R632

2.2_6

+1.5V_CK505_VDD

1 17 24

PBY160808T-601Y-N_1A C827 10U/6.3V_8X

C

CLK_PCH_14M

{8} CLK_PCH_14M

C483 0.1U/10V_4X

R289

C797 0.1U/10V_4X

C829 0.1U/10V_4X

XTAL_OUT XTAL_IN

33_4

C479

27 28

VDD_27 VDD_REF

REF_0/CPU_SEL

CGDAT_SMB CGCLK_SMB

31 32

SDA SCL

2 8 9 12 21 26

VSS_DOT VSS_27 VSS_SATA VSS_SRC VSS_CPU VSS_REF

33

GND

C826

C831

*10U/6.3V_8X

10U/6.3V_8X

0.1U/10V_4X

0.1U/10V_4X

15 18

C3A RP15

DOT_96 DOT_96#

CLK_BUF_DREFCLKP_R CLK_BUF_DREFCLKN_R

27M 27M_SS

6 7

CLK_VGA_27M_R CLK_VGA_27M#_R

SRC_1/SATA SRC_1#/SATA# SRC_2 SRC_2#

10 11 13 14

CLK_BUF_DREFSSCLKP_R CLK_BUF_DREFSSCLKN_R CLK_BUF_PCIE_3GPLLP_R CLK_BUF_PCIE_3GPLLN_R

*CPU_STOP#

16

ICS_CPU_STOP#

CPU_1 CPU_1# CPU_0 CPU_0#

20 19 23 22

CLK_BUF_BCLK1_P_R CLK_BUF_BCLK1_N_R CLK_BUF_BCLKP_R CLK_BUF_BCLKN_R

CKPW RGD/PD#

25

XTAL_OUT XTAL_IN

30

C844

3 4

VDD_DOT_1.5 VDD_SRC_1.5 VDD_CPU_1.5

CPU_SEL

*10P/50V_4C

VDD_SRC_I/O VDD_CPU_I/O

PBY160808T-601Y-N_1A D

C841

1 *SHORT_4P2R 3

2 4

R326 R329 RP19 RP20

CLK_BUF_DREFCLKP CLK_BUF_DREFCLKN

*EV@33_4 EV@33_4

JTAG need Option2 for Park,Madison Engineer sample.

B2A R722

1 *SHORT_4P2R 3 1 *SHORT_4P2R 3

2 4 2 4

CLK_BUF_DREFSSCLKP CLK_BUF_DREFSSCLKN CLK_BUF_PCIE_3GPLLP CLK_BUF_PCIE_3GPLLN

C3A R332

{8} {8}

27M_CLK {16}

10K_4

*EV@33_4

JTAG_TCK {16}

{8} {8} {8} {8}

+3V

TP81 TP82

C

C3A RP16

4 2

3 *SHORT_4P2R 1

CLK_BUF_BCLKP CLK_BUF_BCLKN

{8} {8}

VR_PWRGD_CLKEN

SLG8LV595VTR

CLK CRYSTAL

CLK CPU_SEL

CLK POWERGOOD

CLK I2C

Change to +3VPCU (follow CRB)

B

B

+3V +3V +3VPCU

R291

1K/F_4

VR_PWRGD_CLKEN

3

R288 *10K_4

2

CPU_SEL

1

{39} VR_PWRGD_CK505#

10K_4

2N7002_200MA

XTAL_OUT

14.318MHZ_30

{8,24,28,33} SDATA

R626

C790

3

1

CGDAT_SMB {12,13,24}

C791 10K_4

33P/50V_4N

R292 100K/F_4

Q25

2

1

XTAL_IN

2

R675 Y5

Q59 2N7002_200MA

33P/50V_4N

R679 10K_4

2

+3V A

A

0 CPU_SEL

1

{8,24,28,33} SCLK

3

CPU =133MHz CPU=100MHz (default)

1

Quanta Computer Inc.

CGCLK_SMB {12,13,24}

PROJECT : BL6

Q60 2N7002_200MA Size

Document Number

Rev A1A

CLOCK GENERATOR Date: 5

4

3

2

Thursday, April 08, 2010

Sheet 1

2

of

45

1

2

3

4

5

6

WWW.ROSEFIX.COM

7

8

U15A

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

B24 D23 B23 A22

{9} {9} {9} {9}

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

D24 G24 F23 H23

{9} {9} {9} {9}

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

D25 F24 E23 G23

FDI_TXN[7:0]

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

FDI_TXP[7:0]

{9} {9}

FDI_FSYNC0 FDI_FSYNC1

{9}

FDI_INT

{9} {9}

FDI_LSYNC0 FDI_LSYNC1

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

E22 D21 D19 D18 G21 E19 F21 G18 D22 C21 D20 C18 G22 E20 F20 G19

FDI_FSYNC0 FDI_FSYNC1

F17 E17

FDI_INT

C17

FDI_LSYNC0 FDI_LSYNC1

F18 D17

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3]

DMI

DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3] DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]

FDI_TX#[0] FDI_TX#[1] FDI_TX#[2] FDI_TX#[3] FDI_TX#[4] FDI_TX#[5] FDI_TX#[6] FDI_TX#[7] FDI_TX[0] FDI_TX[1] FDI_TX[2] FDI_TX[3] FDI_TX[4] FDI_TX[5] FDI_TX[6] FDI_TX[7] FDI_FSYNC[0] FDI_FSYNC[1]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

FDI_INT FDI_LSYNC[0] FDI_LSYNC[1]

B

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15] PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

B26 PEG_COMP A26 B27 A25 PEG_RBIAS K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

PEG_RXN15 PEG_RXN14 PEG_RXN13 PEG_RXN12 PEG_RXN11 PEG_RXN10 PEG_RXN9 PEG_RXN8 PEG_RXN7 PEG_RXN6 PEG_RXN5 PEG_RXN4 PEG_RXN3 PEG_RXN2 PEG_RXN1 PEG_RXN0

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

PEG_RXP15 PEG_RXP14 PEG_RXP13 PEG_RXP12 PEG_RXP11 PEG_RXP10 PEG_RXP9 PEG_RXP8 PEG_RXP7 PEG_RXP6 PEG_RXP5 PEG_RXP4 PEG_RXP3 PEG_RXP2 PEG_RXP1 PEG_RXP0

R370 R369

49.9/F_4 750/F_4

PEG_RXN[0..15] {15}

20/F_4 20/F_4 49.9/F_4 49.9/F_4

H_COMP3 AT23 H_COMP2 AT24 H_COMP1 G16 H_COMP0 AT26 AH24

TP3 H_CATERR# {10}

H_PECI

AK14 AT15 AN26 AK15

H_PROCHOT#_D CPU_PM_THRMTRIP#

COMP3 COMP2 COMP1 COMP0 SKTOCC#

{10,33} H_PWRGOOD

AP26 AL15 AN14 AN27 AK13

PM_DRAM_PWRGD

AM26

{33} H_PWRGD_XDP H_VTTPWRGD R38 1.5K/F_4 CPU_PLTRST#

{9,24,28,29,30} PLTRST#

R39

AM15 AL14

RESET_OBS# PM_SYNC VCCPWRGOOD_1 VCCPWRGOOD_0 SM_DRAMPWROK

PR222

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

PEG_TXN15_C PEG_TXN14_C PEG_TXN13_C PEG_TXN12_C PEG_TXN11_C PEG_TXN10_C PEG_TXN9_C PEG_TXN8_C PEG_TXN7_C PEG_TXN6_C PEG_TXN5_C PEG_TXN4_C PEG_TXN3_C PEG_TXN2_C PEG_TXN1_C PEG_TXN0_C

C624 C617 C614 C607 C597 C589 C586 C584 C582 C579 C577 C575 C573 C571 C569 C567

[email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X

PEG_TXN15 PEG_TXN14 PEG_TXN13 PEG_TXN12 PEG_TXN11 PEG_TXN10 PEG_TXN9 PEG_TXN8 PEG_TXN7 PEG_TXN6 PEG_TXN5 PEG_TXN4 PEG_TXN3 PEG_TXN2 PEG_TXN1 PEG_TXN0

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

PEG_TXP15_C PEG_TXP14_C PEG_TXP13_C PEG_TXP12_C PEG_TXP11_C PEG_TXP10_C PEG_TXP9_C PEG_TXP8_C PEG_TXP7_C PEG_TXP6_C PEG_TXP5_C PEG_TXP4_C PEG_TXP3_C PEG_TXP2_C PEG_TXP1_C PEG_TXP0_C

C623 C616 C613 C608 C590 C587 C585 C583 C581 C578 C576 C574 C572 C570 C568 C566

[email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X [email protected]/10V_4X

PEG_TXP15 PEG_TXP14 PEG_TXP13 PEG_TXP12 PEG_TXP11 PEG_TXP10 PEG_TXP9 PEG_TXP8 PEG_TXP7 PEG_TXP6 PEG_TXP5 PEG_TXP4 PEG_TXP3 PEG_TXP2 PEG_TXP1 PEG_TXP0

MAINON

PRDY# PREQ# TCK

XDP_OBS0 AJ22 XDP_OBS1 AK22 XDP_OBS2 AK24 XDP_OBS3 AJ24 XDP_OBS4 AJ25 XDP_OBS5 AH22 XDP_OBS6 AK23 XDP_OBS7 AH23

JTAG & BPM

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TRST# TDI TDO TDI_M TDO_M

AT28 AP27 AN28

XDP_PREQ# XDP_TCLK

AP28

XDP_TMS

AT27

XDP_TRST#

AT29 AR27 AR29 AP29

XDP_TDI_R XDP_TDO_R XDP_TDI_M XDP_TDO_M

XDP_TCLK

R53

*51/F_4

H_CATERR# R34 H_CPURST#_R R99

49.9/F_4 *68_4

XDP_TMS XDP_TDI_R XDP_PREQ#

*51/F_4 *51/F_4 *51/F_4

R60 R92 R64

XDP_TDI_R XDP_TDO_M

R72 R59

0_4 *0_4

XDP_PRDY# {33} XDP_PREQ# {33} XDP_TCLK {33} XDP_TMS {33} XDP_TRST# {33}

{11,30,37,38,40}

+VTT

XDP_TDI {33} XDP_TDO {33}

XDP_TDO

R40

XDP_TRST# R73 R95

*0_4 0_4

STUFF -> Ra, Rc, Re NO STUFF -> Rb, Rd

R10

C37

*100K_4

0.1U/10V_4X

CPU Only

STUFF -> Ra, Rb NO STUFF -> Rc, Rd, Re

GMCH Only

STUFF -> Rd, Re NO STUFF -> Ra, Rb, Rc

H_PROCHOT#_D

0_4

Thermal Trip

3

Scan Chain (Default)

R41

{39} H_PROCHOT#

R93 51/F_4

R22 1K/F_4

+VTT R21 *0_4

2

1

Q10

2

{9,39} DELAY_VR_PWRGOOD

2N7002_200MA 1

Discrete only

+3V

+1.5V_CPUVDDQ_PG R70

HWPG

C

*SHORT_4 5

3

{30}

FDI_INT

R16

EV@1K_4

R12

EV@1K_4 FDI_FSYNC0

+VTT

R17

EV@1K_4 FDI_FSYNC1

R15

EV@1K_4 FDI_LSYNC0

R13

EV@1K_4 FDI_LSYNC1

R107

R106

1K_4

100K_4

2 PR241

*0_4

4

C3A

S3_Reduce {30}

R63 *SHORT_4

MAINON_ON_G {5,12,40,41}

HWPG_1

R48

2K/F_4

H_VTTPWRGD

1

U2 R58

{9,30} MPWROK

R101

1 TC7SH08FU(F)

*0_4

R46

1

FDI_FSYNC can gang all these 4 signals together and tie them with only one 1K resistor to GND ( Check list 1.0 ).

*0_4

B2A

Q12 MMBT3904-7-F_200MA

*56.2/F_4 CPU_PM_THRMTRIP#

R61 1K/F_4

3

3

PM_EXTTS#0 {12} PM_EXTTS#1 {13}

68_4

XDP_TDI_M XDP_TDO_R

+3V_S5

SYS_SHDN#

3

R100

0_4

SYS_SHDN# {16,35}

PM_THRMTRIP#

PM_THRMTRIP# {10}

CPU FAN CTRL +3V_S5 R412 10K_4

R410 10K_4

+3V

+3V_S5 +3V

D3A

3

5

10K_4

1.5K/F_4

R422

0_4 PM_DRAM_PWRGD

3

+1.5VSUS 3

2

C23

2.2U/6.3V_6X

2

CPUFAN#_ON_R_1 3 2N7002_200MA

1

PM_DRAM_PWRGD {9} {10,30} TEMP_ALERT#

TC7SH08FU(F)

TEMP_ALERT#

1 Q35

R421

VFAN1

+3V

1

E3A

R634 *3K/F_4

VO GND /FON GND GND VSET GND

3 5 6 7 8

{30}

CN12

FANSIG1

FANSIG1

TH_FAN_POWER1

1 2 3

C551

C550

C552

10U/6.3V_8X

0.01U/25V_4X

*0.01U/25V_4X

85205-0300L

D

FANPWR = 1.6*VSET

PM_DRAM_PWRGD

PM_DRAM_PWRGD: Never drive hight before DDR3 voltage ramp to stable

4

VIN

G995P1U

R645 *1.1K/F_4 2

1

{30}

750/F_4

Q38 FDV301N_200MA

40mils

U14

2

R419

1

Q39 2N7002_200MA

10K_4

+5V

U17 4

2

R368

3mA(40mils)

R403 +1.5V_CPUVDDQ_PG 2

1K_4

+VTT

5

2

2

R404

10K_4

D3A

1

D

+VTT

R97

B

R66 0_4

+1.5VSUS

for S3 power reduction

4

C

+1.5V_CPUVDDQ

100/F_4 24.9/F_4 130/F_4 10K_4

Processor hot

DDR3_DRAMRST#_C

PQ49 DMN601K-7_300MA

EV@0_4

R407 R408 R409 R98

SYS_RESET# {9,33}

JTAG MAPPING

+VTT

BSS138_NL_0.22MA

TC7SH08FU(F)

A

CLK_DREFSSCLKP {8} CLK_DREFSSCLKN {8}

AN25

DBR#

PEG_TXP[0..15] {15}

+3V_S5

PR227 100K_4 1 2

4 *IV@0X2 2

PZ98927-3641-41F

B2A PU12

R372 3 1

AN15 PM_EXT_TS#0 AP15 PM_EXT_TS#1

PM_EXT_TS#[0] PM_EXT_TS#[1]

PWR MANAGEMENT

CLK_CPU_BCLK_ITP {33} CLK_CPU_BCLK_ITP# {33} CLK_PCIE_3GPLLP {8} CLK_PCIE_3GPLLN {8}

EV@0_4

DDR3_DRAMRST#_C

AL1 SM_RCOMP_0 AM1 SM_RCOMP_1 AN1 SM_RCOMP_2

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

VTTPWRGOOD RSTIN#

DDR3_DRAMRST# {12,13}

*0_6

F6

SM_DRAMRST#

DDR3 MISC

TAPPWRGOOD

Q1 S3_1.5V

R374

A18 CLK_DREFSSCLKP_R A17 CLK_DREFSSCLKN_R

DPLL_REF_SSCLK DPLL_REF_SSCLK#

TMS {33} XDP_OBS[0:7]

Change from Page36

S3_1.5V

E16 D16

PEG_CLK CLOCKS PEG_CLK#

THERMAL

CLK_CPU_BCLKP {10} CLK_CPU_BCLKN {10}

AR30 AT30

BCLK_ITP BCLK_ITP#

CATERR# PECI PROCHOT# THERMTRIP#

750/F_4

PEG_TXN[0..15] {15}

{10} DDR3_DRAMRST#_PCH

{36}

A16 B16

BCLK BCLK#

MISC

R373 H_CPURST#_R

{33} H_CPURST#_R {9} PM_SYNC

PEG_RXP[0..15] {15}

PZ98927-3641-41F

C3A

U15B

R57 R56 R20 R76

3

{9} {9} {9} {9}

PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RBIAS

DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]

2

{9}

A24 C23 B22 A21

Intel(R) FDI

{9}

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

PCI EXPRESS -- GRAPHICS

A

{9} {9} {9} {9}

{22} VGA_THERM#

1 Q65

B2A 3 EV@2N7002_200MA

Quanta Computer Inc. PROJECT :BL6 Size

Document Number

PROCESSER 1/4(HOST&PEX) Date: 1

2

3

4

5

6

7

Saturday, April 10, 2010

Sheet 8

3

of

Rev A1A 45

1

2

3

4

5

6

7

8

WWW.ROSEFIX.COM

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

A

A

{13} M_B_DQ[63:0]

B

C

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_CK[0] SA_CK#[0] SA_CKE[0]

AA6 AA7 P7

M_A_CLKP0 {12} M_A_CLKN0 {12} M_A_CKE0 {12}

SA_CK[1] SA_CK#[1] SA_CKE[1]

Y6 Y5 P6

M_A_CLKP1 {12} M_A_CLKN1 {12} M_A_CKE1 {12}

SA_CS#[0] SA_CS#[1]

AE2 AE8

M_A_CS#0 {12} M_A_CS#1 {12}

SA_ODT[0] SA_ODT[1]

AD8 AF9

M_A_ODT0 {12} M_A_ODT1 {12} M_A_DM[7:0] {12}

SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7] SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

M_A_DM0 B9 D7 M_A_DM1 H7 M_A_DM2 M7 M_A_DM3 AG6 M_A_DM4 AM7 M_A_DM5 AN10 M_A_DM6 AN13 M_A_DM7 M_A_DQSN0 C9 M_A_DQSN1 F8 M_A_DQSN2 J9 M_A_DQSN3 N9 AH7 M_A_DQSN4 AK9 M_A_DQSN5 AP11 M_A_DQSN6 AT13 M_A_DQSN7

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

C8 M_A_DQSP0 M_A_DQSP1 F9 H9 M_A_DQSP2 M9 M_A_DQSP3 AH8 M_A_DQSP4 AK10 M_A_DQSP5 AN11 M_A_DQSP6 AR13 M_A_DQSP7

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQSN[7:0]

M_A_DQSP[7:0]

U15D M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

{12}

{12}

M_A_A[15:0] {12}

B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G4 H6 G2 J6 J3 G1 G5 J2 J1 J5 K2 L3 M1 K5 K4 M4 N5 AF3 AG1 AJ3 AK1 AG4 AG3 AJ4 AH4 AK3 AK4 AM6 AN2 AK5 AK2 AM4 AM3 AP3 AN5 AT4 AN6 AN4 AN3 AT5 AT6 AN7 AP6 AP8 AT9 AT7 AP9 AR10 AT10

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

{12} {12} {12}

M_A_BS#0 M_A_BS#1 M_A_BS#2

AC3 AB2 U7

SA_BS[0] SA_BS[1] SA_BS[2]

{13} {13} {13}

M_B_BS#0 M_B_BS#1 M_B_BS#2

AB1 W5 R7

SB_BS[0] SB_BS[1] SB_BS[2]

{12} {12} {12}

M_A_CAS# M_A_RAS# M_A_WE#

AE1 AB3 AE9

SA_CAS# SA_RAS# SA_W E#

{13} {13} {13}

M_B_CAS# M_B_RAS# M_B_WE#

AC5 Y7 AC6

SB_CAS# SB_RAS# SB_W E#

PZ98927-3641-41F

DDR SYSTEM MEMORY B

M_A_DQ0 A10 M_A_DQ1 C10 M_A_DQ2 C7 M_A_DQ3 A7 M_A_DQ4 B10 M_A_DQ5 D10 M_A_DQ6 E10 M_A_DQ7 A8 M_A_DQ8 D8 M_A_DQ9 F10 M_A_DQ10 E6 M_A_DQ11 F7 M_A_DQ12 E9 M_A_DQ13 B7 M_A_DQ14 E7 M_A_DQ15 C6 M_A_DQ16 H10 M_A_DQ17 G8 M_A_DQ18 K7 M_A_DQ19 J8 M_A_DQ20 G7 M_A_DQ21 G10 M_A_DQ22 J7 M_A_DQ23 J10 M_A_DQ24 L7 M_A_DQ25 M6 M_A_DQ26 M8 M_A_DQ27 L9 M_A_DQ28 L6 M_A_DQ29 K8 M_A_DQ30 N8 M_A_DQ31 P9 M_A_DQ32 AH5 M_A_DQ33 AF5 M_A_DQ34 AK6 M_A_DQ35 AK7 M_A_DQ36 AF6 M_A_DQ37 AG5 M_A_DQ38 AJ7 M_A_DQ39 AJ6 M_A_DQ40 AJ10 M_A_DQ41 AJ9 M_A_DQ42 AL10 M_A_DQ43 AK12 M_A_DQ44 AK8 M_A_DQ45 AL7 M_A_DQ46 AK11 M_A_DQ47 AL8 M_A_DQ48 AN8 M_A_DQ49 AM10 M_A_DQ50 AR11 M_A_DQ51 AL11 M_A_DQ52 AM9 M_A_DQ53 AN9 M_A_DQ54 AT11 M_A_DQ55 AP12 M_A_DQ56 AM12 M_A_DQ57 AN12 M_A_DQ58 AM13 M_A_DQ59 AT14 M_A_DQ60 AT12 M_A_DQ61 AL13 M_A_DQ62 AR14 M_A_DQ63 AP14

DDR SYSTEM MEMORY A

U15C

{12} M_A_DQ[63:0]

SB_CK[0] SB_CK#[0] SB_CKE[0]

W8 W9 M3

M_B_CLKP0 {13} M_B_CLKN0 {13} M_B_CKE0 {13}

SB_CK[1] SB_CK#[1] SB_CKE[1]

V7 V6 M2

M_B_CLKP1 {13} M_B_CLKN1 {13} M_B_CKE1 {13}

SB_CS#[0] SB_CS#[1]

AB8 AD6

M_B_CS#0 {13} M_B_CS#1 {13}

SB_ODT[0] SB_ODT[1]

AC7 AD1

SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]

D4 E1 H3 K1 AH1 AL2 AR4 AT8

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_ODT0 {13} M_B_ODT1 {13} M_B_DM[7:0] {13}

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

D5 F4 J4 L4 AH2 AL4 AR5 AR8

M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

C5 E3 H4 M5 AG2 AL5 AP5 AR7

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQSN[7:0]

{13}

B

M_B_DQSP[7:0]

{13}

M_B_A[15:0] {13}

C

PZ98927-3641-41F

D

D

Quanta Computer Inc. PROJECT : BL6 Size

Document Number

Rev A1A

PROCESSER 2/4(DDR) Date: 1

2

3

4

5

6

Saturday, April 10, 2010 7

Sheet

4 8

of

45

5

WWW.ROSEFIX.COM C93

10U/6.3V_8X

C103

10U/6.3V_8X

C603

10U/6.3V_8X

C604

10U/6.3V_8X

C554

10U/6.3V_8X

C116

10U/6.3V_8X

C601

10U/6.3V_8X

C111

10U/6.3V_8X

C113

10U/6.3V_8X

C69

10U/6.3V_8X

B

10U/6.3V_8X

C117

10U/6.3V_8X

C120

*0.1U/10V_4X

C118

*0.1U/10V_4X

C72

*0.047U/10V_4X

C73

*0.047U/10V_4X

C74

*0.047U/10V_4X

C

C40

10U/6.3V_8X

C36

10U/6.3V_8X

C564

10U/6.3V_8X

C556

10U/6.3V_8X

C558

10U/6.3V_8X

C560

10U/6.3V_8X

C565

*10U/6.3V_8X

C562

*10U/6.3V_8X

D

AF10 AE10 C82 AC10 AB10 C91 Y10 W10 U10 T10 J12 J11 J16 +VTT_43 J15 +VTT_44

10U/6.3V_8X

C30

10U/6.3V_8X

C622

10U/6.3V_8X

C58

10U/6.3V_8X

C612

+VAXG

C555

*330U/2V_7343P_E9c

IV@10U/6.3V_8X

C620

IV@10U/6.3V_8X

C645

*IV@330U/2V_7343P_E9c

C648

*IV@330U/2V_7343P_E9c

R78

EV@0_8

10U/6.3V_8X +VTT

(15mils) R18 R19

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] PROC_DPRSLPVR

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 ICH_DPRSTP#

H_VID0 {39} H_VID1 {39} H_VID2 {39} H_VID3 {39} H_VID4 {39} H_VID5 {39} H_VID6 {39} ICH_DPRSTP#

{39}

G15

10U/6.3V_8X

J24 J23 H25

VTT1_45 VTT1_46 VTT1_47

K26 J27 J26 J25 H27 G28 G27 G26 F26 E26 E25

VTT1_48 VTT1_49 VTT1_50 VTT1_51 VTT1_52 VTT1_53 VTT1_54 VTT1_55 VTT1_56 VTT1_57 VTT1_58

ISENSE

ISENSE

R376

100/F_4

R380

100/F_4

AJ34 AJ35

10U/6.3V_8X

C563

10U/6.3V_8X

C559

10U/6.3V_8X

C100

10U/6.3V_8X

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]

AM22 AP22 AN22 AP23 AM23 AP24 AN24

GFXVR_VID_0 GFXVR_VID_1 GFXVR_VID_2 GFXVR_VID_3 GFXVR_VID_4 GFXVR_VID_5 GFXVR_VID_6

GFX_VR_EN GFX_DPRSLPVR GFX_IMON

AR25 AT25 AM24

GFXVR_EN {42} GFXVR_DPRSLPVR GFXVR_IMON {42}

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

VTT0_59 VTT0_60 VTT0_61 VTT0_62 VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68

P10 N10 L10 K10 J22 J20 J18 H21 H20 H19

VCCPLL1 VCCPLL2 VCCPLL3

L26 L27 M26

+VTT

{39}

TP52 TP51 +VCC_CORE VCCSENSE {39} VSSSENSE {39}

H_VID0

R384 R382

1K_4 *1K_4

H_VID1

R383 R381

1K_4 *1K_4

H_VID2

R385 R388

1K_4 *1K_4

H_VID3

R386 R389

*1K_4 1K_4

H_VID4

R393 R395

*1K_4 1K_4

H_VID5

R405 R400

1K_4 *1K_4

H_VID6

R394 R396

*1K_4 1K_4

ICH_DPRSTP#

R417 R414

1K_4 *1K_4

PSI#

R406 R401

*1K_4 1K_4

VCC_AXG_SENSE VSS_AXG_SENSE

C54 C63 C65 C57 C46 C50 C41

{42} {42}

{42} {42} {42} {42} {42} {42} {42}

A

{42}

EV@1K_4

+1.5V_CPUVDDQ

1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 4.7U/6.3V_6X 4.7U/6.3V_6X 4.7U/6.3V_6X

C3A B

+VTT C600

10U/6.3V_8X

C605

10U/6.3V_8X

C594

10U/6.3V_8X

C593

*10U/6.3V_8X

C61

10U/6.3V_8X

for S3 power reduction +1.5V_CPUVDDQ

R23 220_8

+1.8V

C130

4.7U/6.3V_6X

C60

2.2U/6.3V_6X

C129

1U/6.3V_4X

C596

1U/6.3V_4X

PZ98927-3641-41F

VID Default Setting VID[6:0]=[0100111]

TP1

VTT_SENSE TP_VSS_SENSE_VTT

C29

{39}

H_VTTVID1=Low, 1.1V H_VTTVID1=High, 1.05V

B15 A15

10U/6.3V_8X

C595

+VTT

AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34

AN35

C105

AR22 AT22

R65

*SHORT_4 *SHORT_4

C3A PSI#

VCC_SENSE VSS_SENSE

IV@10U/6.3V_8X

C621

10U/6.3V_8X

PSI#

ISENSE

C619

+VTT

AN33

VTT_SENSE VSS_SENSE_VTT

IV@10U/6.3V_8X

10U/6.3V_8X

PSI#

VTT_SELECT

C618

PEG & DMI

C611

VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44

C598

FDI

10U/6.3V_8X

10U/6.3V_8X

+

C553

C35

+

10U/6.3V_8X

CPU CORE SUPPLY

C610

10U/6.3V_8X

VAXG_SENSE VSSAXG_SENSE

3

10U/6.3V_8X

10U/6.3V_8X

C28

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36

{3,12,40,41}

C

Q2 DMN601K-7_300MA

+1.5VSUS

+15V

R35 *100K_4

{35,36,40}

MAIND

MAIND

4

C126 0.01U/25V_4X

Q3 AO4466_9.4A

+1.5V_CPUVDDQ

HFM_VID : Max 1.4V LFM_VID : Min 0.65V

+VCC_CORE

2

MAINON_ON_G

1

C609

10U/6.3V_8X

C592

8

5 6 7 8

10U/6.3V_8X

C606

7

3 2 1

C114

10U/6.3V_8X

SENSE LINES

10U/6.3V_8X

C615

GRAPHICS VIDs

10U/6.3V_8X

C70

AT21 AT19 AT18 AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16 AL21 AL19 AL18 AL16 AK21 AK19 AK18 AK16 AJ21 AJ19 AJ18 AJ16 AH21 AH19 AH18 AH16

+VTT

- 1.5V RAILS

C76

AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

1.8V

10U/6.3V_8X

VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8 VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32

+

C602

1.1V RAIL POWER

10U/6.3V_8X

POWER

C38

CPU VIDS

10U/6.3V_8X

SENSE LINES

10U/6.3V_8X

C39

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100

GRAPHICS

C71

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26

6

U15G

18A

U15F

+VCC_CORE

A

4

POWER

3

DDR3

2

1.1V

1

D

6A/maximum

PZ98927-3641-41F C84

Quanta Computer Inc.

C101

+

C3A

+ *330U/2V_7343P_E9c

*330U/2V_7343P_E9c

PROJECT : BL6

C3A Size

Document Number

Rev A1A

PROCESSER 3/4(POWER) Date: 1

2

3

4

5

6

7

Saturday, April 10, 2010

Sheet

5 8

of

45

1

2

3

4

5

6

7

8

WWW.ROSEFIX.COM

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)

B

C

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

K27 K9 K6 K3 J32 J30 J21 J19 H35 H32 H28 H26 H24 H22 H18 H15 H13 H11 H8 H5 H2 G34 G31 G20 G9 G6 G3 F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11 E8 E5 E2 D33 D30 D26 D9 D6 D3 C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11 B8 B6 B4 A29 A27 A23 A9

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W 35 W 34 W 33 W 32 W 31 W 30 W 29 W 28 W 27 W 26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

R411 R371 R43

AT35 AT1 AR34 B34 B2 B1 A35

*0_4 *0_4 *0_4

VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233

U15E

J17 H17

{12} DDR_VREF_DQ0 {13} DDR_VREF_DQ1 CFG0 CFG3 CFG4 CFG7

TP2

VSS

VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7

R14 R11

*0_4 TP_RSVD17_R *0_4 TP_RSVD18_R

SA_DIMM_VREF SB_DIMM_VREF

AM30 AM28 AP31 AL32 AL30 AM31 AN29 AM32 AK32 AK31 AK28 AJ28 AN30 AN32 AJ32 AJ29 AJ30 AK30 H16

CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD_TP_86

AP25 AL25 AL24 AL22 AJ33 AG9 M27 L28

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8

G25 G17 E31 E30 B19 A19 A20 B20 U9 T9

RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20

AC9 AB9 C1 A3 J29 J28 A34 A33 C35

RSVD21 RSVD22 RSVD_NCTF_23 RSVD_NCTF_24 RSVD26 RSVD27 RSVD_NCTF_28 RSVD_NCTF_29 RSVD_NCTF_30

B35 AJ13 AJ12 AH25 AK26 AL26 AR2 AJ26 AJ27 AP1

RSVD_NCTF_31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36 RSVD_NCTF_37 RSVD38 RSVD39 RSVD_NCTF_40

RSVD_NCTF_41 RSVD_NCTF_42 RSVD_NCTF_43 RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50

AT2 AT3 AR1 AL28 AL29 AP30 AP32 AL27 AT31

RSVD51 RSVD52 RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57 RSVD58 RSVD_TP_59 RSVD_TP_60

AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32 E15 F15

RESERVED

A

AT20 AT17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12 AR9 AR6 AR3 AP20 AP17 AP13 AP10 AP7 AP4 AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11 AM8 AM5 AM2 AL34 AL31 AL23 AL20 AL17 AL12 AL9 AL6 AL3 AK29 AK27 AK25 AK20 AK17 AJ31 AJ23 AJ20 AJ17 AJ14 AJ11 AJ8 AJ5 AJ2 AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13 AH9 AH6 AH3 AG10 AF8 AF4 AF2 AE35

AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

U15I

A

KEY RSVD62 RSVD63 RSVD64 RSVD65 RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70

A2 D15 C15 AJ15 RSVD64_R AH15 RSVD65_R AA5 AA4 R8 AD3 AD2

RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75 RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80

AA2 AA1 R9 AG7 AE3 V4 V5 N2 AD5 AD7

RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85

W3 W2 N3 AE5 AD9

VSS

R50 R51

*0_4 *0_4

B

AP34

TP53

C

PZ98927-3641-41F

NCTF

U15H

PZ98927-3641-41F PZ98927-3641-41F

Processor Strapping 1 CFG4 (Display Port Presence)

D

The Clarkfield processor's PCI Express interface may not meet PCI Express 2.0 jitter specifications. Intel recommends placing a 3.01K +/- 5% pull down resistor to VSS on CFG[7] pin for both rPGA and BGA components. This pull down resistor should be removed when this issue is fixed.

CFG0 (PCI-Epress Configuration Select) CFG3 (PCI-Epress Static Lane Reversal)

0

Disabled; No Physical Display Port attached to Embedded Diplay Port

Single PEG Normal Operation

Enabled; An external Display port device is connected to the Embedded Display port

2

3

4

R52

*3.01K/F_4

CFG3

R47

3.01K/F_4

CFG4

R45

*3.01K/F_4

CFG7

R49

*3.01K/F_4

Bifurcation enabled Lane Numbers Reversed 15 -> 0 , 14 -> 1

D

Quanta Computer Inc. PROJECT : BL6 Size

Document Number

Rev 1A

PROCESSER 4/4 (GND) Date:

1

CFG0

5

6

Saturday, April 10, 2010 7

Sheet

6 8

of

45

4

5

6

WWW.ROSEFIX.COM

18P/50V_4C

C803

RTC_X1 RTC_X2

18P/50V_4C

R642

+RTC_CELL

1M_4

RTC_RST#

C14

SRTC_RST#

D17

SM_INTRUDER# PCH_INVRMEN

{10} PCH_INVRMEN

ACZ_BITCLK ACZ_SYNC {10,27} PCBEEP

B13 D13

ACZ_RST#

{27} ACZ_SDIN0_AUDIO TP45 ACZ_SDOUT {10,30} PCH_GPIO33

A16 A14

A30 D29 P1 C30 G30 F30 E32 F32 B29 H32 J30

TP48 PCH_JTAG_TCK_BUF

M3

{33} PCH_JTAG_TMS

PCH_JTAG_TMS

K3

{33} PCH_JTAG_TDI

PCH_JTAG_TDI

K1

{33} PCH_JTAG_TDO

PCH_JTAG_TDO

J2

PCH_JTAG_RST#

J4

{33} PCH_JTAG_TCK

{33} PCH_JTAG_RST#

Ibex-M 1 OF 10

RTCX1 RTCX2

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3 FWH4 / LFRAME# LDRQ0# LDRQ1# / GPIO23 SERIRQ

LPC

RTCRST#

RTC

SRTCRST#

(+3V)

INTRUDER# SATA0RXN SATA0RXP SATA0TXN SATA0TXP

INTVRMEN

HDA_BCLK HDA_SYNC SPKR HDA_RST# HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3 HDA_SDO HDA_DOCK_EN# / GPIO33 HDA_DOCK_RST# / GPIO13

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

IHDA

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

(+3V) (+3V_S5)

SATA

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

JTAG_TCK SATA4RXN SATA4RXP SATA4TXN SATA4TXP

JTAG_TMS

JTAG

JTAG_TDI JTAG_TDO

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

TRST#

D33 B33 C32 A32 C34 A34 F34 AB9

{24,30} {24,30} {24,30} {24,30}

LFRAME#

{24,30}

LDRQ#1

{24}

+3V

{23} INT_LVDS_BLON {23} INT_LVDS_DIGON {23} INT_LVDS_PWM

R229 10K_4

{23} INT_LVDS_EDIDCLK {23} INT_LVDS_EDIDDATA R233 R234

+3V SERIRQ

SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0

{26} {26} {26} {26}

AH6 AH5 AH9 AH8

SATA_RXN1 SATA_RXP1 SATA_TXN1 SATA_TXP1

{26} {26} {26} {26}

TP24

HDD ODD

{23} INT_TXLCLKOUT{23} INT_TXLCLKOUT+ {23} INT_TXLOUT0{23} INT_TXLOUT1{23} INT_TXLOUT2-

AF11 AF9 AF7 AF6

{23} INT_TXLOUT0+ {23} INT_TXLOUT1+ {23} INT_TXLOUT2+

STAT2/SATA3 HM55 not support

AD9 AD8 AD6 AD5

TP34 TP30 TP29 TP33

TP12 {10}

SPI_SI_R

BA2

SPI_CS0#_R

AV3

SPI_CS1#

AY3

SPI_SI_R

AY1

SPI_SO_R

AV1

SPI_CLK

SATAICOMPO

SPI_CS0#

SATAICOMPI

SPI

SPI_CS1#

SATALED#

AD3 AD1 AB3 AB1

SATA_RXN5 SATA_RXP5 SATA_TXN5 SATA_TXP5

{25} {25} {25} {25}

SPI_MOSI

(+3V) (+3V_S5)

SPI_MISO

SATA0GP / GPIO21 SATA1GP / GPIO19

SATA_COMP

R220

37.4/F_4

SATA_LED#

T3

GPIO21 GPIO19

Y9 V1

+1.05V SATA_LED#

R237 R587

T48 T47

INT_LVDS_PWM

Y48

INT_LVDS_EDIDCLK INT_LVDS_EDIDDATA

AB48 Y45

L_CTRL_CLK L_CTRL_DATA

AB46 V48

LVDS_IBG LVDS_VBG

AP39 AP41

LVDS_VREFH LVDS_VREFL

AT43 AT42

INT_TXLCLKOUTINT_TXLCLKOUT+

AV53 AV51

INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2-

BB47 BA52 AY48 AV47

INT_TXLOUT0+ INT_TXLOUT1+ INT_TXLOUT2+

BB48 BA50 AY49 AV48 AP48 AP47

10K_4 10K_4

TP66 TP22 TP68

AY53 AT49 AU52 AT53

TP67 TP23 TP17

AY51 AT48 AU50 AT51

ESATA

AF16 AF15

INT_LVDS_BLON INT_LVDS_DIGON

TP26 TP25

B

SPI_CLK_R

IV@10K_4 IV@10K_4

{24,30}

AK7 AK6 AK11 AK9

AH3 AH1 AF3 AF1

8

U24D LAD0 LAD1 LAD2 LAD3

U24A

10M_4 3 4

32.768KHZ_10

INT_CRT_BLU INT_CRT_GRN INT_CRT_RED

{23} INT_CRT_BLU {23} INT_CRT_GRN {23} INT_CRT_RED

{32}

{23} INT_CRT_DDCCLK {23} INT_CRT_DDCDAT +3V +3V

R604 R611

{23} INT_HSYNC {23} INT_VSYNC

IbexPeak-M_Rev1_0

AA52 AB53 AD53

INT_CRT_DDCCLK INT_CRT_DDCDAT

R227

IV@0_4 IV@0_4

INT_HSYNC_R INT_VSYNC_R

1K/D_4

DAC_IREF

V51 V53 Y53 Y51 AD48 AB51

B2A

Ibex-M 4 OF 10

L_BKLTEN L_VDD_EN

SDVO_TVCLKINN SDVO_TVCLKINP

L_BKLTCTL

SDVO_STALLN SDVO_STALLP

L_DDC_CLK L_DDC_DATA

SDVO_INTN SDVO_INTP

SDVO

L_CTRL_CLK L_CTRL_DATA

SDVO_CTRLCLK SDVO_CTRLDATA

LVD_IBG LVD_VBG LVD_VREFH LVD_VREFL

LVDS--A LVDSA_CLK# LVDSA_CLK LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3 LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDS--B LVDSB_CLK# LVDSB_CLK LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3 LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3 CRT_BLUE CRT_GREEN CRT_RED

CRT

CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_VSYNC

DDPB_AUXN DDPB_AUXP DDPB_HPD

DISPLAY PORT B

R636

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P DDPC_CTRLCLK DDPC_CTRLDATA

DISPLAY PORT C

Y6

7

IBEX PEAK-M (LVDS,DDI)

IBEX PEAK-M (HDA,JTAG,SATA)

2 1

C804

A

3

Digital Display Interface

2

DDPC_AUXN DDPC_AUXP DDPC_HPD DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P DDPD_CTRLCLK DDPD_CTRLDATA

DISPLAY PORT D

1

DDPD_AUXN DDPD_AUXP DDPD_HPD DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

DAC_IREF CRT_IRTN

BJ46 BG46 BJ48 BG48

A

BF45 BH45 T51 T53 BG44 BJ44 AU38 BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38 Y49 AB49

TP31 TP32

BE44 BD44 AV40

TP13 TP7 TP9

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

TP57 TP54 TP10 TP8 TP58 TP62 TP56 TP60

U50 U52

SDVO_CTRLCLK {14} SDVO_CTRLDATA {14}

BC46 BD46 AT38

DDPD_AUXN DDPD_AUXP

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

C_TMDSD_DATA2# C_TMDSD_DATA2 C_TMDSD_DATA1# C_TMDSD_DATA1 C_TMDSD_DATA0# C_TMDSD_DATA0 C_TMDSD_CLK# C_TMDSD_CLK

R175 R174

B

IV@10K_4 IV@10K_4

+3V Port-D_HPD

{14}

IbexPeak-M_Rev1_0

Port

Strap

RTC BATTERY

+3VPCU

+RTC_CELL

(20mils) D21

(30mils)

CH501H-40PT_100MA

(20mils)

C

R_3VRTC

How to enable Port?

L_DDC_DATA

LVDS

How to disable Port?

PU to 3.3V with 2.2k+/- 5%

NC

Port B SDVO_CTRLDATA PU to 3.3V with 2.2k+/- 5%

NC

Port C DDPC_CTRLDATA PU to 3.3V with 2.2k+/- 5%

NC

Port D DDPD_CTRLDATA PU to 3.3V with 2.2k+/- 5%

NC C

D20

eDP

CH501H-40PT_100MA

CFG[4]

NC

PD to GND directly

C530 1U/10V_6X R352

HDMI

1K_4 RTC_N02

(20mils) 1 3

R349

1.91K/F_4

R350

(20mils)

1.91K/F_4

+5VPCU

R203

LVDS_VREFH LVDS_VREFL

IV@0_4

2

Q28 MMBT3904-7-F_200MA

R351

CN25 2 1

6.8K/F_4

R201

For IV@ 2.37K/F For EV@ NC

LVDS_IBG

[email protected]/F_4

(20mils)

2 1

RTC_N03

R348

R601 R597 R585

D

RESET JUMP

ACZ_RST#

{27} ACZ_RST#_AUDIO

R637

0_4

{27} ACZ_SDOUT_AUDIO

R640

0_4 ACZ_SDOUT

{27} ACZ_SYNC_AUDIO

R639

0_4

{27} BIT_CLK_AUDIO

R638

ACZ_SYNC

+RTC_CELL

An RC delay circuit with a time delay in the range of 18 ms to 25 ms should be provided

E3A R336

C821

C_TMDSD_DATA2 C_TMDSD_DATA2#

C715 C709

[email protected]/10V_4X [email protected]/10V_4X

TMDSD_DATA2 TMDSD_DATA2#

C_TMDSD_DATA1 C_TMDSD_DATA1#

C721 C712

[email protected]/10V_4X [email protected]/10V_4X

TMDSD_DATA1 TMDSD_DATA1#

C_TMDSD_DATA0 C_TMDSD_DATA0#

C722 C710

[email protected]/10V_4X [email protected]/10V_4X

TMDSD_DATA0 TMDSD_DATA0#

C_TMDSD_CLK C_TMDSD_CLK#

C349 C361

[email protected]/10V_4X [email protected]/10V_4X

TMDSD_CLK TMDSD_CLK#

TMDSD_DATA2 {14} TMDSD_DATA2# {14} TMDSD_DATA1 {14} TMDSD_DATA1# {14} TMDSD_DATA0 {14} TMDSD_DATA0# {14}

15K/F_4

AAA-BAT-046-K03

For AUDIO

For IV@ 0ohm For EV@ NC

IV@150/F_4 IV@150/F_4 IV@150/F_4

INT_CRT_BLU INT_CRT_GRN INT_CRT_RED

For IV@ Connect to 150ohm/F EV@ NC

4M byte SPI ROM

PCH

RTC_RST#

20K_6 C513

G1

1U/6.3V_4X

*SHORT_ PAD

SPI_SO_R

R542

0_4

SPI_SO

SPI_SI_R

R466

0_4

SPI_SI

5

SPI_CLK_R

R465

0_4

SPI_CLK

6

SPI_CS0#_R R510

0_4

SPI_CS0#

1

+1.05V R606

*51/F_4 PCH_JTAG_TMS

R609

*51/F_4 PCH_JTAG_RST#

R607

*51/F_4 PCH_JTAG_TDI

C514

G2

R608

*51/F_4 PCH_JTAG_TDO

1U/6.3V_4X

*SHORT_ PAD

8MB

4MB

HM55

U21

+RTC_CELL

2MB

PM55

33_4 ACZ_BITCLK *10P/50V_4C

TMDSD_CLK {14} TMDSD_CLK# {14}

2

SO

VDD

SI

HOLD

SCK

WP

CE

VSS

8

D

+3V

7

SPI_HOLD#

R471

3.3K/F_4

3

SPI_WP#

R526

3.3K/F_4

HM57/PM57 QM57/QS57

4 0.1U/10V_4X

C739

W25Q32BVSSIG R337

SRTC_RST#

20K_6

Quanta Computer Inc.

B2A

PROJECT : BL6 Size

R605

51/F_4 PCH_JTAG_TCK

Rev A1A

PCH 1/5 (SATA,HDA,LPC) Date:

1

Document Number

2

3

4

5

6

7

Saturday, April 10, 2010

Sheet

7 8

of

45

5

4

3

2

1

WWW.ROSEFIX.COM

IBEX PEAK-M (GND)

B

A

IBEX PEAK-M (PCI-E,SMBUS,CLK)

3G

{24} {24} {24} {24}

PCIE_RXN3 PCIE_RXP3 PCIE_TXN3 PCIE_TXP3

TP63 TP61 TP55 TP59

BG30 BJ30 BF29 BH29

PERN1 PERP1 PETN1 PETP1

TP19 TP16 TP14 TP11

AW 30 BA30 BC30 BD30

PERN2 PERP2 PETN2 PETP2

AU30 AT30 AU32 AV32

PERN3 PERP3 PETN3 PETP3

PCIE_RXN3 PCIE_RXP3 *[email protected]/10V_4X PCIE_TXN3_C *[email protected]/10V_4X PCIE_TXP3_C

C364 C365

B2A {24} {24} WLAN{24} {24}

PCIE_RXN5 PCIE_RXP5 PCIE_TXN5 PCIE_TXP5

C343 C342

{28} {28}

PCIE_RXN6 PCIE_RXP6 PCIE_TXN6 PCIE_TXP6

C379 C378

LAN{28}

{28}

0.1U/10V_4X 0.1U/10V_4X

0.1U/10V_4X 0.1U/10V_4X

CL_DATA1

T11

CL_DATA1

CL_RST1#

T9

CL_RST#1

PERN6 PERP6 PETN6 PETP6

Controller Link

PCI-E*

(+3V_S5)PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P CLKOUT_DMI_N CLKOUT_DMI_P

U4

PCIE_CLK_REQ3#

A8 AM51 AM53

{24} CLK_PCIE_3G# {24} CLK_PCIE_3G PCIE_CLK_REQ4#

M9 AJ50 AJ52

{24} CLK_PCIE_MINI# {24} CLK_PCIE_MINI PCIE_CLK_RQ5# TP70 TP71 PCIE_CLK_REQB#

H6 AK53 AK51 P13

1

{2,24,28,33} {2,24,28,33}

3

2ND_MBDATA {30}

Q15 2N7002_200MA +3V_S5

1

CL_CLK1 {24}

3

2ND_MBCLK {30}

Q13 2N7002_200MA

CL_DATA1 {24} CL_RST#1 {24}

+3V

PCIE_CLK_REQ1#

N4

SCLK SDATA

PEG

PCIECLKRQ0# / GPIO73 (+3V_S5) CLKOUT_PCIE1N CLKOUT_PCIE1P

AM47 AM48

MBDATA2

MBCLK2

P9 AM43 AM45

AH42 AH41

{24} PCIE_CLK_RQ5#

CL_CLK1

PCIE_CLK_REQ0# TP21 TP27

TP74 TP87

PCIE_CLK_REQ2#

{24} PCIE_CLK_REQ4#

T13

PERN8 PERP8 PETN8 PETP8 CLKOUT_PCIE0N CLKOUT_PCIE0P

{28} CLK_PCIE_LAN# {28} CLK_PCIE_LAN {28} PCIE_CLK_REQ3#

CL_CLK1

BG34 BJ34 BG36 BJ36 AK48 AK47

TP28 TP20

WLAN

PCIE_RXN6 BA34 PCIE_RXP6 AW 34 PCIE_TXN6_C BC34 PCIE_TXP6_C BD34

B9 H14 C8 J14 C6 G8 M14 E10 G12

(+3V_S5)

PERN4 PERP4 PETN4 PETP4 PERN5 PERP5 PETN5 PETP5

D

SMBALERT# / GPIO11 SMBCLK SMBDATA (+3V_S5) SML0ALERT# / GPIO60 SML0CLK SML0DATA (+3V_S5) SML1ALERT# / GPIO74 SML1CLK / GPIO58 (+3V_S5) (+3V_S5) SML1DATA / GPIO75

SMBALERT# SCLK SDATA SMBL0ALERT# SMB_CLK_ME0 SMB_DATA_ME0 SML1ALERT# MBCLK2 MBDATA2

PERN7 PERP7 PETN7 PETP7

B2A

3G

PCIE_RXN5 BF33 PCIE_RXP5 BH33 PCIE_TXN5_C BG32 PCIE_TXP5_C BJ32

SMBus

AT34 AU34 AU36 AV36

PCIE7/PCIE8 HM55 not support

LAN

BA32 BB32 BD32 BE32

C3A Ibex-M 2 OF 10

2

+3V_S5

U24B

2

H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W 52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14

PCIECLKRQ1# / GPIO18

CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P

R588 R600

10K_4 10K_4 C

(+3V)

(+3V)

PCIECLKRQ3# / GPIO25 (+3V_S5) CLKOUT_PCIE4N CLKOUT_PCIE4P

CLKOUT_PCIE5N CLKOUT_PCIE5P

(+3V_S5)

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

CLK_DREFSSCLKN CLK_DREFSSCLKP

{3} {3}

CLK_BUF_PCIE_3GPLLN CLK_BUF_PCIE_3GPLLP

CLKIN_BCLK_N CLKIN_BCLK_P

AP3 AP1

CLK_BUF_BCLKN {2} CLK_BUF_BCLKP {2}

CLKIN_DOT_96N CLKIN_DOT_96P

F18 E18

CLK_BUF_DREFCLKN CLK_BUF_DREFCLKP

AH13 AH12

CLK_BUF_DREFSSCLKN CLK_BUF_DREFSSCLKP

REFCLK14IN

P41

CLK_PCH_14M {2}

CLKIN_PCILOOPBACK

J42

SMBALERT# SCLK SDATA SMBL0ALERT# SMB_CLK_ME0 SMB_DATA_ME0 SML1ALERT# MBCLK2 MBDATA2

{2} {2}

R650 R311 R654 R300 R631 R623 R310 R299 R313

10K_4 2.2K_4 2.2K_4 10K_4 2.2K_4 2.2K_4 10K_4 2.2K_4 2.2K_4

{2} {2} +3V_S5

CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P

XTAL25_IN XTAL25_OUT

PCIECLKRQ4# / GPIO26 (+3V_S5)

AT1 AT3 AW 24 BA24

CLKIN_DMI_N CLKIN_DMI_P

CLKOUT_PCIE3N CLKOUT_PCIE3P

PCIECLKRQ5# / GPIO44

PCIE_CLK_REQ1# PCIE_CLK_REQ2#

CLK_PCIE_VGA# {15} CLK_PCIE_VGA {15} CLK_PCIE_3GPLLN {3} CLK_PCIE_3GPLLP {3}

+3V_S5

CLKOUT_PCIE2N CLKOUT_PCIE2P PCIECLKRQ2# / GPIO20

H1 PEG_CLKREQ# AD43 AD45 AN4 AN2

XCLK_RCOMP

(+3V) CLKOUTFLEX0 / GPIO64 (+3V) CLKOUTFLEX1 / GPIO65 (+3V) CLKOUTFLEX2 / GPIO66 (+3V) CLKOUTFLEX3 / GPIO67

Clock Flex

CLK_PCI_FB

CLK_PCI_FB

{2} {2}

B2A

{9}

AH51 XTAL25_IN AH53 XTAL25_OUT AF38 XCLK_RCOMP T45 P43 T42 N50

CLK_FLEX0 CLK_FLEX1 CLK_FLEX2 CLK_FLEX3

R226 R235 T34 T33 R257

90.9/F_4 +1.05V 10K_4 22_4

PCIE_CLK_REQ0#

R309

10K_4

PCIE_CLK_REQ3#

R653

*10K_4

PCIE_CLK_REQ4# PCIE_CLK_REQB# PCIE_CLK_RQ5#

R276 R301 R619

10K_4 10K_4 10K_4

PEG_CLKREQ#

R615

IV@10K_4

PEG_CLKREQ#

R610

EV@10K_4

B

+3V 48M_CARD {29}

48M_Card Reserve for cardreader 48MHZ

Placement close

PEG_B_CLKRQ# / GPIO56(+3V_S5) R560

EV@0_4

C749

IV@27P/50V_4N

IbexPeak-M_Rev1_0 XTAL25_IN

2

C

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366]

Y4 R552 IV@1M/F_4

1

D

VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258]

From CLK BUFFER

U24I

AY7 B11 B15 B19 B23 B31 B35 B39 B43 B47 B7 BG12 BB12 BB16 BB20 BB24 BB30 BB34 BB38 BB42 BB49 BB5 BC10 BC14 BC18 BC2 BC22 BC32 BC36 BC40 BC44 BC52 BH9 BD48 BD49 BD5 BE12 BE16 BE20 BE24 BE30 BE34 BE38 BE42 BE46 BE48 BE50 BE6 BE8 BF3 BF49 BF51 BG18 BG24 BG4 BG50 BH11 BH15 BH19 BH23 BH31 BH35 BH39 BH43 BH47 BH7 C12 C50 D51 E12 E16 E20 E24 E30 E34 E38 E42 E46 E48 E6 E8 F49 F5 G10 G14 G18 G2 G22 G32 G36 G40 G44 G52 AF39 H16 H20 H30 H34 H38 H42

XTAL25_OUT

IV@25MHZ_30 C747

IV@27P/50V_4N

B2A

A

IbexPeak-M_Rev1_0

Quanta Computer Inc. PROJECT : BL6 Size

Document Number

Rev A1A

PCH 2/5 (PCIE, SMBUS, CK) Date: 5

4

3

2

Saturday, April 10, 2010

Sheet 1

8

of

45

1

2

3

4

5

6

WWW.ROSEFIX.COM

7

8

IBEX PEAK-M (DMI,FDI,GPIO) U24C

IBEX PEAK-M (PCI,USB,NVRAM) A

U24E

{10} {10}

GNT0# GNT1#

{10}

GNT3#

C/BE0# C/BE1# C/BE2# C/BE3#

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

G38 H51 B37 A44

PIRQA# PIRQB# PIRQC# PIRQD#

REQ0# REQ1# REQ2# REQ3#

F51 A46 B45 M53

REQ0# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54

F48 K45 F36 H53

GNT0# GNT1# / GPIO51 (+3V) GNT2# / GPIO53 (+3V) GNT3# / GPIO55 (+3V)

PIRQE# PIRQF# PIRQG# PIRQH#

C

+3V

R652

B41 K53 A36 A48

8.2K_4 PCI_SERR# PCI_PERR# PCI_IRDY#

K6 E44 E50

PCI_PLOCK#

D49

PLOCK#

TP41

M7 PLT_RST-R#

R261 22_4 PCLK_DEBUG_R TP76 TP39 CLK_PCI_FB R263 22_4 R259 22_4

{8} CLK_PCI_FB {30} PCLK_591

D5 N52 P53 P46 P51 P48

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

NV_ALE NV_CLE

BD3 AY6

NV_RCOMP

AU2

NV_RB#

AV7

NV_W R#0_RE# NV_W R#1_RE#

AY8 AY5

NV_W E#_CK0 NV_W E#_CK1

NV_ALE

NV_RCOMP R520

BD24 BG22 BA20 BG20

DMI0RXP DMI1RXP DMI2RXP DMI3RXP

{3} {3} {3} {3}

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

BE22 BF21 BD20 BE18

DMI0TXN DMI1TXN DMI2TXN DMI3TXN

{3} {3} {3} {3}

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

BD22 BH21 BC20 BD18

DMI0TXP DMI1TXP DMI2TXP DMI3TXP

BH25 BF25

DMI_ZCOMP DMI_IRCOMP

T6 M6 B17 K5

SYS_RESET# SYS_PW ROK PW ROK MEPW ROK

+1.05V

R483

49.9/F_4 DMI_COMP

+3V

R432

1K_4

{3,33} SYS_RESET# NV_ALE

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

SYS_PWROK {10}

R273 R262 R270

C3A {3} PM_DRAM_PWRGD {30} RSMRST#

*32.4/F_4

*SHORT_4 *SHORT_4 *SHORT_4

DNBSWON# PM_RI# PCIE_WAKE#

{24,28} PCIE_WAKE# {3} PM_SYNC

AV11 BF5

FDI

{3} {3} {3} {3} {3} {3} {3} {3}

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

BB18 BF17 BC16 BG16 AW 16 BD14 BB14 BD12

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

{3} {3} {3} {3} {3} {3} {3} {3}

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

BJ14 BF13 BH13 BJ12 BG14

FDI_INT {3} FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

System Power Management

RSV_ICH_LAN_RST# A10 D9 RSMRST# C16

{30,33} DNBSWON#

DMI

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

LAN_RST# DRAMPW ROK RSMRST#

P5

PW RBTN#

F14 J12 BJ10

RI# W AKE# PMSYNCH

SLP_S3# SLP_S4#

P12 H7

SLP_M# TP23

K8 N2

SLP_M#

(+3V_S5) SUS_PW R_DN_ACK / GPIO30 ACPRESENT / GPIO31 (+3V_S5) (+3V) CLKRUN# / GPIO32 (+3V_S5) SUS_STAT# / GPIO61 SUSCLK / GPIO62 (+3V_S5) (+3V_S5) SLP_S5# / GPIO63 (+3V_S5) BATLOW # / GPIO72

M1 P7 Y1 P8 F3 E4 A6

SUS_PWR_ACK_R AC_PRESENT CLKRUN# RSV_SUS_SATA# SUSCLK_R SLP_S5# PM_BATLOW#

SLP_LAN# / GPIO29

F6

(+3V_S5)

SUSB# SUSC#

A

{3} {3} {3} {3}

{30} {30}

TP50 TP73

B

CLKRUN# {30} TP42 TP75 TP46

IbexPeak-M_Rev1_0

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

H18 J18 A18 C18 N20 P20 J20 L20 F20 USBP4-_R R293 G20 USBP4+_R R294 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

USBRBIAS#

B25 USB_BIAS R641

(+5V) (+5V) (+5V)

(+5V) (+5V) (+5V) (+5V)

USB

SERR# PERR# IRDY# PAR DEVSEL# FRAME#

D41 C48

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

PCIRST#

PCI_DEVSEL# PCI_FRAME#

PCI_STOP# PCI_TRDY#

{24} PCLK_DEBUG

PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5

A42 H44 F46 C46

TP43

AV9 BG8

PCI

J50 G42 H47 G34

TP44

NV_DQS0 NV_DQS1

NVRAM

{3} {3} {3} {3}

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12

STOP# TRDY#

USBRBIAS

D25

(+3V_S5)OC0# / GPIO59 (+3V_S5)OC1# / GPIO40 (+3V_S5)OC2# / GPIO41 (+3V_S5)OC3# / GPIO42 (+3V_S5)OC4# / GPIO43 (+3V_S5) OC5# / GPIO9 (+3V_S5)OC6# / GPIO10 (+3V_S5)OC7# / GPIO14

N16 J16 F16 L16 E14 G16 F12 T15

PME# PLTRST# CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

USBP0USBP0+

TP78 TP79

*0_4 *0_4 TP36 TP49 TP80 TP77

{23} {23}

USBP2{31} USBP2+ {31} USBP3{29} USBP3+ {29} USBP4USBP4+ USBP5{24} USBP5+ {24}

CCD +3V_S5

Bluetooth Card {24} Reader {24} SIM WLAN

+3V_S5

U28 *TC7SH08FU(F) PLT_RST-R#

USB6/SUB7 HM55 not support

2 4

TP47 TP37 TP40 TP35

{31} {31} {31} {31} {24} {24}

USB USB 3G

USBP13USBP13+

{25} {25}

ESATA

R624

PLTRST#

{3,24,28,29,30}

RSMRST# RSV_ICH_LAN_RST#

R303 R635

10K_4 10K_4 10K_4 10K_4 10K_4 *10K_4

R629

10K_4 10K_4 C

R630 *100K_4

100K_4

C3A

0_4 SUSCLK_R

R705

*SHORT_4

E3A C3A R625

22.6/F_4

SUSCLK

{30}

+3V_S5 0_4

VGA_PLTRST# {15}

C799

0.1U/10V_4X

+3V_S5

USB OC table USB_OC0# USB_OC1# USB_OC2# USB_OC3# USBOC#8_9 USB_OC5# USBOC#13 SCI#

R307 R628 R312 R265 R266 R264

C807 *0.1U/10V_4X

1 USBP8USBP8+ USBP9USBP9+ USBP10USBP10+

PM_RI# PM_BATLOW# PCIE_WAKE# SUS_PWR_ACK_R AC_PRESENT DNBSWON#

5

C473 *10P/50V_4C

AY9 BD1 AP15 BD8

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

3

{30} SUS_PWR_ACK

1

{3,39} DELAY_VR_PWRGOOD

1

SUS_PWR_ACK_R

4

Q14 2N7002_200MA

USBOC#8_9 {30,31} USBOC#13 {25,30} SCI# {30}

R115

SYS_PWROK

2

{3,30} MPWROK

3

B

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

DMI0RXN DMI1RXN DMI2RXN DMI3RXN

5

R267 *22_4

Ibex-M 5 OF 10

BC24 BJ22 AW 20 BJ20

3

CLK_PCI_FB

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

2

For EMI

H40 N34 C44 A38 C36 J34 A40 D45 E36 H48 E40 C40 M48 M45 F53 M40 M43 J36 K48 F40 C42 K46 M51 J52 K51 L34 F42 J40 G46 F44 M47 H36

Ibex-M 3 OF 10

{3} {3} {3} {3}

R656

U30 TC7SH08FU(F)

100K_4

R633 10K_4

*0_4

IbexPeak-M_Rev1_0 D

D

+3V

+3V

+3V_S5

RP18 PCI_IRDY# PCI_STOP# PCI_PIRQA# PCI_PIRQC#

5 4 3 2 1

+3V

RP17

6 7 8 9 10

PCI_PIRQD# PCI_SERR# REQ1# PCI_FRAME#

REQ3# PCI_DEVSEL# PCI_TRDY# PIRQH#

+3V

8.2KX8

5 4 3 2 1

6 7 8 9 10

PCI_PLOCK# PCI_PERR# REQ0# PCI_PIRQB# +3V

REQ2# PIRQE# PIRQF# CLKRUN# PIRQG#

R287 R286 R620 R569 R285

RP8

8.2K_4 8.2K_4 8.2K_4 8.2K_4 8.2K_4

USBOC#8_9 USB_OC5# USBOC#13 SCI#

8.2KX8

5 4 3 2 1

6 7 8 9 10 8.2KX8

USB_OC0# USB_OC1# USB_OC2# USB_OC3#

Quanta Computer Inc. PROJECT : BL6

+3V_S5 Size

Document Number

Rev A1A

PCH 3/5 (PCI,ONFI,USB,DMI) Date: 1

2

3

4

5

6

Saturday, April 10, 2010 7

Sheet

9 8

of

45

1

2

3

4

5

6

WWW.ROSEFIX.COM U24F

A

C3A

{25} ESATA_DN#

Y3

BOARD_ID6

C38

TACH1 / GPIO1

GPIO6

D37

TACH2 / GPIO6

(+3V)

BOARD_ID4

J32

TACH3 / GPIO7

(+3V)

GPIO8

F10

{3,30} TEMP_ALERT#

CLKOUT_PCIE7N CLKOUT_PCIE7P

AF48 AF47

MISC

GPIO8(+3V_S5)

GPIO15

T7

GPIO16

AA2

SATA4GP / GPIO16 (+3V)

CLKOUT_BCLK0_N/CLKOUT_PCIE8N

AM3

CLK_CPU_BCLKN

{3}

GPIO17

F38

TACH0 / GPIO17(+3V)

CLKOUT_BCLK0_P/CLKOUT_PCIE8P

AM1

CLK_CPU_BCLKP

{3}

GPIO22

Y7

GPIO27

AB12

GPIO28

V13

ESATA_DN#

AB7

GPIO37

AB13

GPIO39

P3 F1

BOARD_ID5

AB6

TEMP_ALERT#

AA4

H10 H3 F8 M11 V6 V3

A4 A49 A5 A50 A52 A53 B2 B4 B52 B53 BE1 BE53 BF1 BF53 BH1

AB16 AA19 AA20 AA22 AM19 AA24 AA26 AA28 AA30 AA31 AA32 AB11 AB15 AB23 AB30 AB31 AB32 AB39 AB43 AB47 AB5 AB8 AC2 AC52 AD11 AD12 AD16 AD23 AD30 AD31 AD32 AD34 AU22 AD42 AD46 AD49 AD7 AE2 AE4 AF12 Y13 AH49 AU4 AF35 AP13 AN34 AF45 AF46 AF49 AF5 AF8 AG2 AG52 AH11 AH15 AH16 AH24 AH32 AV18 AH43 AH47 AH7 AJ19 AJ2 AJ20 AJ22 AJ23 AJ26 AJ28 AJ32 AJ34 AT5 AJ4 AK12 AM41 AN19 AK26 AK22 AK23 AK28

(+3V)

GPIO

LAN_PHY_PWR_CTRL / GPIO12

A20GATE

(+3V_S5)

GATEA20

U2

GATEA20 {30}

GPIO15 (+3V_S5)

SCLOCK / GPIO22(+3V)

PECI

GPIO27 (+3V_S5)

RCIN#

CPU

GPIO28 (+3V_S5)

PROCPWRGD

SATA2GP / GPIO36

(+3V)

THRMTRIP#

SATA3GP / GPIO37

(+3V)

TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 NC_1 NC_2 NC_3 NC_4 NC_5 INIT3_3V# TP24

SDATAOUT0 / GPIO39

(+3V)

PCIECLKRQ7# / GPIO46 (+3V_S5) SDATAOUT1 / GPIO48

(+3V)

SATA5GP / GPIO49

(+3V)

RSVD

GPIO24 (+3V_S5) PCIECLKRQ6# / GPIO45 (+3V_S5) GPIO57 (+3V_S5) STP_PCI# / GPIO34 (+3V) SATACLKREQ# / GPIO35(+3V) SLOAD / GPIO38 (+3V)

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15

VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31

NCTF

BG10

PCH_PECI_R

H_PECI {3}

RCIN#

T1

RCIN#

BE10

{30}

H_PWRGOOD

BD10 PCH_THRMTRIP#_R BA22 AW22 BB22 AY45 AY46 AV43 AV45 AF13 M18 N18 AJ24 AK41 AK42 M32 N32 M30 N30 H12 AA23 AB45 AB38 AB42 AB41 T39 P6 C10

R180

56.2/F_4

R181

56.2/F_4

{3,33}

PM_THRMTRIP# {3} +VTT

TP38

BH2 BH52 BH53 BJ1 BJ2 BJ4 BJ49 BJ5 BJ50 BJ52 BJ53 D1 D2 D53 E1 E53

IbexPeak-M_Rev1_0

C

+3V_S5

PCH Strap Pin Configuration Table

U24H

AH45 AH46

K9

GPIO24 GPIO45 GPIO57 BOARD_ID2 BOARD_ID3 BOARD_ID7

B

CLKOUT_PCIE6N CLKOUT_PCIE6P

GPIO12

GPIO46

{3} DDR3_DRAMRST#_PCH

Ibex-M 6 OF 10

BMBUSY# / GPIO0 (+3V)

VSS[0] VSS[80] VSS[1] VSS[81] VSS[2] VSS[82] VSS[3] VSS[83] VSS[4] VSS[84] VSS[5] VSS[85] VSS[6] VSS[86] VSS[7] VSS[87] VSS[8] VSS[88] VSS[9] VSS[89] VSS[10] VSS[90] VSS[11] VSS[91] VSS[12] VSS[92] VSS[13] VSS[93] VSS[14] VSS[94] VSS[15] VSS[95] VSS[16] VSS[96] VSS[17] VSS[97] VSS[18] VSS[98] VSS[19] VSS[99] VSS[20] VSS[100] VSS[21] VSS[101] VSS[22] VSS[102] VSS[23] VSS[103] VSS[24] VSS[104] VSS[25] VSS[105] VSS[26] VSS[106] VSS[27] VSS[107] VSS[28] VSS[108] VSS[29] VSS[109] VSS[30] VSS[110] VSS[31] VSS[111] VSS[32] VSS[112] VSS[33] VSS[113] VSS[34] VSS[114] VSS[35] VSS[115] VSS[36] VSS[116] VSS[37] VSS[117] VSS[38] VSS[118] VSS[39] VSS[119] VSS[40] VSS[120] VSS[41] VSS[121] VSS[42] VSS[122] VSS[43] VSS[123] VSS[44] VSS[124] VSS[45] VSS[125] VSS[46] VSS[126] VSS[47] VSS[127] VSS[48] VSS[128] VSS[49] VSS[129] VSS[50] VSS[130] VSS[51] VSS[131] VSS[52] VSS[132] VSS[53] VSS[133] VSS[54] VSS[134] VSS[55] VSS[135] VSS[56] VSS[136] VSS[57] VSS[137] VSS[58] VSS[138] VSS[59] VSS[139] VSS[60] VSS[140] VSS[61] VSS[141] VSS[62] VSS[142] VSS[63] VSS[143] VSS[64] VSS[144] VSS[65] VSS[145] VSS[66] VSS[146] VSS[67] VSS[147] VSS[68] VSS[148] VSS[69] VSS[149] VSS[70] VSS[150] VSS[71] VSS[151] VSS[72] VSS[152] VSS[73] VSS[153] VSS[74] VSS[154] VSS[75] VSS[155] VSS[76] VSS[156] VSS[77] VSS[157] VSS[78] VSS[158] VSS[79] IbexPeak-M_Rev1_0

AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47

SPKR

GNT3#/ GPIO55

{9}

RCIN#

R590

10K_4

GPIO12

R278

10K_4

GATEA20

R589

10K_4

GPIO27

R222

*10K_4

ESATA_DN#

R238

10K_4

GPIO28

R245

10K_4

GPIO6

R296

10K_4

HDA_DOCK_EN #/GPIO33

GPIO37

R244

10K_4

GPIO46

R618

10K_4

GPIO16

R568

10K_4

GPIO39

R591

10K_4

GPIO24

R284

*10K_4

GPIO17

R279

10K_4

TEMP_ALERT#

R567

10K_4

GPIO45

R616

*10K_4

GPIO22

R258

10K_4

E3A

Flash Descriptor Security Override

{9} {9}

D

ID1

UMA SKU VGA SKU

H L

W/ MDC W/O MDC

ID2

ID3

ID4

ID6

R290 10K_4 BOARD_ID6

H L

15" 14"

R231

R280 10K_4

GNT#1

{7}

LPC

0

1

PCI

1

0

Reserved (NAND)

1

1

SPI

R504

SPI_SI_R

TPM Functionality Disable

*1K_4

+3V

*10K_4

+1.8V

1 = Enabled 0 = Disable

NV_ALE {9}

R496

NV_ALE

IntelR Anti-Theft Technology HDD Data Protection (Intel AT-d) Enable

GPIO8

1 = Enabled 0 = Disabled (Default)

GPIO8

R298

10K_4

+3V_S5 C

This signal has a weak internal pull up. NOTE: This signal should not be pulled low

Reserved

+3V

+3V

GPIO15

R248

1K_4

+3V_S5

0 = Intel ME Crypto Transport Layer Security (TLS) cipher suite with no confidentiality 1 = Intel ME Crypto Transport Layer Security (TLS) cipher suite with confidentiality

R232

*10K_4

0 = Disables the VccVRM. Need to use on-board filter circuits for analog rails. 1 = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. This signal has a weak internal pull-up.

+3V

BT_Detect#

BOARD_ID5

{31}

HM@10K_4 BOARD_ID4

CPUSB#

{24}

BOARD_ID3

R247

*10K_4

HM@10K_4

R274 MDC@10K_4 BOARD_ID2

R570

R586

IV@10K_4

2C@10K_4

BOARD_ID1

+RTC_CELL

BOARD_ID7

R277

R571

R728

MDC@10K_4

EV@10K_4

*4C@10K_4

R644

330K_6 PCH_INVRMEN

PCH_INVRMEN

{7}

D

INTVRMEN - Integrated SUS 1.1V VRM Enable High - Enable Internal VRs

Quanta Computer Inc. PROJECT : BL6 Size

H L 2

Document Number

Rev A1A

PCH 4/5 (GPIO & Strap) Date:

1

B

Boot BIOS Location

0

H L

2 Core 4 Core

*1K_4 *1K_4

0

GPIO27

R240

R239

H L

W/O BT W/ BT

R272 R621

GPIO27

+3V

10K_4

H L

W/O 3G W/ 3G

GNT0# GNT1#

B2A H L

W/ HDMI W/O HDMI

+3V

+3V

GNT0# GNT1#

SPI_MOSI

ID7 +3V

*SHORT PAD 1

0 = Flash Descriptor Security will be overridden 1 = Security measure defined in the Flash Descriptor will be enabled.

PCI_GNT0#

On-Die PLL Voltage Regulator

ID5

JP1 2

1K_4

Boot BIOS Strap

BOARD ID SETTING Board ID

A

*10K_4

R282

{7,30} PCH_GPIO33

Reserved

C3A

+3V

0 = Top Block Swap Mode 1 = Default Mode (Internal pull-up)

GPIO15

10K_4

R622

GNT3#

Top-Block Swap Override

GNT0#, GNT1#

*1K_4

0 = Default Mode (Internal weak Pull-down) 1 = No Reboot Mode with TCO Disabled

Reboot option at power-up

+3V R297

R592

{7,27} PCBEEP

+3V

GPIO57

8

IBEX PEAK-M (GND)

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

BOARD_ID1

7

3

4

5

6

7

Saturday, April 10, 2010

Sheet

10 8

of

45

1

2

3

4

5

6

7

8

WWW.ROSEFIX.COM +VCCA_DAC_1_2=69mA(15mils) R599

HCB1608KF-181T15_1.5A

+3V

VCCCORE = 1.432A(80mils)

+3V_LDO

*SHORT_8 +1.05V_VCCCORE_ICH

C3A

POWER

U24G

A

C447

1U/6.3V_4X

C446

4.7U/6.3V_6X

AB24 AB26 AB28 AD26 AD28 AF26 AF28 AF30 AF31 AH26 AH28 AH30 AH31 AJ30 AJ31

VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15]

40mA(15mils)

Ibex-M

7 OF 10

CRT

LVDS

R529

*SHORT_6 +1.05V_PCH_VCCDPLL_EXP AK24 TP65

+V1.1LAN_VCCAPLL_EXP

*SHORT_1206 +V1.1S_VCC_EXP

R462

+1.05V

R463

*SHORT_1206 C703

C3A B

4.7U/6.3V_6X

C385

1U/6.3V_4X

C437

1U/6.3V_4X

C426

1U/6.3V_4X

C432

1U/6.3V_4X

C716

0.1U/10V_4X

C711

0.1U/10V_4X

C436

0.1U/10V_4X

C699 + *330U/2V_7343P_E9c

VCCIO = 3.062A(150mils) C433

+3V

R211

+1.8V

R480

*1U/6.3V_4X *SHORT_6

*SHORT_6 +VCCAFDI_VRM

BJ24

VCCAPLLEXP

AN20 AN22 AN23 AN24 AN26 AN28 BJ26 BJ28 AT26 AT28 AU26 AU28 AV26 AV28 AW 26 AW 28 BA26 BA28 BB26 BB28 BC26 BC28 BD26 BD28 BE26 BE28 BG26 BG28 BH27 AN30 AN31

VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49] VCCIO[50] VCCIO[51] VCCIO[52] VCCIO[53] VCCIO[54] VCCIO[55]

AN35

VCC3_3[1]

AT22

37mA(15mils)

AE52 AF53

VSSA_DAC[2]

AF51

HVCMOS

C767

VCCTX_LVDS= 59mA(15mils)

DMI

AH38 AH39

VCCALVDS

R214 R192 R207

AP43 VCCTX_LVDS C418 AP45 C430 AT46 C419 AT45 AB34

VCC3_3[3]

AB35

VCC3_3[4]

AD35

VCCVRM[2]

AT24

VCCDMI[1]

AT16

VCCDMI[2]

AU16

C3A +1.05V

[email protected]/6.3V_6X [email protected]/10V_4X [email protected]/25V_4X

+3V_VCC_GIO C454

R236

L31

VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9]

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

B2A C3A C3A

0.1U/10V_4X

VCC3_3 = 0.357A(30mils)

+1.8S_VCCADMI_VRM VCCDMI C435

C3A

*1U/6.3V_4X

+1.05V_VCCEPW *SHORT_8

R281

NAND / SPI VCCME3_3[1] VCCME3_3[2] VCCME3_3[3] VCCME3_3[4]

AM8 AM9 AP11 AP9

*SHORT_6 +1.8V

R482

*SHORT_6 +VTTVCCDMI=

+V_NVRAM_VCCQ C441

R213

*SHORT_6 +1.8V

0.1U/10V_4X

C3A C3A

+3.3V_VCCME_SPI C431

R209

*10uh_8_100MA

+1.05V +1.05V

C3A

+ C723

C3A

C468

1U/6.3V_4X

AF43

VCCME[4]

C462

1U/6.3V_4X

AF41

VCCME[5]

C469

1U/6.3V_4X

AF42

VCCME[6]

V39

VCCME[7]

V41

VCCME[8]

V42

VCCME[9]

Y39

VCCME[10]

+VCCRTCEXT 0.1U/10V_4X *SHORT_4VCCVRM

C3A

U25 +5V

D

2 3 C780

SHDN

VO

4

SET

5

BB51 BB53

C452

0.1U/10V_4X

+VCCSST

V12 Y22

C450

+V1.1LAN_INT_VCCSUS 0.1U/10V_4X

R304

*SHORT_6

+3V_S5_VCCPSUS 0.1U/10V_4X +3V_VCCPCORE

R205

*SHORT_6 C425 C423 C422

+VTT_VCCPCPU 4.7U/6.3V_6X 0.1U/10V_4X 0.1U/10V_4X

R269

*SHORT_6

R659

*0_6

VCCADPLLA[1] VCCADPLLA[2] VCCADPLLB[1] VCCADPLLB[2] VCCIO[21] VCCIO[22] VCCIO[23] VCCIO[2] VCCIO[3] VCCIO[4]

C3A

+3V_S5_VCCPUSB

R268

*SHORT_6 +3V_S5

C3A

C467

0.1U/10V_4X

C466

0.1U/10V_4X

C460

*0.047U/10V_4X

VCCSUS3_3 = 0.163A(20mils)

B

V5REF_SUS< 1mA

100/F_4

+5V_S5

D18

CH501H-40PT_100MA

+3V_S5

C484

1U/6.3V_4X

K49

V5REF

R283

100/F_4

+5V

D17

CH501H-40PT_100MA

PCI/GPIO/LPC

+3V

C475

1U/6.3V_4X

J38 L38 M36 N36 P36 U35 AD13

+3V_VCCPPCI

R271

*SHORT_6

VCC3_3 = 0.357A(30mils) C465 C474

+3V

C3A

0.1U/10V_4X 0.1U/10V_4X

V_CPU_IO[1] V_CPU_IO[2]

CPU

VCCRTC

RTC

VCCSUSHDA

1U/6.3V_4X

VCCSATAPLL[1] VCCSATAPLL[2]

AK3 AK1

+V1.1LAN_VCCAPLL

TP72

VCCVRM[4]

AT20

VCCVRM1

R485

*SHORT_4 +1.8V

VCCIO[9] VCCIO[10] VCCIO[11] VCCIO[12] VCCIO[13] VCCIO[14] VCCIO[15] VCCIO[16] VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20]

AH22 AH19 AD20 AF22 AD19 AF20 AF19 AH20 AB19 AB20 AB22 AD22

+VCC_SATA

R468

*SHORT_8 +1.05V

VCCME[13] VCCME[14] VCCME[15] VCCME[16]

AA34 Y34 Y35 AA35

SATA

C443

C3A

1U/6.3V_4X

VCCIO = 3.062A(150mils)

VCCME = 1.849A(100mils) +1.05V_VCCEPW

IbexPeak-M_Rev1_0

VCCSUSHDA= 6mA(15mils)

D

R563

*G913C

*0.1U/10V_4X

*0_4

Quanta Computer Inc.

Plcaement close to U52

PROJECT : BL6 Size

Document Number

Rev A1A

PCH 5/5 (POWER) Date: 1

2

3

A

C

HDA C472

*SHORT_6 +1.05V

DCPSUS

VCC3_3[5] VCC3_3[6] VCC3_3[7]

L30

R295

1U/6.3V_4X

DCPSST

V15 V16 Y16 AT18 AU18

C453

V5REF< 1mA V5REF

VCC3_3[8] VCC3_3[9] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13] VCC3_3[14]

VCCSUS3_3[29] VCCSUS3_3[30] VCCSUS3_3[31] VCCSUS3_3[32]

0.1U/10V_4X 0.1U/10V_4X +V3.3A_1.5A_HDA_IO

VCCVRM[3]

P18 U19 U20 U22

A12 C801 C806

DCPRTC

PCI/GPIO/LPC

0.1U/10V_4X

R578 *52.3K/F_4

GND VIN

AU24

C448 C444 C442

*SHORT_6

C773 IV@10U/6.3V_8X

V9

AH23 AJ35 AH35 AF34 AH34 AF32

C464 +VTT

+1.5V_S5

1

MAINON

VCCME[12]

+1.05V_SSCVCC +1.05V_SSCVCC1 +1.05V_SSCVCC 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X

C470 +3V

C3A +3V_S5 {3,30,37,38,40}

VCCME[11]

Y42

1U/6.3V_4X

R308

+RTC_CELL

Reserve for clear CRT Power

Y41

BD51 BD53

*SHORT_6 *SHORT_6

+3V_LDO

1U/6.3V_4X

V5REF_SUS R315

VCCME[1]

VCCME[3]

C439

C3A R219 R224

VCCRTC= 2mA(15mils)

C405

*220U/2.5V_3528P_E35b

+1.05V_VCCUSBCORE

F24

VCCLAN[2]

AD38

VCCME[2]

+V1.1LAN_VCCA_A_DPL

V_CPU >1mA(15mils)

+V1.1LAN_VCCA_B_DPL

V23

AF24

AD41

+ C733

L30

VCCIO[56] V5REF_SUS

USB

VCCLAN[1]

AD39

R484

+1.8V

VCC3_3 = 0.357A(30mils)

R470 0_8

VCCSUS3_3[28]

U23

AF23

+V1.1LAN_VCCA_B_DPL

*SHORT_6 +3V

0.1U/10V_4X

+V1.1LAN_VCCA_A_DPL

1U/6.3V_4X

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

4.7U/6.3V_6X

C461

VCCSUS3_3 = 0.163A(20mils)

C396

VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27]

4.7U/6.3V_6X

68mA(15mils)

C3A +3V_S5

*220U/2.5V_3528P_E35b

VCCIO[6] VCCIO[7] VCCIO[8]

1U/6.3V_4X

Isolate the power supply for pins AF32,AF34,AH34 Reduce the jitter on HDMI interface for 1080P 60Hz Deep color mode.

VCCIO[1]

VCCACLK[2] DCPSUSBYP

61mA(15mils)

VCCIO = 3.062A(150mils)

FDI

AP53 Y20

V24 V26 Y24 Y26

C456

VCCME = 1.849A(100mils)

R481

+1.05V_VCCUSBCORE

VCCACLK[1]

10 OF 10VCCIO[5]

C449

VCCME3_3= 85mA(15mils)

IbexPeak-M_Rev1_0

10uh_8_100MA

C445

+1.8V +1.05V

*SHORT_6 +3V

*SHORT_6 +1.05V_VCCAUX

R559

VCCPNAND= 156mA(15mils)

PCI E*

Ibex-M AP51

VCCLAN = 0.32A(30mils)

IV@0_6 +3V EV@0_6 [email protected]_8_250MA

+1.05V_VCCDPLL_FDI *SHORT_6

R539

C451

EV@0_6

DCPSUSBYP 0.1U/10V_4X

VCCIO = 3.062A(150mils)

POWER

U24J

VCCACLK

0.01U/25V_4X

R218

68mA(15mils) +1.05V

0.1U/10V_4X

VCCALVDS= 59mA(15mils)

VCC3_3[2]

VCCFDIPLL

AM23

C766

TP69

VSSA_DAC[1]

VCCALVDS VSSA_LVDS

10U/6.3V_8X

VCCVRM= 196mA(15mils)

VCCVRM[1]

C3A +1.05V

VCCADAC[2]

VCCIO[24]

+V1.1LAN_VCCAPLL_FDI BJ18

TP64 C

+3V_VCCA3GBG

AE50

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

VCC CORE +1.05V

VCCADAC[1]

C770

Clock and Miscellaneous

R467

+1.05V

4

5

6

Saturday, April 10, 2010 7

Sheet

11 8

of

45

4

5

6

7

WWW.ROSEFIX.COM H=4

10K/F_4 10K/F_4

109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# W E# SA0 SA1 SCL SDA

116 120

ODT0 ODT1

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

11 28 46 63 136 153 170 187

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DIMM0_SA0 DIMM0_SA1

{2,13,24} CGCLK_SMB {2,13,24} CGDAT_SMB

B

{4} M_A_ODT0 {4} M_A_ODT1 {4} M_A_DM[7:0]

{4} M_A_DQSP[7:0]

{4} M_A_DQSN[7:0]

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

JDIM1B

+3V

for S3 power reduction PM_EXTTS#0

{3} PM_EXTTS#0 {3,13} DDR3_DRAMRST#

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

199

VDDSPD

77 122 125

NC1 NC2 NCTEST

198 30

EVENT# RESET#

*0_6 SMDDR_VREF_DQ0 1 SMDDR_VREF_DIMM 126

R8

{6} DDR_VREF_DQ0

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

R7 100K_4

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43

VREF_DQ VREF_CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

VTT1 VTT2

203 204

DDRRK-20401-TP4B

A

B

+SMDDR_VTERM

GND

R44 R42

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

+1.5VSUS

{4}

GND

M_A_BS#0 M_A_BS#1 M_A_BS#2 M_A_CS#0 M_A_CS#1 M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1 M_A_CKE0 M_A_CKE1 M_A_CAS# M_A_RAS# M_A_WE#

98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78

PC2100 DDR3 SDRAM SO-DIMM (204P)

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

A

{4} {4} {4} {4} {4} {4} {4} {4} {4} {4} {4} {4} {4} {4}

M_A_DQ[63:0]

JDIM1A

{4} M_A_A[15:0]

8

206

3

205

2

PC2100 DDR3 SDRAM SO-DIMM (204P)

1

+SMDDR_VTERM

R69 22_4

DDRRK-20401-TP4B C

C

3

SMDDR_VREF_DIMM Q4 2N7002_200MA

2

470P/50V_4X

R30

0_4

R32

*10K/F_4

R29

*10K/F_4

{13}

+SMDDR_VREF +1.5VSUS

1

{3,5,40,41} MAINON_ON_G

C107

Place these Caps near So-Dimm0. +1.5VSUS SMDDR_VREF_DQ0 C62

+SMDDR_VTERM

4.7U/6.3V_6X C26

0.1U/10V_4X

C34

2.2U/6.3V_6X

C51

4.7U/6.3V_6X

C42

4.7U/6.3V_6X

C170

1U/6.3V_4X

C182

1U/6.3V_4X

C80

4.7U/6.3V_6X

C85

4.7U/6.3V_6X

C168

1U/6.3V_4X

C171

1U/6.3V_4X

C99

4.7U/6.3V_6X

C108

C43

0.1U/10V_4X

C124

0.1U/10V_4X

C166

*10U/6.3V_8X

2.2U/6.3V_6X

C174

*10U/6.3V_8X

C79

0.1U/10V_4X

C125

C53

0.1U/10V_4X

*0.047U/10V_4X

C179

4.7U/6.3V_6X

C181

*0.047U/10V_4X

C67

0.1U/10V_4X

C95

0.1U/10V_4X

C167

2.2U/6.3V_6X

C165

*0.047U/10V_4X

C47

*0.047U/10V_4X

C162

*0.1U/10V_4X

C89

*0.047U/10V_4X

C156

*0.047U/10V_4X

+1.5VSUS

+1.5VSUS

SMDDR_VREF_DIMM

R9 1K/F_4 SMDDR_VREF_DQ0 + C599

D

+3V

R6 1K/F_4

C25 0.1U/10V_4X

C32 *0.047U/10V_4X

D

*330U/2.5V_7343P_E9a

Quanta Computer Inc. PROJECT : BL6 Size

Document Number

Rev A1A

DDR3 DIMM-0 Date: 1

2

3

4

5

6

Thursday, April 08, 2010 7

Sheet

12

of 8

45

4

5

6

WWW.ROSEFIX.COM H=8

+3V {2,12,24} CGCLK_SMB {2,12,24} CGDAT_SMB

R77 R83

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

109 108 79 114 121 101 103 102 104 73 74 115 110 113 10K/F_4 DIMM1_SA0 197 10K/F_4 DIMM1_SA1 201 202 200

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# W E# SA0 SA1 SCL SDA

116 120

ODT0 ODT1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

11 28 46 63 136 153 170 187

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

{4} M_B_ODT0 {4} M_B_ODT1 {4} M_B_DM[7:0]

{4} M_B_DQSP[7:0]

{4} M_B_DQSN[7:0]

C

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

H=8

+1.5VSUS

{4}

JDIM2B

+3V

{3} PM_EXTTS#1 {3,12} DDR3_DRAMRST# R4

{6} DDR_VREF_DQ1

*0_6

SMDDR_VREF_DQ1

{12} SMDDR_VREF_DIMM R5 *4C@100K_4

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

199

VDDSPD

77 122 125

NC1 NC2 NCTEST

198 30

EVENT# RESET#

1 126

VREF_DQ VREF_CA

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

VTT1 VTT2

203 204

DDRRK-20401-TP8D

A

B

+SMDDR_VTERM

GND

B

M_B_BS#0 M_B_BS#1 M_B_BS#2 M_B_CS#0 M_B_CS#1 M_B_CLKP0 M_B_CLKN0 M_B_CLKP1 M_B_CLKN1 M_B_CKE0 M_B_CKE1 M_B_CAS# M_B_RAS# M_B_WE#

98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78

8

GND

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

A

{4} {4} {4} {4} {4} {4} {4} {4} {4} {4} {4} {4} {4} {4}

M_B_DQ[63:0]

JDIM2A

M_B_A[15:0]

PC2100 DDR3 SDRAM SO-DIMM (204P)

{4}

7

206

3

205

2

PC2100 DDR3 SDRAM SO-DIMM (204P)

1

C

DDRRK-20401-TP8D

Place these Caps near So-Dimm1. +1.5VSUS

SMDDR_VREF_DIMM

+SMDDR_VTERM

C87

4.7U/6.3V_6X

C121

0.1U/10V_4X

C176

1U/6.3V_4X

C48

4.7U/6.3V_6X

C123

2.2U/6.3V_6X

C187

1U/6.3V_4X

C56

4.7U/6.3V_6X

C122

*0.047U/10V_4X

C175

1U/6.3V_4X

C83

4.7U/6.3V_6X

C188

1U/6.3V_4X

C88

4.7U/6.3V_6X

C190

*10U/6.3V_8X

C64

4.7U/6.3V_6X

C31

0.1U/10V_4X

C185

4.7U/6.3V_6X

C52

0.1U/10V_4X

C27

2.2U/6.3V_6X

C180

4.7U/6.3V_6X

C66

0.1U/10V_4X

C177

*0.047U/10V_4X

C44

0.1U/10V_4X

C178

*0.047U/10V_4X

C78

0.1U/10V_4X

C163

2.2U/6.3V_6X

C45

0.1U/10V_4X

C169

*0.1U/10V_4X

C97

*0.047U/10V_4X

C164

*0.047U/10V_4X

C75

*0.047U/10V_4X

SMDDR_VREF_DQ1

+1.5VSUS

R3 1K/F_4

+1.5VSUS

SMDDR_VREF_DQ1

D

+3V

+ C580 R2 1K/F_4

C24 0.1U/10V_4X

C33 *0.047U/10V_4X

D

*330U/2.5V_7343P_E9a

Quanta Computer Inc. PROJECT : BL6 Size

Rev A1A

DDR3 DIMM-1 Date:

1

Document Number

2

3

4

5

6

Thursday, April 08, 2010 7

Sheet

13

of 8

45

5

4

3

2

WWW.ROSEFIX.COM

HDMI DDC

HDMI Level Shift

+3V

+3V

IHM@10K_4

*[email protected]/F_4

{7} TMDSD_DATA1 {7} TMDSD_DATA1#

TMDSD_DATA1 TMDSD_DATA1#

39 38

{7} TMDSD_DATA2 {7} TMDSD_DATA2#

TMDSD_DATA2 TMDSD_DATA2#

42 41

{7} TMDSD_DATA0 {7} TMDSD_DATA0#

TMDSD_DATA0 TMDSD_DATA0#

45 44

{7} TMDSD_CLK {7} TMDSD_CLK#

TMDSD_CLK TMDSD_CLK#

48 47

3

OE#

R551

[email protected]/F_4 D

R612 HDMI_LF_HPOUT

Q56

2

*IHM@10K_4

IHM@2N7002_200MA

TMDSD_CLK TMDSD_CLK#

+3V

U23

R614

R553

1

SDVO_CTRLCLK SDVO_CTRLDATA

{7} SDVO_CTRLCLK {7} SDVO_CTRLDATA

IN_D+ IN_D1-

9 8

HDMI_LF_HPOUT

IN_D2+ IN_D2-

OUT_D2+ OUT_D2-

IN_D3+ IN_D3-

OUT_D3+ OUT_D3-

IN_D4+ IN_D4-

OUT_D4+ OUT_D4-

SCL SDA

SCL_SINK SDA_SINK

HPD

HPD_SINK

22 23

HDMITX1P HDMITX1N

19 20

HDMITX2P HDMITX2N

16 17

HDMITX0P HDMITX0N

13 14

HDMICLK+ HDMICLK-

28 29

HDMI_CON_DDCCLK HDMI_CON_DDCDATA

30

HDMI_CON_HP

Port D Enable

R225

R228

R474

[email protected]_4

[email protected]_4

[email protected]_4

C3A

R489 [email protected]_4

SDVO_CTRLCLK SDVO_CTRLDATA EV_HDMI_DDCCK EV_HDMI_DDCDAT

D

1

7

OUT_D1+ OUT_D1-

25

DDC_EN

32

OC_3

10

VCC[1] VCC[2] VCC[3] VCC[4] VCC[5] VCC[6] VCC[7] VCC[8]

OE# DDC_EN NC(OC_3)

+3V

B2A R594

*IHM@10K_4

R555

*IHM@0_4

R580

*IHM@10K_4

R556

*IHM@0_4

SR0

R486

[email protected]_4

R499

*[email protected]_4

R501

*[email protected]_4

SR0 SR1

3 4

OC_2

6

SR0 SR1

DDC_EN

27

SR1

GND

OE# EQ_0 EQ_1

R500

GND[1] GND[2] GND[3] GND[4] GND[5] GND[6] GND[7] GND[8] GND[9] GND[10]

NC(OC_2)

34 35

NC(EQ_0) NC(EQ_1)

*[email protected]_4

2 11 15 21 26 33 40 46

+3V

0.1A(20mils) +3V

1 5 12 18 24 31 36 37 43 49

2

C3A

+3V

OE#

HDMI_CON_DDCDATA

SR1

C

SR0

1

1

140ps

1

0

130ps

0

1

120ps

0

0

110ps

+3V

C3A

E3A HDMI_CON_DDCCLK

Rise/Fall Time

R557 R558

[email protected]/F_4 *IHM@0_4

1

*IHM@0_4

EQ_0

*IHM@0_4

EQ_1

EV_HDMI_DDCCK

{16}

C3A

C751

C729

C746

C730

[email protected]/16V_4Y

[email protected]/25V_4X

[email protected]/16V_4Y

[email protected]/25V_4X

OC_3

R505

{16}

Q45

3

OC_2

R498

EV_HDMI_DDCDAT

EHM@FDV301N_200MA *EHM@0_4

R169

2

C3A Reserve

1

C3A

IHM@PI3VDP411LSRZBE

Slew Rate Control Function

Q51

3

EHM@FDV301N_200MA *EHM@0_4

R163

C

HDMI HPD {16} EXT_HDMITX2P {16} EXT_HDMITX2N

{16} EXT_HDMITX1P {16} EXT_HDMITX1N

{16} EXT_HDMITX0P {16} EXT_HDMITX0N

{16} EXT_HDMICLK+ {16} EXT_HDMICLK-

C404 C399

[email protected]/10V_4X [email protected]/10V_4X

HDMITX2P HDMITX2N

C394 C382

[email protected]/10V_4X [email protected]/10V_4X

HDMITX1P HDMITX1N

C412 C408

[email protected]/10V_4X [email protected]/10V_4X

HDMITX0P HDMITX0N

C427 C420

[email protected]/10V_4X [email protected]/10V_4X

HDMICLK+ HDMICLK-

+3V

2

Discrete HDMI

HDMI_LF_HPOUT

R603

*SHORT_4 3

1

Port-D_HPD

Port-D_HPD

C3A Q58 IHM@2N7002_200MA

{7}

C3A

R598 IHM@100K_4

R617 IHM@100K_4

3

+3V

R210

R212

R191

R206

R171

R176

R183

R189

EHM@499/F_4

EHM@499/F_4

EHM@499/F_4

EHM@499/F_4

EHM@499/F_4

EHM@499/F_4

EHM@499/F_4

EHM@499/F_4

2 R564 1

3

+5V

{16} EXT_HDMI_HPD

2

R561 *EHM@200K_4

EHM@MMBT3904-7-F_200MA

Q18 EHM@2N7002_200MA

HDMI_CON_HP

EHM@200K_4

Q53

EXT_HDMI_HPD

R584

1

EV@10K_4

R161 EHM@100K_4 B

B

Close to HDMI CONN ESD2 HDMITX0P HDMITX0N

RN34

2 4

1 3

IEHM@0X2

HDMITX0P_R HDMITX0N_R

HDMITX0P_R HDMITX0N_R

HDMITX2P HDMITX2N

RN35

2 4

1 3

IEHM@0X2

HDMITX2P_R HDMITX2N_R

HDMITX2P_R HDMITX2N_R

1 2 3 4 5

10 1 10 9 2 9 8 VCC GND 7 4 7 6 5 6 *IEHM@CM1213-04MR

HDMITX0P_R HDMITX0N_R CN19 HDMITX2P_R HDMITX2N_R

HDMITX2P_R HDMITX2N_R HDMITX1P_R HDMITX1N_R HDMITX0P_R

C3A

HDMITX0N_R HDMICLK+_R HDMICLK-_R

ESD1 HDMITX1P HDMITX1N

RN36

2 4

HDMICLK+ HDMICLK-

1 3

2 3 RN37

IEHM@0X2

HDMITX1P_R HDMITX1N_R

HDMITX1P_R HDMITX1N_R

HDMICLK+_R HDMICLK-_R

1 4

1 2 3 4 5

HDMI_CON_DDCCLK HDMI_CON_DDCDATA

IEHM@DLP11SN900HL2L_150MA

10 9 8 7 6

1 10 2 9 VCC GND 4 7 5 6 *IEHM@CM1213-04MR

+5V

HDMITX1P_R HDMITX1N_R

R581 R595

HDMI_CON_DDCCLK HDMI_CON_DDCDATA

[email protected]_4 [email protected]_4

HDMI_CON_DDCCLK HDMI_CON_DDCDATA DDC5V HDMI_CON_HP

E3A A

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

SHELL1 D2+ D2 Shield D2D1+ D1 Shield D1D0+ D0 Shield D0GND CK+ CK Shield GND CKCE Remote NC DDC CLK DDC DATA GND +5V HP DET SHELL2

20

23 22

21 A

IEHM@C12826-11905-L

ESD3

+5V

D3A F3

IEHM@NANOSMDC110F-2

30mils D33

2

HDMICLK+_R HDMICLK-_R

1 IEHM@RSX101M-30_1A

DDC5V HDMI_CON_HP

E3A

1 2 3 4 5

1 2 VCC 4 5

10 9 GND 7 6

10 9 8 7 6

HDMICLK+_R HDMICLK-_R DDC5V HDMI_CON_HP

*IEHM@CM1213-04MR

Quanta Computer Inc.

C421 C774 [email protected]/16V_4Y

PROJECT : BL6

*IEHM@10U/6.3V_8X Size

Document Number

Rev A1A

HDMI CONN Date: 5

4

3

2

Sheet

Saturday, April 10, 2010 1

14

of

45

5

4

3

2

WWW.ROSEFIX.COM U20A

{3} PEG_TXP[0..15]

{3} PEG_TXN[0..15]

{3} {3}

PEG_TXP0 PEG_TXN0

{3} {3}

PEG_TXP1 PEG_TXN1

{3} {3}

PEG_TXP2 PEG_TXN2

{3} {3}

PEG_TXP3 PEG_TXN3

{3} {3}

PEG_TXP4 PEG_TXN4

{3} {3}

PEG_TXP5 PEG_TXN5

PEG_TXP[0..15]

PEG_TXN[0..15]

PEG_TXP0 PEG_TXN0

AA38 Y37

PCIE_RX0P PCIE_RX0N

PCIE_TX0P PCIE_TX0N

Y33 Y32

CPEG_RXP0 CPEG_RXN0

C200 C201

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP1 PEG_TXN1

Y35 W36

PCIE_RX1P PCIE_RX1N

PCIE_TX1P PCIE_TX1N

W33 W32

CPEG_RXP1 CPEG_RXN1

C228 C229

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP2 PEG_TXN2

W38 V37

PCIE_RX2P PCIE_RX2N

PCIE_TX2P PCIE_TX2N

U33 U32

CPEG_RXP2 CPEG_RXN2

C230 C231

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP3 PEG_TXN3

V35 U36

PCIE_RX3P PCIE_RX3N

PCIE_TX3P PCIE_TX3N

U30 U29

CPEG_RXP3 CPEG_RXN3

C233 C232

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP4 PEG_TXN4

U38 T37

PCIE_RX4P PCIE_RX4N

PCIE_TX4P PCIE_TX4N

T33 T32

CPEG_RXP4 CPEG_RXN4

C234 C235

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP5 PEG_TXN5

T35 R36

PCIE_RX5P PCIE_RX5N

PCIE_TX5P PCIE_TX5N

T30 T29

CPEG_RXP5 CPEG_RXN5

C203 C202

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP6 PEG_TXN6

R38 P37

PCIE_RX6P PCIE_RX6N

PCIE_TX6P PCIE_TX6N

P33 P32

CPEG_RXP6 CPEG_RXN6

C236 C237

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP7 PEG_TXN7

P35 N36

PCIE_RX7P PCIE_RX7N

PCIE_TX7P PCIE_TX7N

P30 P29

CPEG_RXP7 CPEG_RXN7

C209 C210

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP8 PEG_TXN8

N38 M37

PCIE_RX8P PCIE_RX8N

PCIE_TX8P PCIE_TX8N

N33 N32

CPEG_RXP8 CPEG_RXN8

C238 C239

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP9 PEG_TXN9

M35 L36

PCIE_RX9P PCIE_RX9N

PCIE_TX9P PCIE_TX9N

N30 N29

CPEG_RXP9 CPEG_RXN9

C204 C205

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP10 PEG_TXN10

L38 K37

PCIE_RX10P PCIE_RX10N

PCIE_TX10P PCIE_TX10N

L33 L32

CPEG_RXP10 CPEG_RXN10

C240 C241

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP11 PEG_TXN11

K35 J36

PCIE_RX11P PCIE_RX11N

PCIE_TX11P PCIE_TX11N

L30 L29

CPEG_RXP11 CPEG_RXN11

C207 C208

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP12 PEG_TXN12

J38 H37

PCIE_RX12P PCIE_RX12N

PCIE_TX12P PCIE_TX12N

K33 K32

CPEG_RXP12 CPEG_RXN12

C206 C199

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP13 PEG_TXN13

H35 G36

PCIE_RX13P PCIE_RX13N

PCIE_TX13P PCIE_TX13N

J33 J32

CPEG_RXP13 CPEG_RXN13

C224 C225

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP14 PEG_TXN14

G38 F37

PCIE_RX14P PCIE_RX14N

PCIE_TX14P PCIE_TX14N

K30 K29

CPEG_RXP14 CPEG_RXN14

C226 C227

[email protected]/10V_4X [email protected]/10V_4X

PEG_TXP15 PEG_TXN15

F35 E37

PCIE_RX15P PCIE_RX15N

PCIE_TX15P PCIE_TX15N

H33 H32

CPEG_RXP15 CPEG_RXN15

C198 C197

[email protected]/10V_4X [email protected]/10V_4X

PCIE_CALRP

Y30

R119

[email protected]/F_4

PCIE_CALRN

Y29

R123

EV@2K/F_4

{3} PEG_RXP[0..15] {3} PEG_RXN[0..15]

1

PEG_RXP[0..15] PEG_RXN[0..15]

PEG_RXP0 {3} PEG_RXN0 {3}

D

D

PEG_TXP6 PEG_TXN6

{3} {3}

PEG_TXP7 PEG_TXN7

{3} {3}

PEG_TXP8 PEG_TXN8

{3} {3}

PEG_TXP9 PEG_TXN9

PCI EXPRESS INTERFACE

{3} {3} C

B

{3} {3}

PEG_TXP10 PEG_TXN10

{3} {3}

PEG_TXP11 PEG_TXN11

{3} {3}

PEG_TXP12 PEG_TXN12

{3} {3}

PEG_TXP13 PEG_TXN13

{3} {3}

PEG_TXP14 PEG_TXN14

{3} {3}

PEG_TXP15 PEG_TXN15

PEG_RXP1 {3} PEG_RXN1 {3} PEG_RXP2 {3} PEG_RXN2 {3} PEG_RXP3 {3} PEG_RXN3 {3} PEG_RXP4 {3} PEG_RXN4 {3} PEG_RXP5 {3} PEG_RXN5 {3} PEG_RXP6 {3} PEG_RXN6 {3} C

PEG_RXP7 {3} PEG_RXN7 {3} PEG_RXP8 {3} PEG_RXN8 {3} PEG_RXP9 {3} PEG_RXN9 {3} PEG_RXP10 {3} PEG_RXN10 {3} PEG_RXP11 {3} PEG_RXN11 {3} PEG_RXP12 {3} PEG_RXN12 {3}

B

PEG_RXP13 {3} PEG_RXN13 {3} PEG_RXP14 {3} PEG_RXN14 {3} PEG_RXP15 {3} PEG_RXN15 {3}

CLOCK {8} CLK_PCIE_VGA {8} CLK_PCIE_VGA#

For M97 only Madison and Park the PWRGOOD ball is for test purposes and must be conneccted to ground R509

B2A

A

MP@10K_4

AB35 AA36

PCIE_REFCLKP PCIE_REFCLKN

AJ21 AK21 AH16

NC#1 NC#2 PWRGOOD

CALIBRATION

AA30

Ball AH16(PWRGOOD) M92,M96-->NC Madison,Park-->10K PD.

C3A

{9} VGA_PLTRST#

R430

+1V_GPU

A

PERSTB

Quanta Computer Inc.

EV@Madison/Park_M2

PROJECT : BL6

*EV@SHORT_4

Size

Rev A1A

Madison/Park-HOST I/F

No stuff when Debug Mode Date: 5

Document Number

4

3

2

Saturday, April 10, 2010

Sheet 1

15

of

45

5

4

3

2

WWW.ROSEFIX.COM

B2A

U20G

U20B

TXCAP_DPA3P TXCAM_DPA3N

TX0P_DPA2P TX0M_DPA2N

MUTI GFX DPA

TX1P_DPA1P TX1M_DPA1N

B2A D

NC on Park M92,M96,Madison support {22} {22} {22} {22} {22}

RAM_STRAP0 RAM_STRAP1 RAM_STRAP2 RAM_STRAP3 RAM_STRAP4

1.8V GPIO

B2A NC on Park M92,M96,Madison support

+3V_D

AR8 AU8 AP8 AW8 AR3 AR1 AU1 AU3 AW3 AP6 AW5 AU5 AR6 AW6 AU6 AT7 AV7 AN7 AV9 AT9 AR10 AW10 AU10 AP10 AV11 AT11 AR12 AW12 AU12 AP12

DVPCNTL_MVP_0 DVPCNTL_MVP_1 DVPCNTL_0 DVPCNTL_1 DVPCNTL_2 DVPCLK DVPDATA_0 DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8 DVPDATA_9 DVPDATA_10 DVPDATA_11 DVPDATA_12 DVPDATA_13 DVPDATA_14 DVPDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22 DVPDATA_23

TX2P_DPA0P TX2M_DPA0N TXCBP_DPB3P TXCBM_DPB3N TX3P_DPB2P TX3M_DPB2N

DPB

TX4P_DPB1P TX4M_DPB1N TX5P_DPB0P TX5M_DPB0N TXCCP_DPC3P TXCCM_DPC3N TX0P_DPC2P TX0M_DPC2N DPC

TX1P_DPC1P TX1M_DPC1N TX2P_DPC0P TX2M_DPC0N TXCDP_DPD3P TXCDM_DPD3N TX3P_DPD2P TX3M_DPD2N

DPD

SCL must be tied high if not used

R473 EV@10K/F_4

R469 EV@10K/F_4

I2C AK26 AJ26

C

SYS_SHDN#

{22} {22}

{3,35}

VGA_TEMP_FAIL

Q46

2

B2A

*EV@2N7002_200MA

SCL SDA

{22} GFX_CORE_CNTRL2 1

{22,23} LVDS_BLON {22} GPU_GPIO8 {22} GPU_GPIO9 {22} GPU_GPIO10 {22} RAM_CFG0 {22} RAM_CFG1 {22} RAM_CFG2

T32

{41} GFX_CORE_CNTRL1

C3A

TjMax = 110 change by VBIOS

VGA_TEMP_FAIL

R478

CLK_VGA_27M_SS_R

{22} ALT#_GPIO17

T29

*EV@SHORT_4 {41} GFX_CORE_CNTRL0

T28 R479 EV@10K/F_4

{22} GPU_GPIO22

B2A

CLK_VGA_27M_SS_R R172 *EV@10K/F_4

T49 *EV@10K_4 T47

R724

B2A

M92,M96 GPIO_21 pin control BB function.Park,Madison no suport.

{2} JTAG_TCK +3V_D

R723

*EV@10K_4 T15

T23 JTAG need Option2 for T27 Park,Madison Engineer sample. T21 T22 T14

B2A

B

TX5P_DPD0P TX5M_DPD0N

M96,Madison-->support Ball AH26-->HPD5 Ball AH24-->HPD6 M92,Park-->No support

AH20 AH18 AN16 AH23 AJ23 AH17 AJ17 AK17 AJ13 AH15 AJ16 AK16 AL16 AM16 AM14 AM13 AK14 AG30 AN14 AM17 AL13 AJ14 AK13 AN13 AM23 AN23 AK23 AL24 AM24 AJ19 AK19 AJ20 AK20 AJ24 AH26 AH24 AK24

GPIO_0 GPIO_1 GPIO_2 GPIO_3_SMBDATA GPIO_4_SMBCLK GPIO_5_AC_BATT GPIO_6 GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL_0 GPIO_16_SSIN GPIO_17_THERMAL_INT GPIO_18_HPD3 GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21_BB_EN GPIO_22_ROMCSB GPIO_23_CLKREQB JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO GENERICA GENERICB GENERICC GENERICD GENERICE_HPD4 GENERICF GENERICG

G GB B BB

DAC1

HSYNC VSYNC RSET AVDD AVSSQ VDD1DI VSS1DI R2 R2B G2 G2B B2 B2B C Y COMP

+1.8V_GPU

+1.8V_GPU

C218

C242

C279

EV@10U/6.3V_8X

EV@1U/6.3V_4X

[email protected]/10V_4X

HPD1

{14} EXT_HDMI_HPD

A2VDD

Place close to Chip

AH13

A2VDDQ VREFG A2VSSQ R2SET

VREFG R517 EV@249/F_4

C267

C268

EV@10U/6.3V_8X

EV@1U/6.3V_4X

[email protected]/10V_4X

DDC/AUX

C735 PLL/CLOCK [email protected]/10V_4X

DPLL_PVDD

DPLL_VDDC

C3A R108 R445

EV@100/F_4

R451

AUX1P AUX1N

DPLL_VDDC

DDC2CLK DDC2DATA

*EV@SHORT_4 XTALI_27M XTALO_27M

EV@120/F_4

Y3 *EV@27MHZ_20

*EV@0_4 *EV@0_4

{22} {22}

1

R448 *EV@1M/F_4

R449 R447

AV33 AU34

AF29 AG29

GPU_D+ GPU_D-

XTALIN XTALOUT

AUX2P AUX2N

DPLUS DMINUS

THERMAL

*EV@27P/50V_4N

AK32 AJ32 AJ33

TS_FDO TSVDD TSVSS

DPLL_VDDC

C274

C272

C273

EV@10U/6.3V_8X

EV@1U/6.3V_4X

[email protected]/10V_4X

DDC6CLK DDC6DATA NC_DDCCLK_AUX7P NC_DDCDATA_AUX7N

B2A

120 ohm/300mA L14 EV@BLM15BD121SN1D_300MA

DDCCLK_AUX4P DDCDATA_AUX4N DDCCLK_AUX5P DDCDATA_AUX5N

T9 TS_VDD

+1V_GPU

AN31

DDC1CLK DDC1DATA

DPLL_PVDD DPLL_PVSS

DDCCLK_AUX3P DDCDATA_AUX3N

A

C682

AM32 AN32

*EV@27P/50V_4N 2

C684

EXT_HDMITX2P {14} EXT_HDMITX2N {14}

TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N

AR30 AT29 AV31 AU30 AR32 AT31

T43 T44

TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N

T42 T41

TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N TXOUT_U3P TXOUT_U3N

AK35 AL36

T37 T38

AJ38 AK37

T39 T35

AH35 AJ36

D

T4 T36

AG38 AH37

LVDS

T40 T5

AF35 AG36

LVTMDP

T2 T7

AU14 AV13

TXCLK_LP_DPE3P TXCLK_LN_DPE3N

AT15 AR14

TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N

AU16 AV15

TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N

B2A

AT17 AR16

{23} {23}

HDMI

T1 T8

AT33 AU32

EV_LVDS_BRIGHT EV_LVDS_VDDEN

TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N

Park Channel D-->No support M92 Channel C&D-->No support

AU20 AT19

TXOUT_L3P TXOUT_L3N

AP34 AR34

EV_TXLCLKOUT+ {23} EV_TXLCLKOUT- {23}

AW37 AU35

EV_TXLOUT0+ {23} EV_TXLOUT0- {23}

AR37 AU39

EV_TXLOUT1+ {23} EV_TXLOUT1- {23}

AP35 AR35

EV_TXLOUT2+ {23} EV_TXLOUT2- {23}

AN36 AP37

AT21 AR20 AU22 AV21

EV@Madison/Park_M2

AT23 AR22

AD39 AD37

EXT_CRT_RED

AE36 AD35

EXT_CRT_GRN

{23}

AF37 AE38

EXT_CRT_BLU

{23}

AC36 AC38

EXT_HSYNC EXT_VSYNC

AB34

R105

EXT_HSYNC EXT_VSYNC

R438 EV@150/F_4

{22,23} {22,23}

R437 EV@150/F_4

{23}

R436 EV@150/F_4

EV@499/F_4

AD34 AE34

AVDD

AC33 AC34

VDD1DI

AC30 AC31 AD30 AD31 AF30 AF31 AC32 AD32 AF32 T10

AD29 AC29 AG31 AG32

V2SYNC

{22}

VDD1DI +1.8V_GPU

AG33 AD33

+3V_D

(1.8V@70mA AVDD)

L4

120 ohm/300mA EV@BLM15BD121SN1D_300MA

A2VDDQ C275 [email protected]/10V_4X

AF33 AA29

(3.3V@130mA A2VDD)

AVDD

R121

C220 [email protected]/10V_4X

EV@715/F_4

C214 EV@1U/6.3V_4X

C211 EV@10U/6.3V_8X

(1.8V@45mA VDD1DI/ 50mA VFF2D) L3

120 ohm/300mA EV@BLM15BD121SN1D_300MA

DPLL_PVDD

C265

27M_CLK

TXCLK_UP_DPF3P TXCLK_UN_DPF3N

AT27 AR26

AK27 AJ27

VDD1DI

120 ohm/300mA EV@BLM15BD121SN1D_300MA

{2}

EXT_HDMITX1P {14} EXT_HDMITX1N {14}

TS_VDD

5mA (5mils)

L12

AU26 AV25

VARY_BL DIGON

B

H2SYNC V2SYNC

R514 EV@499/F_4

+1.8V_GPU

EXT_HDMITX0P {14} EXT_HDMITX0N {14}

DAC2

VDD2DI VSS2DI

120 ohm/300mA EV@BLM15BD121SN1D_300MA

EXT_HDMICLK+ {14} EXT_HDMICLK- {14}

AT25 AR24

C

R RB

+1.8V(20mA)

L5

LVDS CONTROL

AU24 AV23

SCL SDA GENERAL PURPOSE I/O

{22} GPU_GPIO0 {22} GPU_GPIO1 {22} GPU_GPIO2 {22} GPIO3_SMBDAT {22} GPIO4_SMBCLK {22} PWR_PSI#

3

SYS_SHDN#

TX4P_DPD1P TX4M_DPD1N

1

Madison,Park-->125mA (10mils) M92,M96-->300mA(20mils)

AM26 AN26 AM27 AL27

EV_HDMI_DDCCK EV_HDMI_DDCDAT T6 T13

EV_CRTDCLK EV_CRTDDAT T20 T46 T25 T48

AK30 AK29

{23} {23}

C189 EV@10U/6.3V_8X

+1.8V_GPU

([email protected] A2VDDQ)

CRT

Port 3 M96,Madison,Park-->support M92-->No support

Port 4 M96,Madison-->support M92,Park-->No support

AL29 AM29

AJ30 AJ31

C196 EV@1U/6.3V_4X

A2VDDQ

AL30 AM30

AN21 AM21

C193 [email protected]/10V_4X

HDMI

B2A

AM19 AL19 AN20 AM20

{14} {14}

C276 *[email protected]/10V_4X

120 ohm/300mA L10

EV@BLM15BD121SN1D_300MA

C255 *EV@1U/6.3V_4X

B2A

A

T45 T18 EV_LVDS_DDCCLK EV_LVDS_DDCDAT T11 T3

B2A

{23} {23}

LVDS

Port7 Madison-->support M92,M96,Park-->No support

Quanta Computer Inc.

EV@Madison/Park_M2

PROJECT : BL6 Size

Document Number

Rev A1A

Madison/Park-HOST I/F Date: 5

4

3

2

Saturday, April 10, 2010

Sheet 1

16

of

45

5

VMA_MA[13..0]

{18} VMA_MA[13..0]

VMA_BA0 VMA_BA1 VMA_BA2

VMA_BA0 VMA_BA1 VMA_BA2

C

B2A +1.5V_GPU

C3A 9X@100/F_4 [email protected]/F_4

Rb

R745

R162 EV@100/F_4

Place close to Chip

C369 [email protected]/10V_4X +1.5V_GPU

B

+1.5V_GPU

C37 C35 A35 E34 G32 D33 F32 E32 D31 F30 C30 A30 F28 C28 A28 E28 D27 F26 C26 A26 F24 C24 A24 E24 C22 A22 F22 D21 A20 F20 D19 E18 C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10 G13 H13 J13 H11 G10 G8 K9 K10 G9 A8 C8 E8 A6 C6 E6 A5

MVREFDA MVREFSA

L18 L20

R125 R187 R202

MP@243/F_4 MP@243/F_4 M@243/F_4

L27 N12 AG12

R204 R128 R223

EV@243/F_4 MP@243/F_4 M@243/F_4

M12 M27 AH12

DQA0_0/DQA_0 DQA0_1/DQA_1 DQA0_2/DQA_2 DQA0_3/DQA_3 DQA0_4/DQA_4 DQA0_5/DQA_5 DQA0_6/DQA_6 DQA0_7/DQA_7 DQA0_8/DQA_8 DQA0_9/DQA_9 DQA0_10/DQA_10 DQA0_11/DQA_11 DQA0_12/DQA_12 DQA0_13/DQA_13 DQA0_14/DQA_14 DQA0_15/DQA_15 DQA0_16/DQA_16 DQA0_17/DQA_17 DQA0_18/DQA_18 DQA0_19/DQA_19 DQA0_20/DQA_20 DQA0_21/DQA_21 DQA0_22/DQA_22 DQA0_23/DQA_23 DQA0_24/DQA_24 DQA0_25/DQA_25 DQA0_26/DQA_26 DQA0_27/DQA_27 DQA0_28/DQA_28 DQA0_29/DQA_29 DQA0_30/DQA_30 DQA0_31/DQA_31 DQA1_0/DQA_32 DQA1_1/DQA_33 DQA1_2/DQA_34 DQA1_3/DQA_35 DQA1_4/DQA_36 DQA1_5/DQA_37 DQA1_6/DQA_38 DQA1_7/DQA_39 DQA1_8/DQA_40 DQA1_9/DQA_41 DQA1_10/DQA_42 DQA1_11/DQA_43 DQA1_12/DQA_44 DQA1_13/DQA_45 DQA1_14/DQA_46 DQA1_15/DQA_47 DQA1_16/DQA_48 DQA1_17/DQA_49 DQA1_18/DQA_50 DQA1_19/DQA_51 DQA1_20/DQA_52 DQA1_21/DQA_53 DQA1_22/DQA_54 DQA1_23/DQA_55 DQA1_24/DQA_56 DQA1_25/DQA_57 DQA1_26/DQA_58 DQA1_27/DQA_59 DQA1_28/DQA_60 DQA1_29/DQA_61 DQA1_30/DQA_62 DQA1_31/DQA_63

MAA0_0/MAA_0 MAA0_1/MAA_1 MAA0_2/MAA_2 MAA0_3/MAA_3 MAA0_4/MAA_4 MAA0_5/MAA_5 MAA0_6/MAA_6 MAA0_7/MAA_7 MAA1_0/MAA_8 MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12 MAA1_5/MAA_13_BA2 MAA1_6/MAA_14_BA0 MAA1_7/MAA_A15_BA1

WCKA0_0/DQMA_0 WCKA0B_0/DQMA_1 WCKA0_1/DQMA_2 WCKA0B_1/DQMA_3 WCKA1_0/DQMA_4 WCKA1B_0/DQMA_5 WCKA1_1/DQMA_6 WCKA1B_1/DQMA_7 GDDR5/DDR2/GDDR3 EDCA0_0/QSA_0/RDQSA_0 EDCA0_1/QSA_1/RDQSA_1 EDCA0_2/QSA_2/RDQSA_2 EDCA0_3/QSA_3/RDQSA_3 EDCA1_0/QSA_4/RDQSA_4 EDCA1_1/QSA_5/RDQSA_5 EDCA1_2/QSA_6/RDQSA_6 EDCA1_3/QSA_7/RDQSA_7

DDBIA0_0/QSA_0B/WDQSA_0 DDBIA0_1/QSA_1B/WDQSA_1 DDBIA0_2/QSA_2B/WDQSA_2 DDBIA0_3/QSA_3B/WDQSA_3 DDBIA1_0/QSA_4B/WDQSA_4 DDBIA1_1/QSA_5B/WDQSA_5 DDBIA1_2/QSA_6B/WDQSA_6 DDBIA1_3/QSA_7B/WDQSA_7 ADBIA0/ODTA0 ADBIA1/ODTA1 CLKA0 CLKA0B CLKA1 CLKA1B RASA0B RASA1B CASA0B CASA1B CSA0B_0 CSA0B_1 CSA1B_0 CSA1B_1

MVREFDA MVREFSA

CKEA0 CKEA1

MEM_CALRN0 MEM_CALRN1 MEM_CALRN2

WEA0B WEA1B

MEM_CALRP1 MEM_CALRP0 MEM_CALRP2

MAA0_8 MAA1_8

AL31 R746

A32 C32 D23 E22 C14 A14 E10 D9

VMA_DM0 VMA_DM1 VMA_DM2 VMA_DM3 VMA_DM4 VMA_DM5 VMA_DM6 VMA_DM7

C34 D29 D25 E20 E16 E12 J10 D7

VMA_RDQS0 VMA_RDQS1 VMA_RDQS2 VMA_RDQS3 VMA_RDQS4 VMA_RDQS5 VMA_RDQS6 VMA_RDQS7

QSA[7..0]

A34 E30 E26 C20 C16 C12 J11 F8

VMA_WDQS0 VMA_WDQS1 VMA_WDQS2 VMA_WDQS3 VMA_WDQS4 VMA_WDQS5 VMA_WDQS6 VMA_WDQS7

QSA#[7..0]

{19} {19} {19}

VMB_DQ0 VMB_DQ1 VMB_DQ2 VMB_DQ3 VMB_DQ4 VMB_DQ5 VMB_DQ6 VMB_DQ7 VMB_DQ8 VMB_DQ9 VMB_DQ10 VMB_DQ11 VMB_DQ12 VMB_DQ13 VMB_DQ14 VMB_DQ15 VMB_DQ16 VMB_DQ17 VMB_DQ18 VMB_DQ19 VMB_DQ20 VMB_DQ21 VMB_DQ22 VMB_DQ23 VMB_DQ24 VMB_DQ25 VMB_DQ26 VMB_DQ27 VMB_DQ28 VMB_DQ29 VMB_DQ30 VMB_DQ31 VMB_DQ32 VMB_DQ33 VMB_DQ34 VMB_DQ35 VMB_DQ36 VMB_DQ37 VMB_DQ38 VMB_DQ39 VMB_DQ40 VMB_DQ41 VMB_DQ42 VMB_DQ43 VMB_DQ44 VMB_DQ45 VMB_DQ46 VMB_DQ47 VMB_DQ48 VMB_DQ49 VMB_DQ50 VMB_DQ51 VMB_DQ52 VMB_DQ53 VMB_DQ54 VMB_DQ55 VMB_DQ56 VMB_DQ57 VMB_DQ58 VMB_DQ59 VMB_DQ60 VMB_DQ61 VMB_DQ62 VMB_DQ63

VMB_MA[13..0]

{19} VMB_MA[13..0]

VMB_BA0 VMB_BA1 VMB_BA2

VMB_BA0 VMB_BA1 VMB_BA2

VMA_ODT0 {18} VMA_ODT1 {18}

H27 G27

VMA_CLK0 VMA_CLK0#

J14 H14

VMA_CLK1 VMA_CLK1#

K23 K19

VMA_RAS0# VMA_RAS1#

K20 K17

VMA_CAS0# VMA_CAS1#

K24 K27

VMA_CS0#

M13 K16

VMA_CS1#

K21 J20

VMA_CKE0 VMA_CKE1

K26 L15

VMA_WE0# VMA_WE1#

H23 J19

VMA_MA13

VMA_CLK0 {18} VMA_CLK0# {18} VMA_CLK1 {18} VMA_CLK1# {18} VMA_RAS0# VMA_RAS1#

{18} {18}

VMA_CAS0# VMA_CAS1#

{18} {18}

+1.5V_GPU

C3A

VMA_CS0# {18}

R748 VMA_CS1# {18}

Ra

R194 [email protected]/F_4

VMA_WE0# VMA_WE1#

{18} {18}

Rb

R193 EV@100/F_4

C5 C3 E3 E1 F1 F3 F5 G4 H5 H6 J4 K6 K5 L4 M6 M1 M3 M5 N4 P6 P5 R4 T6 T1 U4 V6 V1 V3 Y6 Y1 Y3 Y5 AA4 AB6 AB1 AB3 AD6 AD1 AD3 AD5 AF1 AF3 AF6 AG4 AH5 AH6 AJ4 AK3 AF8 AF9 AG8 AG7 AK9 AL7 AM8 AM7 AK1 AL4 AM6 AM1 AN4 AP3 AP1 AP5

9X@100/F_4

Place close to Chip

VMA_CKE0 {18} VMA_CKE1 {18}

only for Madison 128x16 support [16M x 16 x 8] = 2048MBits

B2A

C3A

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_BA2 VMA_BA0 VMA_BA1

J21 G19

VMB_WDQS[7..0]

{19} VMB_WDQS[7..0]

G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17

U20D DDR2 GDDR3/GDDR5 DDR3

VMB_RDQS[7..0]

{19} VMB_RDQS[7..0]

C401 [email protected]/10V_4X

MVREFDB MVREFSB

Y12 AA12

DDR2 GDDR5/GDDR3 DDR3

DQB0_0/DQB_0 DQB0_1/DQB_1 DQB0_2/DQB_2 DQB0_3/DQB_3 DQB0_4/DQB_4 DQB0_5/DQB_5 DQB0_6/DQB_6 DQB0_7/DQB_7 DQB0_8/DQB_8 DQB0_9/DQB_9 DQB0_10/DQB_10 DQB0_11/DQB_11 DQB0_12/DQB_12 DQB0_13/DQB_13 DQB0_14/DQB_14 DQB0_15/DQB_15 DQB0_16/DQB_16 DQB0_17/DQB_17 DQB0_18/DQB_18 DQB0_19/DQB_19 DQB0_20/DQB_20 DQB0_21/DQB_21 DQB0_22/DQB_22 DQB0_23/DQB_23 DQB0_24/DQB_24 DQB0_25/DQB_25 DQB0_26/DQB_26 DQB0_27/DQB_27 DQB0_28/DQB_28 DQB0_29/DQB_29 DQB0_30/DQB_30 DQB0_31/DQB_31 DQB1_0/DQB_32 DQB1_1/DQB_33 DQB1_2/DQB_34 DQB1_3/DQB_35 DQB1_4/DQB_36 DQB1_5/DQB_37 DQB1_6/DQB_38 DQB1_7/DQB_39 DQB1_8/DQB_40 DQB1_9/DQB_41 DQB1_10/DQB_42 DQB1_11/DQB_43 DQB1_12/DQB_44 DQB1_13/DQB_45 DQB1_14/DQB_46 DQB1_15/DQB_47 DQB1_16/DQB_48 DQB1_17/DQB_49 DQB1_18/DQB_50 DQB1_19/DQB_51 DQB1_20/DQB_52 DQB1_21/DQB_53 DQB1_22/DQB_54 DQB1_23/DQB_55 DQB1_24/DQB_56 DQB1_25/DQB_57 DQB1_26/DQB_58 DQB1_27/DQB_59 DQB1_28/DQB_60 DQB1_29/DQB_61 DQB1_30/DQB_62 DQB1_31/DQB_63

MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8 MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12 MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1

WCKB0_0/DQMB_0 WCKB0B_0/DQMB_1 WCKB0_1/DQMB_2 WCKB0B_1/DQMB_3 WCKB1_0/DQMB_4 WCKB1B_0/DQMB_5 WCKB1_1/DQMB_6 WCKB1B_1/DQMB_7 GDDR5/DDR2/GDDR3 EDCB0_0/QSB_0/RDQSB_0 EDCB0_1/QSB_1/RDQSB_1 EDCB0_2/QSB_2/RDQSB_2 EDCB0_3/QSB_3/RDQSB_3 EDCB1_0/QSB_4/RDQSB_4 EDCB1_1/QSB_5/RDQSB_5 EDCB1_2/QSB_6/RDQSB_6 EDCB1_3/QSB_7/RDQSB_7

DDBIB0_0/QSB_0B/WDQSB_0 DDBIB0_1/QSB_1B/WDQSB_1 DDBIB0_2/QSB_2B/WDQSB_2 DDBIB0_3/QSB_3B/WDQSB_3 DDBIB1_0/QSB_4B/WDQSB_4 DDBIB1_1/QSB_5B/WDQSB_5 DDBIB1_2/QSB_6B/WDQSB_6 DDBIB1_3/QSB_7B/WDQSB_7 ADBIB0/ODTB0 ADBIB1/ODTB1 CLKB0 CLKB0B CLKB1 CLKB1B RASB0B RASB1B CASB0B CASB1B CSB0B_0 CSB0B_1 CSB1B_0 CSB1B_1 CKEB0 CKEB1

MVREFDB MVREFSB

WEB0B WEB1B +3V_D

R428 R427

*EV@10K_4 EV@10K_4 CLKTESTA CLKTESTB

AD28 AK10 AL10

GDDR5

D

VMA_DQ0 VMA_DQ1 VMA_DQ2 VMA_DQ3 VMA_DQ4 VMA_DQ5 VMA_DQ6 VMA_DQ7 VMA_DQ8 VMA_DQ9 VMA_DQ10 VMA_DQ11 VMA_DQ12 VMA_DQ13 VMA_DQ14 VMA_DQ15 VMA_DQ16 VMA_DQ17 VMA_DQ18 VMA_DQ19 VMA_DQ20 VMA_DQ21 VMA_DQ22 VMA_DQ23 VMA_DQ24 VMA_DQ25 VMA_DQ26 VMA_DQ27 VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ31 VMA_DQ32 VMA_DQ33 VMA_DQ34 VMA_DQ35 VMA_DQ36 VMA_DQ37 VMA_DQ38 VMA_DQ39 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ44 VMA_DQ45 VMA_DQ46 VMA_DQ47 VMA_DQ48 VMA_DQ49 VMA_DQ50 VMA_DQ51 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ55 VMA_DQ56 VMA_DQ57 VMA_DQ58 VMA_DQ59 VMA_DQ60 VMA_DQ61 VMA_DQ62 VMA_DQ63

DDR2 GDDR5/GDDR3 DDR3

GDDR5

VMA_WDQS[7..0]

VMB_DM[7..0]

{19} VMB_DM[7..0]

U20C DDR2 GDDR3/GDDR5 DDR3

VMA_RDQS[7..0]

{18} VMA_WDQS[7..0]

Ra

1

VMB_DQ[63..0]

{19} VMB_DQ[63..0]

VMA_DM[7..0]

{18} VMA_RDQS[7..0]

R168

2

MEMORY INTERFACE B

VMA_DQ[63..0]

{18} VMA_DM[7..0]

{18} {18} {18}

3

WWW.ROSEFIX.COM MEMORY INTERFACE A

{18} VMA_DQ[63..0]

4

TESTEN CLKTESTA CLKTESTB

MAB0_8 MAB1_8

DRAM_RST

P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_BA2 VMB_BA0 VMB_BA1

H3 H1 T3 T5 AE4 AF5 AK6 AK5

VMB_DM0 VMB_DM1 VMB_DM2 VMB_DM3 VMB_DM4 VMB_DM5 VMB_DM6 VMB_DM7

F6 K3 P3 V5 AB5 AH1 AJ9 AM5

VMB_RDQS0 VMB_RDQS1 VMB_RDQS2 VMB_RDQS3 VMB_RDQS4 VMB_RDQS5 VMB_RDQS6 VMB_RDQS7

QSB[7..0]

G7 K1 P1 W4 AC4 AH3 AJ8 AM3

VMB_WDQS0 VMB_WDQS1 VMB_WDQS2 VMB_WDQS3 VMB_WDQS4 VMB_WDQS5 VMB_WDQS6 VMB_WDQS7

QSB#[7..0]

T7 W7 VMB_CLK0 VMB_CLK0#

AD8 AD7

VMB_CLK1 VMB_CLK1#

T10 Y10

VMB_RAS0# VMB_RAS1#

W10 AA10

VMB_CAS0# VMB_CAS1#

P10 L10

VMB_CS0#

AD10 AC10

VMB_CS1#

U10 AA11

VMB_CKE0 VMB_CKE1

N10 AB11

VMB_WE0# VMB_WE1#

AH11

C

VMB_ODT0 {19} VMB_ODT1 {19}

L9 L8

T8 W8

D

VMB_CLK0 {19} VMB_CLK0# {19} VMB_CLK1 {19} VMB_CLK1# {19} VMB_RAS0# VMB_RAS1#

{19}

VMB_CS1#

{19}

VMB_CKE0 VMB_CKE1

{19} {19}

VMB_WE0# VMB_WE1#

{19} {19}

R156 [email protected]/F_4

for Park/Madison 128x16 support [16M x 16 x 8] = 2048MBits MEM_RST# {18,19} B

R627

C3A

EV@Madison/Park_M2

Ra

R188 [email protected]/F_4

9X@100/F_4

B2A Rb

R155 EV@100/F_4

C345 [email protected]/10V_4X

Ball Name

DDR3/GDDR3 Memory Stuff Option Madsion/Park MVDDQ

GDDR3

DDR3

M96

M92

MVREFDA

Madison V

Park V

V

V

MVREFSA

V

V

V

V

MVREFDB

V

V

V

V

MVREFSB

V

V

V

V

MEM_CALRN0

V

V

MEM_CALRN1

V

V

MEM_CALRN2

V

MEM_CALRP0

V

V

MEM_CALRP1

V

V

MEM_CALRP2

V

Ball H23,T8 M92,M96-M2-->RSVD.Can not support 128M*16 VMEM

+1.5V_GPU

RSVD

EV@Madison/Park_M2 9X@100/F_4

B2A

EV@51_4

R747

Ra

{19} {19}

VMB_CS0#

VMB_MA13 R577

{19} {19}

VMB_CAS0# VMB_CAS1#

Rb

R182 EV@100/F_4

C440 *[email protected]/10V_4X

C434 *[email protected]/10V_4X

R221 *[email protected]/F_6

R215 *[email protected]/F_6

C398 [email protected]/10V_4X

C789 EV@68P/50V_4C

R562

[email protected]_4

+1.5V_GPU

C3A

MP@10K_4

CLKTESTA/CLKTESTB Differemtial only Single 50 ohm Diff 100 ohm

B2A

1.8V/1.5 1.5V

Ra

40.2R

40.2R

Rb

100R

100R

M96/M92

GDDR3

DDR3

MVDDQ

1.8V/1.5 1.5V

Ra

40.2R

100R

Rb

100R

100R

TESTEN 0 1

Description Internal Debug use only JTAG signals enable

A

A

C3A

V

V

Quanta Computer Inc. PROJECT : BL6 Size

Document Number

Date:

Saturday, April 10, 2010

Rev A1A

Madison/Park-MEM I/F 5

4

3

2

Sheet 1

17

of

45

5

{17} VMA_DQ[63..0] {17} VMA_DM[7..0] {17} VMA_RDQS[7..0] {17} VMA_WDQS[7..0] {17} VMA_MA[13..0]

4

3

2

WWW.ROSEFIX.COM VMA_DQ[63..0]

CHANNEL A: 512MB DDR3 (64M*16*4pcs)

VMA_DM[7..0]

VMA_RDQS[7..0]

QSA[7..0]

VMA_WDQS[7..0]

QSA#[7..0]

VMA_MA[13..0]

D

1

U6

{17} {17} {17} {17} {17} {17} {17} {17} {17} {17} {17} {17} {17} {17}

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13

{17} {17} {17}

VMA_BA0 VMA_BA1 VMA_BA2

{17} {17} {17}

VMA_CLK0 VMA_CLK0# VMA_CKE0

{17} {17} {17} {17} {17}

VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0#

C

VREFC_VMA1 VREFD_VMA1

M8 H1

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

VMA_BA0 VMA_BA1 VMA_BA2

M2 N8 M3

VMA_CLK0 VMA_CLK0# VMA_CKE0

J7 K7 K9

VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0#

K1 L2 J3 K3 L3

VMA_RDQS3 VMA_RDQS1

F3 C7

VMA_DM3 VMA_DM1

E7 D3

VMA_WDQS3 VMA_WDQS1

G3 B7

MEM_RST#

T2

{17,19} MEM_RST# VMA_ZQ1

L8

U19

VREFCA VREFDQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

CK CK CKE ODT CS RAS CAS WE DQSL DQSU

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

DML DMU

VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

DQSL DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3

VMA_DQ30 VMA_DQ27 VMA_DQ29 VMA_DQ26 VMA_DQ28 VMA_DQ24 VMA_DQ31 VMA_DQ25 VMA_DQ12 VMA_DQ15 VMA_DQ8 VMA_DQ13 VMA_DQ10 VMA_DQ11 VMA_DQ9 VMA_DQ14

VREFC_VMA2 VREFD_VMA2

M8 H1

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

VMA_BA0 VMA_BA1 VMA_BA2

M2 N8 M3

VMA_CLK0 VMA_CLK0# VMA_CKE0

J7 K7 K9

+1.5V_GPU

BA0 BA1 BA2

R113 MEV@243/F_4 J1 L1 J9 L9

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GPU A1 A8 C1 C9 D2 E9 F1 H2 H9

VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0#

K1 L2 J3 K3 L3

VMA_RDQS2 VMA_RDQS0

F3 C7

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

VMA_DM2 VMA_DM0

E7 D3

VMA_WDQS2 VMA_WDQS0

G3 B7

MEM_RST#

T2

VMA_ZQ2

B1 B9 D1 D8 E2 E8 F9 G1 G9

L8

VREFCA VREFDQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2

CK CK CKE ODT CS RAS CAS WE DQSL DQSU DML DMU DQSL DQSU

RESET ZQ

R472 MEV@243/F_4 J1 L1 J9 L9

100-BALL SDRAM DDR3 MEV@VRAM _DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

NC#J1 NC#L1 NC#J9 NC#L9

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

E3 F7 F2 F8 H3 H8 G2 H7

VMA_DQ19 VMA_DQ22 VMA_DQ18 VMA_DQ21 VMA_DQ16 VMA_DQ20 VMA_DQ17 VMA_DQ23

D7 C3 C8 C2 A7 A2 B8 A3

VMA_DQ4 VMA_DQ3 VMA_DQ7 VMA_DQ0 VMA_DQ5 VMA_DQ1 VMA_DQ6 VMA_DQ2

U9 VREFC_VMA3 VREFD_VMA3

M8 H1

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

VMA_BA0 VMA_BA1 VMA_BA2

M2 N8 M3

VMA_CLK1 VMA_CLK1# VMA_CKE1

J7 K7 K9

+1.5V_GPU VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GPU A1 A8 C1 C9 D2 E9 F1 H2 H9

{17} {17} {17}

VMA_CLK1 VMA_CLK1# VMA_CKE1

{17} {17} {17} {17} {17}

VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1#

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1#

K1 L2 J3 K3 L3

VMA_RDQS4 VMA_RDQS6

F3 C7

VMA_DM4 VMA_DM6

E7 D3

VMA_WDQS4 VMA_WDQS6

G3 B7

MEM_RST#

T2

VMA_ZQ3

B1 B9 D1 D8 E2 E8 F9 G1 G9

L8

J1 L1 J9 L9

BOT Left

Group-A0 VREF

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

CK CK CKE ODT CS RAS CAS WE DQSL DQSU

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

DML DMU

VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

DQSL DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

E3 F7 F2 F8 H3 H8 G2 H7

VMA_DQ38 VMA_DQ34 VMA_DQ36 VMA_DQ35 VMA_DQ39 VMA_DQ32 VMA_DQ37 VMA_DQ33

VREFC_VMA4 VREFD_VMA4

M8 H1

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

D7 C3 C8 C2 A7 A2 B8 A3

VMA_DQ51 VMA_DQ50 VMA_DQ49 VMA_DQ48 VMA_DQ55 VMA_DQ54 VMA_DQ52 VMA_DQ53

VMA_BA0 VMA_BA1 VMA_BA2

M2 N8 M3

VMA_CLK1 VMA_CLK1# VMA_CKE1

J7 K7 K9

A1 A8 C1 C9 D2 E9 F1 H2 H9

VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1#

K1 L2 J3 K3 L3

VMA_RDQS7 VMA_RDQS5

F3 C7

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

VMA_DM7 VMA_DM5

E7 D3

VMA_WDQS7 VMA_WDQS5

G3 B7

MEM_RST#

T2

+1.5V_GPU

BA0 BA1 BA2

R151 MEV@243/F_4

100-BALL SDRAM DDR3 MEV@VRAM _DDR3

TOP Left

U22

VREFCA VREFDQ

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GPU

VMA_ZQ4

B1 B9 D1 D8 E2 E8 F9 G1 G9

L8

VREFCA VREFDQ

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VMA_DQ57 VMA_DQ60 VMA_DQ58 VMA_DQ62 VMA_DQ56 VMA_DQ63 VMA_DQ59 VMA_DQ61

D7 C3 C8 C2 A7 A2 B8 A3

VMA_DQ43 VMA_DQ44 VMA_DQ40 VMA_DQ42 VMA_DQ45 VMA_DQ46 VMA_DQ41 VMA_DQ47

D

+1.5V_GPU

BA0 BA1 BA2

B2 D9 G7 K2 K8 N1 N9 R1 R9

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

CK CK CKE ODT CS RAS CAS WE

+1.5V_GPU A1 A8 C1 C9 D2 E9 F1 H2 H9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

DQSL DQSU DML DMU

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

DQSL DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

C

B1 B9 D1 D8 E2 E8 F9 G1 G9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

R516 EV@243/F_4 J1 L1 J9 L9

E3 F7 F2 F8 H3 H8 G2 H7

100-BALL SDRAM DDR3 MEV@VRAM _DDR3

100-BALL SDRAM DDR3 MEV@VRAM _DDR3

BOT Right

TOP Right

Group-A1 VREF +1.5V_GPU

+1.5V_GPU

+1.5V_GPU

+1.5V_GPU

+1.5V_GPU

+1.5V_GPU

+1.5V_GPU

+1.5V_GPU

B

B

R124 [email protected]/F_4

R138 [email protected]/F_4

VREFC_VMA1 R120 [email protected]/F_4

R477 [email protected]/F_4

VREFD_VMA1 C286 [email protected]/10V_4X

R147 [email protected]/F_4

R452 [email protected]/F_4

VREFC_VMA2 C314 [email protected]/10V_4X

R475 [email protected]/F_4

R166 [email protected]/F_4

VREFD_VMA2 C700 [email protected]/10V_4X

R450 [email protected]/F_4

VREFC_VMA3 C683 [email protected]/10V_4X

Group-A0 decoupling CAP

MEM_A0 CLK

R179 [email protected]/F_4

R154 [email protected]/F_4

R497 [email protected]/F_4

VREFD_VMA3 C351 [email protected]/10V_4X

R507 [email protected]/F_4

VREFC_VMA4

R186 [email protected]/F_4

C406 [email protected]/10V_4X

R503 [email protected]/F_4

VREFD_VMA4 C734 [email protected]/10V_4X

Group-A1 decoupling CAP

R506 [email protected]/F_4

C732 [email protected]/10V_4X

MEM_A1 CLK

+1.5V_GPU +1.5V_GPU VMA_CLK1 VMA_CLK0 VMA_CLK1# VMA_CLK0# C674 MEV@1U/6.3V_4X R112 [email protected]/F_4

C260 MEV@1U/6.3V_4X

C262 MEV@1U/6.3V_4X

C665 MEV@1U/6.3V_4X

C671 MEV@1U/6.3V_4X

C664 MEV@1U/6.3V_4X

C695 MEV@1U/6.3V_4X

C249 MEV@1U/6.3V_4X

C686 MEV@1U/6.3V_4X

C350 MEV@1U/6.3V_4X

C253 MEV@1U/6.3V_4X

C706 MEV@1U/6.3V_4X

C327 MEV@1U/6.3V_4X

C407 MEV@1U/6.3V_4X

C748 MEV@1U/6.3V_4X

C741 MEV@1U/6.3V_4X R195 [email protected]/F_4

R110 [email protected]/F_4

R208 [email protected]/F_4

+1.5V_GPU +1.5V_GPU

C266 [email protected]/25V_4X A

C303 MEV@1U/6.3V_4X

C687 MEV@1U/6.3V_4X

C685 MEV@1U/6.3V_4X

C254 MEV@1U/6.3V_4X

C251 MEV@1U/6.3V_4X

C257 MEV@1U/6.3V_4X

C667 MEV@1U/6.3V_4X

C737 MEV@1U/6.3V_4X

C681 MEV@1U/6.3V_4X

C717 MEV@1U/6.3V_4X

C714 MEV@1U/6.3V_4X

C334 MEV@1U/6.3V_4X

C750 MEV@1U/6.3V_4X

C745 MEV@1U/6.3V_4X

C753 MEV@1U/6.3V_4X

C429 [email protected]/25V_4X

C381 MEV@1U/6.3V_4X

A

+1.5V_GPU +1.5V_GPU

C309 MEV@10U/6.3V_8X

C675 MEV@10U/6.3V_8X

C252 MEV@10U/6.3V_8X

C676 MEV@10U/6.3V_8X

C778 MEV@10U/6.3V_8X

C689 MEV@10U/6.3V_8X

C367 MEV@10U/6.3V_8X

C713 MEV@10U/6.3V_8X

C438 MEV@10U/6.3V_8X

C701 MEV@10U/6.3V_8X

Quanta Computer Inc. PROJECT : BL6 Size

Document Number

Rev A1A

VRAM_A: DDR3-64M*16*4PCS Date: 5

4

3

2

Saturday, April 10, 2010

Sheet 1

18

of

45

5

{17} VMB_DQ[63..0] {17} VMB_DM[7..0] {17} VMB_RDQS[7..0] {17} VMB_WDQS[7..0] {17} VMB_MA[13..0]

D

3

2

1

CHANNEL B: 512MB DDR3 (64M*16*4pcs)

WWW.ROSEFIX.COM

VMB_DQ[63..0] VMB_DM[7..0]

VMB_RDQS[7..0]

QSA[7..0]

VMB_WDQS[7..0]

QSA#[7..0]

U26

U12

U11

U27

VMB_MA[13..0]

{17} {17} {17} {17} {17} {17} {17} {17} {17} {17} {17} {17} {17} {17}

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13

{17} {17} {17}

VMB_BA0 VMB_BA1 VMB_BA2

{17} VMB_CLK0 {17} VMB_CLK0# {17} VMB_CKE0 {17} {17} {17} {17} {17}

4

VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0#

C

VREFC_VMB1 VREFD_VMB1

M8 H1

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

VMB_BA0 VMB_BA1 VMB_BA2

M2 N8 M3

VMB_CLK0 VMB_CLK0# VMB_CKE0

J7 K7 K9

VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0#

K1 L2 J3 K3 L3

VMB_RDQS0 VMB_RDQS1

F3 C7

VMB_DM0 VMB_DM1

E7 D3

VMB_WDQS0 VMB_WDQS1

G3 B7

MEM_RST#

T2

{17,18} MEM_RST# VMB_ZQ1

L8

VREFCA VREFDQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2

CK CK CKE ODT CS RAS CAS WE DQSL DQSU DML DMU DQSL DQSU

RESET ZQ

R596 EV@240/F_4 J1 L1 J9 L9

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

NC#J1 NC#L1 NC#J9 NC#L9

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

E3 F7 F2 F8 H3 H8 G2 H7

VMB_DQ3 VMB_DQ5 VMB_DQ2 VMB_DQ4 VMB_DQ0 VMB_DQ7 VMB_DQ1 VMB_DQ6

D7 C3 C8 C2 A7 A2 B8 A3

VMB_DQ15 VMB_DQ10 VMB_DQ14 VMB_DQ8 VMB_DQ12 VMB_DQ9 VMB_DQ13 VMB_DQ11

VREFC_VMB2 VREFD_VMB2

M8 H1

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

VMB_BA0 VMB_BA1 VMB_BA2

M2 N8 M3

VMB_CLK0 VMB_CLK0# VMB_CKE0

J7 K7 K9

+1.5V_GPU VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GPU A1 A8 C1 C9 D2 E9 F1 H2 H9

VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0#

K1 L2 J3 K3 L3

VMB_RDQS2 VMB_RDQS3

F3 C7

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

VMB_DM2 VMB_DM3

E7 D3

VMB_WDQS2 VMB_WDQS3

G3 B7

MEM_RST#

T2

VMB_ZQ2

B1 B9 D1 D8 E2 E8 F9 G1 G9

L8

VREFCA VREFDQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

100-BALL SDRAM DDR3 EV@VRAM _DDR3

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

CK CK CKE ODT CS RAS CAS WE DQSL DQSU

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

DML DMU

VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

DQSL DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

E3 F7 F2 F8 H3 H8 G2 H7

VMB_DQ16 VMB_DQ17 VMB_DQ20 VMB_DQ18 VMB_DQ22 VMB_DQ19 VMB_DQ21 VMB_DQ23

D7 C3 C8 C2 A7 A2 B8 A3

VMB_DQ24 VMB_DQ31 VMB_DQ28 VMB_DQ30 VMB_DQ26 VMB_DQ27 VMB_DQ25 VMB_DQ29

VREFC_VMB3 VREFD_VMB3

M8 H1

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

VMB_BA0 VMB_BA1 VMB_BA2

M2 N8 M3

VMB_CLK1 VMB_CLK1# VMB_CKE1

J7 K7 K9

+1.5V_GPU

BA0 BA1 BA2

R314 EV@240/F_4 J1 L1 J9 L9

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

B2 D9 G7 K2 K8 N1 N9 R1 R9

{17} VMB_CLK1 {17} VMB_CLK1# {17} VMB_CKE1

+1.5V_GPU A1 A8 C1 C9 D2 E9 F1 H2 H9

{17} {17} {17} {17} {17}

VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1#

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1#

K1 L2 J3 K3 L3

VMB_RDQS6 VMB_RDQS5

F3 C7

VMB_DM6 VMB_DM5

E7 D3

VMB_WDQS6 VMB_WDQS5

G3 B7

MEM_RST#

T2

VMB_ZQ3

B1 B9 D1 D8 E2 E8 F9 G1 G9

L8

VREFCA VREFDQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15 BA0 BA1 BA2

CK CK CKE ODT CS RAS CAS WE DQSL DQSU

100-BALL SDRAM DDR3

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VMB_DQ55 VMB_DQ51 VMB_DQ54 VMB_DQ50 VMB_DQ52 VMB_DQ48 VMB_DQ53 VMB_DQ49

VREFC_VMB4 VREFD_VMB4

M8 H1

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7

D7 C3 C8 C2 A7 A2 B8 A3

VMB_DQ41 VMB_DQ47 VMB_DQ40 VMB_DQ45 VMB_DQ43 VMB_DQ42 VMB_DQ44 VMB_DQ46

VMB_BA0 VMB_BA1 VMB_BA2

M2 N8 M3

VMB_CLK1 VMB_CLK1# VMB_CKE1

J7 K7 K9

A1 A8 C1 C9 D2 E9 F1 H2 H9

VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1#

K1 L2 J3 K3 L3

VMB_RDQS4 VMB_RDQS7

F3 C7

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

VMB_DM4 VMB_DM7

E7 D3

VMB_WDQS4 VMB_WDQS7

G3 B7

MEM_RST#

T2

+1.5V_GPU

+1.5V_GPU

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

DQSL DQSU

RESET ZQ

NC#J1 NC#L1 NC#J9 NC#L9

E3 F7 F2 F8 H3 H8 G2 H7

B2 D9 G7 K2 K8 N1 N9 R1 R9

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

DML DMU

R241 EV@240/F_4 J1 L1 J9 L9

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

VMB_ZQ4

B1 B9 D1 D8 E2 E8 F9 G1 G9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

L8

VREFCA VREFDQ

BA0 BA1 BA2

CK CK CKE ODT CS RAS CAS WE DQSL DQSU DML DMU DQSL DQSU

RESET ZQ

R647 EV@240/F_4 J1 L1 J9 L9

100-BALL SDRAM DDR3 EV@VRAM _DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

NC#J1 NC#L1 NC#J9 NC#L9

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

E3 F7 F2 F8 H3 H8 G2 H7

VMB_DQ39 VMB_DQ33 VMB_DQ38 VMB_DQ36 VMB_DQ35 VMB_DQ32 VMB_DQ37 VMB_DQ34

D7 C3 C8 C2 A7 A2 B8 A3

VMB_DQ61 VMB_DQ56 VMB_DQ63 VMB_DQ57 VMB_DQ60 VMB_DQ58 VMB_DQ62 VMB_DQ59

D

+1.5V_GPU VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9 VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9 VSS#A9 VSS#B3 VSS#E1 VSS#G8 VSS#J2 VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9 VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

B2 D9 G7 K2 K8 N1 N9 R1 R9 +1.5V_GPU A1 A8 C1 C9 D2 E9 F1 H2 H9 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

C

B1 B9 D1 D8 E2 E8 F9 G1 G9

100-BALL SDRAM DDR3 EV@VRAM _DDR3

EV@VRAM _DDR3

BOT Down

TOP Down

TOP Up

Group-B0 VREF

Group-B1 VREF

+1.5V_GPU

B

BOT Up

+1.5V_GPU

R583 [email protected]/F_4

R651 [email protected]/F_4

VREFC_VMB1 R582 [email protected]/F_4

MEM_B0 CLK

+1.5V_GPU

R323 [email protected]/F_4

VREFD_VMB1 C779 [email protected]/10V_4X

R646 [email protected]/F_4

+1.5V_GPU

R260 [email protected]/F_4

VREFC_VMB2 C810 [email protected]/10V_4X

R322 [email protected]/F_4

+1.5V_GPU

R243 [email protected]/F_4

VREFD_VMB2 C499 [email protected]/10V_4X

R246 [email protected]/F_4

+1.5V_GPU

R318 [email protected]/F_4

VREFC_VMB3 C471 [email protected]/10V_4X

R242 [email protected]/F_4

+1.5V_GPU

R648 [email protected]/F_4

VREFD_VMB3 C457 [email protected]/10V_4X

Group-B0 decoupling CAP

Group-B1 decoupling CAP

+1.5V_GPU

+1.5V_GPU

R317 [email protected]/F_4

+1.5V_GPU

R602 [email protected]/F_4

VREFC_VMB4 C487 [email protected]/10V_4X

R649 [email protected]/F_4

B

VREFD_VMB4 C813 [email protected]/10V_4X

R613 [email protected]/F_4

C782 [email protected]/10V_4X

MEM_B1 CLK VMB_CLK1

VMB_CLK0

VMB_CLK1# C497 EV@1U/6.3V_4X

VMB_CLK0#

C784 EV@1U/6.3V_4X

C788 EV@1U/6.3V_4X

C498 EV@1U/6.3V_4X

C796 EV@1U/6.3V_4X

C476 EV@1U/6.3V_4X

C820 EV@1U/6.3V_4X

C815 EV@1U/6.3V_4X

C477 EV@1U/6.3V_4X

C455 EV@1U/6.3V_4X

C787 EV@1U/6.3V_4X

C809 EV@1U/6.3V_4X

C819 EV@1U/6.3V_4X

C491 EV@1U/6.3V_4X

C818 EV@1U/6.3V_4X R316 [email protected]/F_4

R319

R321 [email protected]/F_4

R320 +1.5V_GPU

[email protected]/F_4

+1.5V_GPU

[email protected]/F_4 C490 [email protected]/25V_4X

A

C488 [email protected]/25V_4X

C459 EV@1U/6.3V_4X

C489 EV@1U/6.3V_4X

C812 EV@1U/6.3V_4X

C402 EV@1U/6.3V_4X

C817 EV@1U/6.3V_4X

C496 EV@1U/6.3V_4X

C816 EV@1U/6.3V_4X

C495 EV@1U/6.3V_4X

C781 EV@1U/6.3V_4X

+1.5V_GPU

C822 EV@10U/6.3V_8X

C492 EV@1U/6.3V_4X

C814 EV@1U/6.3V_4X

C494 EV@1U/6.3V_4X

C811 EV@1U/6.3V_4X

C493 EV@1U/6.3V_4X

C795 EV@1U/6.3V_4X

+1.5V_GPU

C775 EV@10U/6.3V_8X

C481 EV@10U/6.3V_8X

C502 EV@10U/6.3V_8X

C823 EV@10U/6.3V_8X

C482 EV@10U/6.3V_8X

C501 EV@10U/6.3V_8X

C776 EV@10U/6.3V_8X

C500 EV@10U/6.3V_8X

Quanta Computer Inc.

C824 EV@10U/6.3V_8X

PROJECT : BL6 Size

Document Number

Rev A1A

VRAM_B: DDR3-64M*16*4PCS Date: 5

4

3

2

Saturday, April 10, 2010

Sheet 1

19

of

45

A

5

4

3

2

WWW.ROSEFIX.COM

1

For Madison and Park VDDCI and VDDC can share one common regulator

VDD/VDDQ =1.5V at 1333 VDD/VDDQ =1.8V at 1600 and 1800

MEM I/O

C736 EV@10U/6.3V_8X

C458 EV@10U/6.3V_8X

C680 *EV@10U/6.3V_8X

C752 *EV@10U/6.3V_8X

D

C416 EV@1U/6.3V_4X

C333 EV@1U/6.3V_4X

C738 EV@1U/6.3V_4X

C417 EV@1U/6.3V_4X

C393 EV@1U/6.3V_4X

C415 EV@1U/6.3V_4X

B2A C414 EV@1U/6.3V_4X

C312 EV@1U/6.3V_4X

B2A

120 ohm/300mA EV@BLM15BD121SN1D_300MA

(1.8V@17mA VDD_CT)

C261 EV@10U/6.3V_8X

C

B2A

C292 EV@1U/6.3V_4X

C298 [email protected]/10V_4X

C339 EV@1U/6.3V_4X

120 ohm/300mA L18 EV@BLM15BD121SN1D_300MA

VDDR4,VDDR5 Park,Madison-->1.8V only. M92,M96-->1.8V or 3.3V (Default by DVO_LSB_VMODE set "1".

C332 EV@1U/6.3V_4X

AF23 AF24 AG23 AG24

+1.5V_GPU

L47

L6

AF13 AF15 AG13 AG15

C383 [email protected]/10V_4X

96@BLM15BD121SN1D_300MA

AD12 AF11 AF12 AG11

M20 M21

9X@BLM15BD121SN1D_300MA

VDDRHA,VSSRHA,VDDRHB,VSSRHB M92-->Need B ,M96-->Need A&B Madison,M92-->NC (1.8V@40mA PCIE_PVDD)

C863

9X@1U/6.3V_4X

C864

96@1U/6.3V_4X

V12 U12

AB37

C247 EV@1U/6.3V_4X

H7 H8

C223 [email protected]/10V_4X SPV18

+1.8V_GPU

L38

120 ohm/300mA MP@BLM15BD121SN1D_300MA

AM10

SPV10

(1.8V@150mA MPV18)

AN9 AN10

C771 MPV18 MP@10U/6.3V_8X M92,M96-->NC Park,Madison-->1.8V@150mA

+1.8V_GPU

L16

C409 MP@1U/6.3V_4X

120 ohm/300mA MP@BLM15BD121SN1D_300MA

C768 [email protected]/10V_4X

B2A

(1.8V@50mA SPV18)

C386 MP@10U/6.3V_8X

C372 [email protected]/10V_4X

T12

AG28 AH29

120 ohm/300mA

+VGPU_CORE

L48

9X@BLM15BD121SN1D_300MA

+1V_GPU

L17

MP@BLM15BD121SN1D_300MA

VDD_CT#1 VDD_CT#2 VDD_CT#3 VDD_CT#4

VDDR3#1 VDDR3#2 VDDR3#3 VDDR3#4 VDDR4#4 VDDR4#5 VDDR4#7 VDDR4#8 VDDR4#1 VDDR4#2 VDDR4#3 VDDR4#6

NC_VDDRHA NC_VSSRHA NC_VDDRHB NC_VSSRHB

PCIE_PVDD MPV18#1 MPV18#2

VDDC#1 VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8 VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15 VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC#27 VDDC#28 VDDC#29 VDDC#30 VDDC#31 VDDC#32 VDDC#33 VDDC#34 VDDC#35 VDDC#36 VDDC#37 VDDC#38 VDDC#39 VDDC#40 VDDC#41 VDDC#42 VDDC#43 VDDC#44 VDDC#45 VDDC#46 VDDC#47 VDDC#48 VDDC#49 VDDC#50 VDDC#51 VDDC#52 VDDC#53 VDDC#54 VDDC#55 VDDC#56 VDDC#57 VDDC#58

SPV18 VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8 VDDCI#9 VDDCI#10 VDDCI#11 VDDCI#12 VDDCI#13 VDDCI#14 ISOLATED VDDCI#15 CORE I/O VDDCI#16 VDDCI#17 VDDCI#18 VDDCI#19 VDDCI#20 VDDCI#21 VDDCI#22

SPV10 SPVSS

VOLTAGE SENESE AF28

SPV18 M92,M96-->NC Park,Madison-->1.8V@50mA

AA31 AA32 AA33 AA34 V28 W29 W30 Y31

FB_VDDC FB_VDDCI FB_GND

(1.0V@100mA SPV10)

C389 EV@10U/6.3V_8X

B2A

C400 [email protected]/10V_4X

C285 EV@1U/6.3V_4X

C277 EV@1U/6.3V_4X

C284 [email protected]/10V_4X

VDDC M92,M96-->1.1V Park,Madison-->1.0V

C278 EV@1U/6.3V_4X

G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28

B2A C219 EV@1U/6.3V_4X

C288 EV@1U/6.3V_4X

C215 EV@1U/6.3V_4X

C289 EV@1U/6.3V_4X

C287 EV@1U/6.3V_4X

C290 EV@1U/6.3V_4X

C291 EV@1U/6.3V_4X

C301 EV@10U/6.3V_6X

+VGPU_CORE

AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 AH27 AH28 M26 N24 N27 R18 R21 R23 R26 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28

B2A

C300 EV@1U/6.3V_4X

C352 EV@1U/6.3V_4X

C318 EV@1U/6.3V_4X

C305 EV@1U/6.3V_4X

C313 EV@1U/6.3V_4X

C371 EV@1U/6.3V_4X

VDDCI:33.6A C366 EV@1U/6.3V_4X

C307 EV@1U/6.3V_4X

C317 EV@1U/6.3V_4X

C356 EV@1U/6.3V_4X

B2A

R710 EV@0_6

C324 EV@1U/6.3V_4X

C316 EV@1U/6.3V_4X

C340 EV@1U/6.3V_4X

C322 EV@1U/6.3V_4X

C311 EV@1U/6.3V_4X

C354 EV@1U/6.3V_4X

C355 EV@1U/6.3V_4X

BIF_VDDC

Ball N27,T27 M92,M96-->VDDC Madison,Park-->VDDC if no support Power Xpress.Support need to separe it.

AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13

B2A

C653 EV@10U/6.3V_8X

C660 EV@10U/6.3V_8X

C347 *EV@10U/6.3V_6X

C341 *EV@10U/6.3V_6X

C663 *EV@10U/6.3V_8X

C654 *EV@10U/6.3V_8X

B2A +VGPU_IO

(DDR3 1.12V@4A VDDCI) or more

C358 EV@1U/6.3V_4X

C359 EV@1U/6.3V_4X

C373 EV@10U/6.3V_8X

C377 *EV@10U/6.3V_8X

C392 EV@1U/6.3V_4X

C390 EV@1U/6.3V_4X

EV@0_6

+VGPU_IO

R711

*0_6

+1.8V_GPU

C321 EV@1U/6.3V_4X

C348 EV@10U/6.3V_8X

C375 EV@1U/6.3V_4X R712

C374 EV@1U/6.3V_4X

C380 EV@1U/6.3V_4X

C395 EV@1U/6.3V_4X

C368 EV@1U/6.3V_4X

Ball AA13,Y13 Park,Madison-->BB no support as VDDCI power. M92,M96-->BB disable as VDDCI power. M92,M96-->BB enable(default) Connector to +1.8V_GPU Control register is GPIO_21_BB_EN

B2A

+3V +3V

+3V

B2A +1.8V_GPU_PWGD

9X@0_4

*9X@0_4

R164

*9X@0_4

Q44 9X@DDTC144EUA-7-F_30MA

2

3 C346 9X@1U/6.3V_4X

C

PowerXpress control signal for Madsion and Park only If not used, can be disconnected. (AL21 pin) PX_EN = LOW, turn on PX_EN = HIGH, turn off

R454 9X@0_4

Ball AL21 M92,M96-->GND Madison,Park for Power Express,No use can NC.

B2A B2A Ball AW34 M92,M96-->GND Madison,Park for 27MHz OSC Input,If no use can GND. R709

EV@0_4

B

B2A

VSS_MECH#1 VSS_MECH#2 VSS_MECH#3

A39 AW1 AW39

M96

Park

Madison

VDDRHA

NC

VDDR1

NC

NC

VDDRHB

VDDR1

VDDR1

NC

NC

VSSRHA

NC

VSS

NC

NC

VSSRHB

VSS

VSS

NC

NC

GPU +3V power 9X@AO3413_3A Q16

0.5A +3V_D

C310

C304

C370

*EV@10U/6.3V_8X

*EV@1U/6.3V_4X

*[email protected]/10V_4X

Quanta Computer Inc. PROJECT : BL6 Size

1

+1.8V_GPU

+1.5V_GPU {30,41} GPU_VRON

D

A

Q17 9X@DDTC144EUA-7-F_30MA

2

1

9X@DMN601K-7_300MA R708

R157

A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 AW34 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13

1

3 {41} VSS_VCORE_P_SENSE

M92,M96-->GND Park,Madison-->GND feedback or NC

9X@0_4

GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8 GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#56 GND#57 GND#58 GND#59 GND#60 GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87 GND#88 GND#89 GND#90 GND#91 GND#92 GND#93 GND#94 GND#95 GND#96 GND#97 GND#98 GND#99

M92

R133 MP@0_8

2

+1.8V_GPU_PWGD {30} R713

2 Q43

GND GND#100 GND#101 GND#102 GND#103 GND#104 GND#105 GND#106 GND#107 GND#108 GND#109 GND#110 GND#111 GND#112 GND#113 GND#114 GND#115 GND#116 GND#117 GND#118 GND#119 GND#120 GND#121 GND#122 GND#123 GND#124 GND#125 GND#126 GND#127 GND#128 GND#129 GND#130 GND#131 GND#132 GND#133 GND#134 GND#135 GND#136 GND#137 GND#138 GND#139 GND#140 GND#141 GND#142 GND#143 GND#144 GND#145 GND#146 GND#147 GND#148 GND#149 GND#150 GND#151 GND#153 GND#154 GND#155 GND#156 GND#157 GND#158 GND#159 GND#160 GND#161 GND#163 GND#164 GND#165 GND#166 GND#167 GND#168 GND#169 GND#170 GND#171 GND#172 GND#173 GND#174 GND#175 GND#152 GND#162 EV@Madison/Park_M2

R140 [email protected]_4

3

FB_VDDC,FB_VDDCI M92,M96-->NC Park,Madison-->Can use or NC.

3

R459 9X@10K_4

{41} VGA_CORE_P

PCIE_VSS#1 PCIE_VSS#2 PCIE_VSS#3 PCIE_VSS#4 PCIE_VSS#5 PCIE_VSS#6 PCIE_VSS#7 PCIE_VSS#8 PCIE_VSS#9 PCIE_VSS#10 PCIE_VSS#11 PCIE_VSS#12 PCIE_VSS#13 PCIE_VSS#14 PCIE_VSS#15 PCIE_VSS#16 PCIE_VSS#17 PCIE_VSS#18 PCIE_VSS#19 PCIE_VSS#20 PCIE_VSS#21 PCIE_VSS#22 PCIE_VSS#23 PCIE_VSS#24 PCIE_VSS#25 PCIE_VSS#26 PCIE_VSS#27 PCIE_VSS#28 PCIE_VSS#29 PCIE_VSS#30 PCIE_VSS#31 PCIE_VSS#32 PCIE_VSS#33 PCIE_VSS#34 PCIE_VSS#35

F15 F17 F19 F21 F23 F25 F27 F29 F31 F33 F7 F9 G2 G6 H9 J2 J27 J6 J8 K14 K7 L11 L17 L2 L22 L24 L6 M17 M22 M24 N16 N18 N2 N21 N23 N26 N6 R15 R17 R2 R20 R22 R24 R27 R6 T11 T13 T16 T18 T21 T23 T26 U15 U17 U2 U20 U22 U24 U27 U6 V11 V16 V18 V21 V23 V26 W2 W6 Y15 Y17 Y20 Y22 Y24 Y27 U13 V13

C299 EV@1U/6.3V_4X

B2A

R458 9X@10K_4

B2A

AB39 E39 F34 F39 G33 G34 H31 H34 H39 J31 J34 K31 K34 K39 L31 L34 M34 M39 N31 N34 P31 P34 P39 R34 T31 T34 T39 U31 U34 V34 V39 W31 W34 Y34 Y39

+1V_GPU

Route as differential Pair

A

B2A

U20F

C652 EV@10U/6.3V_8X

B2A

C659 [email protected]/10V_4X

EV@Madison/Park_M2

SPV10 M92,M96-->VDDC Madison,Park 1V@100mA

C656 EV@1U/6.3V_4X

(30A or more) CORE

PLL PCIE_PVDD MPV18

C217 EV@10U/6.3V_8X

PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8 PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12

96@0_4 9X@0_4

120 ohm/300mA EV@BLM15BD121SN1D_300MA

B

180 ohm/1.5A EV@HCB1608KF-181T15_1.5A

(1.0V@2A PCIE_VDDC)

B2A

L46

R706 R707

C328 EV@1U/6.3V_4X

VDDR4

C376 EV@1U/6.3V_4X

VDDR4 for DVPDATA {12:23} VDDR5 for DVPDATA {0:11}

PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8

I/O

(1.8V@170mA)

B2A

+1.8V_GPU

AF26 AF27 AG26 AG27

(3.3V@60mA)

C315 EV@10U/6.3V_6X

VDDR1#1 VDDR1#2 VDDR1#3 VDDR1#4 VDDR1#5 VDDR1#6 VDDR1#7 VDDR1#8 VDDR1#9 VDDR1#10 VDDR1#11 VDDR1#12 VDDR1#13 VDDR1#14 VDDR1#15 VDDR1#16 VDDR1#17 VDDR1#18 VDDR1#19 VDDR1#20 VDDR1#21 VDDR1#22 VDDR1#23 VDDR1#24 VDDR1#25 VDDR1#26 VDDR1#27 VDDR1#28 VDDR1#29 VDDR1#30 VDDR1#31 VDDR1#32 VDDR1#33 VDDR1#34

LEVEL TRANSLATION VDDC_CT

+3V_D

+1.8V_GPU

AC7 AD11 AF7 AG10 AJ7 AK8 AL9 G11 G14 G17 G20 G23 G26 G29 H10 J7 J9 K11 K13 K8 L12 L16 L21 L23 L26 L7 M11 N11 P7 R11 U11 U7 Y11 Y7

POWER

L11

+1.8V_GPU

C657 EV@1U/6.3V_4X

PCIE

([email protected]_VDDR1)

C397 EV@10U/6.3V_8X

L27

1

+1.5V_GPU

+1.8V_GPU

(1.8V@400mA PCIE_VDDR)

PCIE_VDDR

U20E

Document Number

Rev A1A

Madison/Park PWR_GND Date: 5

4

3

2

Saturday, April 10, 2010 1

Sheet

20

of

45

5

+1.8V_GPU

4

2

WWW.ROSEFIX.COM (1.8V@130mA DPA_VDD18)

DPA_VDD18

C677 MP@1U/10V_6X

C673 MP@10U/6.3V_8X

DP C/D POWER

L13

DP A/B POWER

AP20 AP21

DPC_VDD18#1 DPC_VDD18#2

DPA_VDD18#1 DPA_VDD18#2

AN24 AP24

DPA_VDD18

DPC_VDD10

AP13 AT13

DPC_VDD10#1 DPC_VDD10#2

DPA_VDD10#1 DPA_VDD10#2

AP31 AP32

DPA_VDD10

AN17 AP16 AP17 AW14 AW16

DPC_VSSR#1 DPC_VSSR#2 DPC_VSSR#3 DPC_VSSR#4 DPC_VSSR#5

DPA_VSSR#1 DPA_VSSR#2 DPA_VSSR#3 DPA_VSSR#4 DPA_VSSR#5

AN27 AP27 AP28 AW24 AW26

DPC_VDD18

AP22 AP23

DPD_VDD18#1 DPD_VDD18#2

DPB_VDD18#1 DPB_VDD18#2

AP25 AP26

DPA_VDD18

DPC_VDD10

AP14 AP15

DPD_VDD10#1 DPD_VDD10#2

DPB_VDD10#1 DPB_VDD10#2

AN33 AP33

DPA_VDD10

AN19 AP18 AP19 AW20 AW22

DPD_VSSR#1 DPD_VSSR#2 DPD_VSSR#3 DPD_VSSR#4 DPD_VSSR#5

DPB_VSSR#1 DPB_VSSR#2 DPB_VSSR#3 DPB_VSSR#4 DPB_VSSR#5

AN29 AP29 AP30 AW30 AW32

(1.8V@130mA DPC_VDD18)

120 ohm/300mA L33 MP@BLM15BD121SN1D_300MA

DPC_VDD18 C704 MP@1U/10V_6X

C694 MP@10U/6.3V_8X

C702 [email protected]/10V_4X

DPA,B,C,D_18 M92,M96-->NC Park,Madison-->Support DPE,F All support

C

C295 EV@10U/6.3V_8X

C293 EV@1U/6.3V_4X

C296 [email protected]/10V_4X

R508

EV@150/F_4

120 ohm/300mA L15 EV@BLM15BD121SN1D_300MA

(1.0V@110mA DPC_VDD10)

DPC_VDD10

C362 EV@10U/6.3V_8X

C246 [email protected]/10V_4X

DPE_VDD18

C245 EV@1U/6.3V_4X

B2A

DPCD_CALR

AW18

DPCD_CALR

AH34 AJ34

DP E/F POWER DPE_VDD18#1 DPE_VDD18#2

DPE_VDD10

AL33 AM33

AN34 AP39 AR39 AU37 AW35

C244 EV@10U/6.3V_8X

DPAB_CALR

AW28

DPAB_CALR R456

EV@150/F_4

+1.8V_GPU

(1.8V@20mA DPA_PVDD)

R716

EV@0_4

AF34 AG34

DPE_VDD18

C221 EV@1U/6.3V_4X

AU28 AV27

DPE_VDD10#1 DPE_VDD10#2

DPB_PVDD DPB_PVSS

AV29 AR28

DPE_VSSR#1 DPE_VSSR#2 DPE_VSSR#3 DPE_VSSR#4 DPE_VSSR#5

DPC_PVDD DPC_PVSS

AU18 AV17

AK33 AK34

C213 EV@10U/6.3V_8X

C692 EV@1U/6.3V_4X

120 ohm/300mA EV@BLM15BD121SN1D_300MA

C691 [email protected]/10V_4X

AV19 AR18

DPE_PVDD DPE_PVSS

AM37 AN38

NC_DPF_PVDD NC_DPF_PVSS

AL38 AM35

DPF_VSSR#1 DPF_VSSR#2 DPF_VSSR#3 DPF_VSSR#4 DPF_VSSR#5

EV@150/F_4

AM39

DPEF_CALR

C696 *EV@10U/6.3V_8X

C697 *EV@1U/6.3V_4X

L32

120 ohm/300mA EV@BLM15BD121SN1D_300MA

C698 *[email protected]/10V_4X

(1.8V@20mA DPC_PVDD)

C705 *EV@10U/6.3V_8X

C708 *EV@1U/6.3V_4X

L35 C707 *[email protected]/10V_4X

(1.8V@20mA DPD_PVDD)

L36

120 ohm/300mA EV@BLM15BD121SN1D_300MA

R714

MP@0_4

C718 EV@10U/6.3V_8X

C727 EV@1U/6.3V_4X

C726 [email protected]/10V_4X +1.8V_GPU

(1.8V@40mA DPE/F_PVDD)

C216 *EV@10U/6.3V_8X

C222 *EV@1U/6.3V_4X

L7

120 ohm/300mA EV@BLM15BD121SN1D_300MA

C250 *[email protected]/10V_4X A

EV@Madison/Park_M2

Quanta Computer Inc.

B2A

PROJECT : BL6

DPF M92,M96-->NC Madison,Park-->1.8V and GND

Size

4

3

Document Number

Rev A1A

Madison/Park DPPW_GND Date:

5

B

120 ohm/300mA EV@BLM15BD121SN1D_300MA

+1.8V_GPU DPD_PVDD

R715 MP@0_4 DPEF_CALR

(1.8V@20mA DPB_PVDD)

DPE_PVDD

DPF_VDD10#1 DPF_VDD10#2

AF39 AH39 AK39 AL34 AM34

DPB_PVDD

+1.8V_GPU

DPD_PVDD DPD_PVSS

Place close to IC R104

C690 EV@10U/6.3V_8X

DPC_PVDD

DPF_VDD18#1 DPF_VDD18#2

DPE_VDD10 DPE_VDD10

C243 [email protected]/10V_4X

DP PLL POWER DPA_PVDD DPA_PVSS

L29

+1.8V_GPU

B2A

+1V_GPU (1.0V@120mA DPE/F_VDD10) 180 ohm/1.5A L8 EV@HCB1608KF-181T15_1.5A

Total 20mA

Place close to IC

DPE_VDD18

DPF_VSSR#5 M92,M96-->VSS Madison,Park-->100M OSC input, no use connect to GND

B

C353 [email protected]/10V_4X

DPA,B,C,D_10 M92,M96-->200mA Park,Madison-->110mA DPE,F M92,M96-->170mA(TMDS) Park,Madison-->120mA(LVDS)

DPA_PVDD +1.8V_GPU (1.8V@200mA DPE/F_VDD18) 180 ohm/1.5A L9 EV@HCB1608KF-181T15_1.5A

C360 EV@1U/6.3V_4X

C

Place close to IC

A

120 ohm/300mA EV@BLM15BD121SN1D_300MA

D

Total 130mA

B2A

+1V_GPU

(1.0V@110mA DPA_VDD10)

DPA_VDD10

DPC_VDD18 C678 [email protected]/10V_4X

1

DPA/B/C/D:110mA

U20H

120 ohm/300mA L28 MP@BLM15BD121SN1D_300MA

D

3

2

Saturday, April 10, 2010

Sheet 1

21

of

45

5

PIN STRAPS

4

3

WWW.ROSEFIX.COM +3V_D

R153

EV@10K/F_4

R141

EV@10K/F_4

{16} GPIO3_SMBDAT

R137

*EV@10K/F_4

{16} GPIO4_SMBCLK

R136

*EV@10K/F_4

{16} GPU_GPIO0 {16} GPU_GPIO1

D

{16}

2

PWR_PSI#

R165

*EV@10K/F_4

R142

*EV@10K/F_4

R148

*EV@10K/F_4

CONFIGURATION STRAPS ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

Memory Aperture size

Add by ATI suggest

RAM_CFG[2:0] Size 000

Remove by ATI suggest

STRAPS

128MB

001

256MB

010

64MB

011

32MB

{16,23} LVDS_BLON

ROM Table R145

{16} RAM_CFG2 {16} RAM_CFG1 {16} RAM_CFG0

{16} GPU_GPIO2 {16,23} EXT_HSYNC {16,23} EXT_VSYNC

PIN GPIO0

0 = 50% TX OUTPUT SWING 1 = FULL TX OUTPUT SWING

0

TX_DEEMPH_EN

GPIO1

PCIE TRANSMITTER DE-EMPHASIS ENABLED 0 = TX DE-EMPHASIS DISABLED 1 = TX DE-EMPHASIS ENABLED ENABLE EXTERNAL BIOS ROM (Only for GDDR5) 0 = DISABLE 1 = ENABLE

0

GPIO_22_ROMCSB

ROMIDCFG(2:0)

GPIO[13:11]

BIF_GEN2_EN_A

GPIO2

R146

*EV@10K/F_4

R143

EV@10K/F_4

R149

*EV@10K/F_4

R435

EV@10K/F_4

R434

EV@10K/F_4

EXT_HSYNC Change by ATI suggest

EXT_VSYNC

GPIO_8_ROMSO H2SYNC GPIO_21_BB_EN

GPIO8 H2SYNC GPIO21

0 0 1 1

Discription

AUD[1]

HSYNC

AUD[0]

VSYNC

{16} GPU_GPIO8 {16} GPU_GPIO9 {16} GPU_GPIO10

{16} GPU_GPIO22

R425

*EV@10K/F_4

R178

*EV@10K/F_4

0 1 0 1

Any one by dectec

R131

*EV@10K/F_4

R144

*EV@10K/F_4

R184

*EV@10K/F_4

Vendor

Vendor P/N

STN B/S P/N

Size

H5TQ1G63BFR AKD5LZGTW00 -12C (64M*16)

K4W1G1646E -HC12

AKD5LGGT502 (64M*16)

K4W2G1646B -HC12

AKD5MGGT501

Samsung

Thermal Sensor +3V_D

2

R424 [email protected]_4

R426 [email protected]_4

GPIO_9_ROMSI

V2SYNC

+1.8V_GPU

DVPDATA_3

RAM_STRAP4

DVPDATA_2 DVPDATA_1 DVPDATA_0

0

1

0

0

15"

14"

0

1

{16} RAM_STRAP4

{16} RAM_STRAP3

1GB

0

0

0

0

0

1

2GB

0

0

1

0

0

1

0

1

0

1

0

1

{16} RAM_STRAP2

1GB

0

0

0

1

0

1

2GB

0

0

1

1

0

1

+3V_D_Thermal

R442 EV@10K_4 U18

B2A

C3A

8 7 6 4

{16} ALT#_GPIO17 {3} VGA_THERM#

SCLK

VCC

SDA

DXP

5

{16} GPU_GPIO10

6 1 +3V_D

[email protected]/10V_4X

R720

ALERT#

DXN

OVERT#

GND

1 2

*EV@10K_4

GPU_D+

Q

2

R522

*EV@10K/F_4

R518

EV@10K/F_4

R541

EV@10K/F_4

R537

EV@10K/F_4 B

R525

*EV@10K/F_4

R523

EV@10K/F_4

R543

EV@10K/F_4

R550

EV@10K/F_4

GPU_GPIO8 {16}

S HOLD

3

W VCC

A

VSS

4

*EV@M25P10-AVMN6TP

C670 *[email protected]/10V_4X

3 5

EV@2200P/50V_4X GPU_D-

Quanta Computer Inc.

{16}

PROJECT : BL6 Size

EV@LM95245CIMM NOPB

ADDRESS: 98H 4

EV@10K/F_4

C

7

R721 *EV@10K_4C98

{16}

D

Document Number

Memory strip/Thermal/HDCP Date:

5

*EV@10K/F_4

U0

{16} GPU_GPIO9

{16} GPU_GPIO22 C661

R531 R527

512MB & 1GB take care {16} RAM_STRAP1

8

*EV@0_4 *EV@0_4

C

0

EEPROM

R717 EV@0_6

EV@DMN601K-7_300MA 1

*EV@0_4 *EV@0_4

See Audio table

0

0 = DRIVER would ignore the value sample on VHAD_0 during RESET.

B2A

R443 EV@10K_4

R431 R444

11

0 = VGA controller capacity enable

GPIO9

+3V_D

2 Q6 3

A

{16} GPIO4_SMBCLK {16} GPIO3_SMBDAT

0

RAM_STRAP3 RAM_STRAP2 RAM_STRAP1 RAM_STRAP0

EV@DMN601K-7_300MA 1

R439 R441

Reserved Only

{16} RAM_STRAP0

+3V_D

SCL SDA

0

See ROM table

DDR3 Memory TYPE

512MB

{16} {16}

0 = PCIE DEVICE AS 2.5GT/S CAPABLE 1 = PCIE DEVICE AS 5GT/S CAPABLE

11: AUDIO FOR BOTH DISPLAYPORT AND HDMI.

Both DP & HDMI

B

{30} 3ND_MBDATA

000

AUD[1:0] 00: NO AUDIO FUNCTION. 01: AUDIO FOR DISPLAYPORT AND HDMI IF ADAPTER IS DETECTED. 10: AUDIO FOR DISPLAYPORT ONLY.

DP only

512MB

{30} 3ND_MBCLK

D

VIP: Video Capture Port Interface

Hynix

Q40 3

REMARK

0

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT NUMONYX M25P10A : 101

No Audio

VIP_DEVICE_STRAP_ENA V2SYNC

DEFAULT

*EV@10K/F_4

C

{16}

DESCRIPTION OF DEFAULT SETTINGS

TX_PWRS_ENB

BIOS_ROM_EN

B2A {16} GFX_CORE_CNTRL2

1

3

2

Sheet

Saturday, April 10, 2010 1

22

of

45

Rev A1A

3

2

CCD

WWW.ROSEFIX.COM RP10

1 3

2 4

IV@0X2

RP4

4 2

3 1

EV@0X2

INT_TXLOUT2+ INT_TXLOUT2-

RP11

1 3

2 4

IV@0X2

EV_TXLOUT2+ EV_TXLOUT2-

RP5

4 2

3 1

EV@0X2

INT_TXLOUT1+ INT_TXLOUT1-

RP12

1 3

2 4

IV@0X2

EV_TXLCLKOUT+ EV_TXLCLKOUT-

{16} EV_TXLCLKOUT+ {16} EV_TXLCLKOUT-

LCD_TXLCLKOUT+ LCD_TXLCLKOUT-

R357 R358

USBP0+_LCD USBP0-_LCD

*SHORT_6 *SHORT_6

USBP0+ USBP0-

R685

+3VPCU

+3V

+3V

R694

{9} {9}

1

1K_4

LCD_TXLOUT2+ LCD_TXLOUT2-

F2

2

1 *SMD1206P100TF

D22

2

1 *B130L-13-F_1A

0.1U/16V_4Y

R367

RP6

1 3

2 4

EV@0X2

INT_TXLOUT0+ INT_TXLOUT0-

RP13

4 2

3 1

IV@0X2

EV_TXLOUT0+ EV_TXLOUT0-

RP7

1 3

2 4

EV@0X2

INT_LVDS_EDIDCLK INT_LVDS_EDIDDATA

RP9

4 2

3 1

IV@0X2

1

C549

E3A

1 CH501H-40PT_100MA

LID591#

E3A D46

*EV@SW1010CPT_100MA

D42

IV@SW1010CPT_100MA

D

{30}

LCD_DISP_ON

10U/6.3V_8X

C548

*1000P/50V_4X

C547

*0.1U/16V_4Y

+3V

+3V

C3A R366 *4.7K_4

LCD_EDIDCLK LCD_EDIDDATA

R681

R690

IV@0_4

R692

EV@0_4

INT_LVDS_BLON LVDS_BLON

{7}

{16,22}

R693

3

{16} EV_TXLOUT0+ {16} EV_TXLOUT0{7} INT_LVDS_EDIDCLK {7} INT_LVDS_EDIDDATA

*TC7SH08FU(F)

Q34 *AO3413_3A

LCD_TXLOUT0+ LCD_TXLOUT0-

LID591#

1 U32

100K_4 EV@10K_4

3

{7} INT_TXLOUT0+ {7} INT_TXLOUT0-

4

PT3661-BB

{30}

D43 2

DISPON

0.2A(20mils) CCD_POWER

3

+

EV_TXLOUT1+ EV_TXLOUT1-

+3V

2

{16} EV_TXLOUT1+ {16} EV_TXLOUT1-

0_8

LCD_TXLOUT1+ LCD_TXLOUT1-

2 DISPON

DISPON

{7} INT_TXLOUT1+ {7} INT_TXLOUT1-

LID591#

C854

D

{16} EV_TXLOUT2+ {16} EV_TXLOUT2-

2 MR1

C3A {7} INT_TXLOUT2+ {7} INT_TXLOUT2-

100K_4

3

INT_TXLCLKOUT+ INT_TXLCLKOUT-

{7} INT_TXLCLKOUT+ {7} INT_TXLCLKOUT-

1

HALL SENSOR&BACK LIGHT SWITCH

5

4

3

5

RP3

1 3

EV@0X2

2

1

2 4

2

{30}

EV@2N7002_200MA

2

Q64

LCD_EDIDCLK

2.2K_4

EC_FPBACK#

Q62 DDTC144EUA-7-F_30MA

LCD_EDIDDATA

1

R68

2.2K_4

Q63

{30}

Q33 *DDTC144EUA-7-F_30MA

1

R75

+3V

CCD_POWERON

3

EV_LVDS_DDCCLK EV_LVDS_DDCDAT

{16} EV_LVDS_DDCCLK {16} EV_LVDS_DDCDAT

3

2

1

LVDS Signals

EV@2N7002_200MA

LVDS Enable C

C

B2A

1000P/50V_4X

0.1U/25V_6X LCD_TXLOUT1LCD_TXLOUT1+ LCD_TXLOUT2LCD_TXLOUT2+ LCD_TXLCLKOUTLCD_TXLCLKOUT+

B2A {16} EV_LVDS_BRIGHT

{7} INT_LVDS_PWM

{30}

CONTRAST

R356

EV@0_4

R355

LVDS_VADJ DISPON

IV@0_4

R359

*EV@0_4

C539

*0.1U/16V_4Y

VIN LVDS_VADJ

Add VIN

Delete VIN pin24

B2A

F3A R353 R354

{27} INT_DMIC_CLK {27} INT_DMIC_DATA

C3A

USBP0+_LCD USBP0-_LCD CCD_POWER SBY100505T-221Y-N_300MA SBY100505T-221Y-N_300MA

B2A

+3V R360

3

LCD_TXLOUT0LCD_TXLOUT0+

1.5A(65mils)

330K_6 Q29 +3VPCU

LCDONG 2

R362

C546

{7} INT_LVDS_DIGON {16} EV_LVDS_VDDEN

R363

EV@0_4

C3A

*SHORT_6

22_8

C542

C540

C541

0.1U/16V_4Y

0.01U/25V_4X

10U/6.3V_8X

2N7002_200MA LCDDISCHG Q32

LCD_DISP_ON

L23

Q31

2

IV@0_4

LCDVCC1 R361

0.01U/25V_4X

100K_4

R364

LCDVCC

ME2306_4A

1

10U/25V_1206X

C545

3

C544

+15V

2 LCDON# PDTC143TT_100MA

Q30

2

2N7002_200MA R365

1

C543

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 34 24 34 25 33 26 33 27 32 28 32 29 31 30 31 50373-03001-001

3

LCD_EDIDCLK LCD_EDIDDATA

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

3

+3V VIN +

LCD POWER SWITCH

CN1 LCDVCC

LCDVCC

1

0.3A (20mils)

1

LCD Panel Module

100K_4

B

B

CRT C192

{7} INT_CRT_GRN {7} INT_CRT_BLU

R390

IV@0_4

CRT_R

L24

BLM18BA470SN1D_300MA

CRT_R1

R397

IV@0_4

CRT_G

L25

BLM18BA470SN1D_300MA

CRT_G1

R416

IV@0_4

CRT_B

L26

BLM18BA470SN1D_300MA

R392

EV@0_4

D23 2

+5V

1 B130L-13-F_1A

F1 2

1 SMD1206P100TF

{7} INT_CRT_DDCDAT

INT_VSYNC

R415

C647

070546FR015S268ZR

CRT_B1 C646

C643

C634

R399

EV@0_4

150/F_4

R413

EV@0_4

R94

IV@0_4

DDCCLK

R86

IV@0_4

DDCDAT

R74

IV@0_4

HSYNC

R90

IV@0_4

VSYNC

R96

EV@0_4

R85

EV@0_4

R79

EV@0_4

R82

EV@0_4

6.8P/50V_4N

150/F_4

6.8P/50V_4N

150/F_4

6.8P/50V_4N

6.8P/50V_4N

6.8P/50V_4N

6.8P/50V_4N

6 1 7 2 8 3 9 4 10 5

D5

11

*CH501H-40PT_100MA

12

CRTDDAT

13

CRTHSYNC

14

CRTVSYNC

15

CRTDCLK

CRT_SENSE#

{30}

E3A

{16} EV_CRTDCLK {16} EV_CRTDDAT {16,22} EXT_HSYNC A

C644

CN15

17

{16} EXT_CRT_BLU

INT_HSYNC

R398

CRT_B1

{7} INT_CRT_DDCCLK

{7}

C635

CRT_G1

{16} EXT_CRT_GRN

{7}

R391

B2A

(30mils) CRT_R1

{16} EXT_CRT_RED

0.1U/16V_4Y

5V_CRT2

16

{7} INT_CRT_RED

{16,22} EXT_VSYNC

+5V

+3V

+3V

+5V

R88

2.2K_4

DDCCLK

R87

2.2K_4

DDCDAT

+3V

U3

0.01mA(15mils) 2.05mA(20mils)

5V_CRT2 C642

0.22U/6.3V_4X

0.01mA(15mils)

1 7 8 2

CRT_R1 CRT_G1 CRT_B1

3 4 5 6

VCC_SYNC SYNC_OUT2 SYNC_OUT1 VCC_DDC BYP SYNC_IN2 VCC_VIDEO SYNC_IN1 VIDEO_1 VIDEO_2 VIDEO_3 GND

DDC_IN1 DDC_IN2 DDC_OUT1 DDC_OUT2

CM2009-02QR

16 14

VSYNC1 HSYNC1

15 13

VSYNC HSYNC

10 11

DDCCLK DDCDAT

9 12

CRTDCLK CRTDDAT

R423 R420

39/F_4 39/F_4

CRTVSYNC CRTHSYNC

5V_CRT2 R55

R67

2.7K_4

2.7K_4

C650

C649

10P/50V_4C

10P/50V_4C

C155 0.1U/16V_4Y

C173 0.1U/16V_4Y

A

Quanta Computer Inc.

C154

C161

10P/50V_4C

10P/50V_4C

PROJECT : BL6 Size

Document Number

Rev A1A

LCD/LED Panel/CCD Date: 5

4

3

2

Saturday, April 10, 2010 1

Sheet

23

of

45

5

4

WWW.ROSEFIX.COM

L34

E3A

PLTRST# +3V_S5

3

*100K_4

{9} PCLK_DEBUG

1

*AO3413_3A

D31

2

{8} {8} {8}

*ZD5.6V

R488 *4.7K_4

2

Q47

R528

SERIRQ LDRQ#1

R576 R574

*0_4 *0_4

R573

*0_4

SERIRQ_debug LDRQ#1__debug PLTRST#_debug PCLK__debug_R

CL_RST#1 CL_DATA1 CL_CLK1

CL_RST#1 CL_DATA1 CL_CLK1

51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17

*0_4 CL_RST#1_WLAN *0_4 PLTRST#_PCIE *0_4 CL_CLK1_WLAN

R575 R538 R572

3

Q48

1 R734

*0_4

{8} {8}

PCIE_RXP5 PCIE_RXN5

{8} CLK_PCIE_MINI {8} CLK_PCIE_MINI#

1 *2N7002_200MA 2

Q70 WIMAX_P

R735

R733 R730

+3VPCU

*10K_4

WLAN_WAKE#

10K_4 3

{30} BT_RFCTRL

Intel module use S5 power for +3.3V Other module keep +3V for +3.3V

Q69

E3A

15 13 11 9 7 5 3 1

NC C-Link_RST C-Link_DAT C-Link_CLK GND NC NC GND GND PETp0 PETn0 GND GND PERp0 PERn0 GND NC NC

52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18

+3.3V GND +1.5V LED_WPAN# LED_WLAN# NC NC USB_D+ USB_DGND SMB_DATA SMB_CLK +1.5V GND +3.3Vaux PERST# W_DISABLE# GND

R732 R744 R737

GND REFCLK+ REFCLKGND CLKREQ# BT_CHCLK BT_DATA WAKE#

C720

0.1U/16V_4Y

0.1U/16V_4Y

0.1U/16V_4Y

10U/6.3V_8X

{9,28} PCIE_WAKE#

1

*10U/6.3V_8X

{9} {9}

0.33A(30mils) RF_EN

LFRAME#_PCIE LAD3_PCIE LAD2_PCIE LAD1_PCIE LAD0_PCIE

16 14 12 10 8 6 4 2

NC NC NC NC NC +1.5V GND +3.3V

+3V_S5

PLTRST# RF_EN

E3A *0_4

R494 R493 R492 R491 R490

WIMAX_P

{30}

LFRAME# {7,30} LAD3 {7,30} LAD2 {7,30} LAD1 {7,30} LAD0 {7,30}

*0_4 *0_4 *0_4 *0_4

RP14

WL_SMDATA

R159

*SHORT_4

WL_SMCLK

R160

*SHORT_4

CGDAT_SMB {2,12,13}

R566

*2N7002_200MA WIMAX_P

CGCLK_SMB {2,12,13}

C3A *10K_4

3

{2,8,28,33} SCLK

MINI Card Slot#2 3G

+1.5V_3G +3V_3G

+1.5V_3G

C

WL_SMCLK

1

Q49

C3A

+3V_3G

WL_SMDATA

1

Q50 *10K_4 *10K_4 *0_4

*2N7002_200MA

WIMAX_P

*4.7KX2

3

{2,8,28,33} SDATA

1

2

C757

C719

*0.1U/16V_4Y

2

3 Q54

C758

C725

*0.01U/25V_4X

2N7002_200MA

WIMAX_P

*DDTC144EUA-7-F_30MA C724

C387

0.1U/16V_4Y

WL_SMDATA WL_SMCLK

WIMAX_P

C

C728

D

USBP5+ USBP5-

80003-5121

1

B2A Q67

2

{30} BT_RFCTRL

*0_4

2

3

PCIE_TXP5 PCIE_TXN5

3

E3A {8} PCIE_CLK_RQ5#

{8} {8} WMAX_P {30}

*DDTC144EUA-7-F_30MA

+1.5V

CN18

D

2

+3V_S5

2.75A(120mils)

0.5A(30mils)

E3A

PBY201209T-330Y-N_4A

1

2

{7,30} {7}

1

WIMAX_P

2 4

D30 *ZD5.6V

1

WIMAX_P

+3V_S5

2

+1.5V

1 3

+3V

3

Before RAMP must to remove debug card component

2

MINI Card Slot#1 (WiFi)

*2N7002_200MA

SIM CARD board to board

2.75A(120mils) CN21

C793

C760

C756

C761

C765

C755

*[email protected]/25V_4X

*[email protected]/16V_4Y

*[email protected]/16V_4Y

*3G@10U/6.3V_8X

*[email protected]/25V_4X

*[email protected]/16V_4Y

*3G@10U/6.3V_8X

51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17

E3A {8} {8}

PCIE_TXP3 PCIE_TXN3

{8} PCIE_RXP3 {8} PCIE_RXN3 B

+3V_S5

+3V_3G

+3V_S5

+1.5V 1

+1.5V_3G

3 R593 *[email protected]_4

*3G@AO3413_3A

0.5A(30mils)

{8} CLK_PCIE_3G {8} CLK_PCIE_3G# {8} PCIE_CLK_REQ4#

2

Q57

15 13 11 9 7 5 3 1

R554

*3G@0_8

NC C-Link_RST C-Link_DAT C-Link_CLK GND +3.3V +3.3V CPEE# GND PETp0 PETn0 GND GND PERp0 RERn0 GND MMC_DAT MMC_CMD

+3.3V GND +1.5V LED_WPAN# LED_WLAN# LED_WWAN# CPUSB# USB_D+ USB_DGND SMB_DATA SMB_CLK +1.5V GND +3.3Vaux RESET# W_DISABLE# GND

GND REFCLK+ REFCLKGND CLKREQ# BT_CHCLK BT_DATA WAKE#

UIM_VPP UIM_RST UIM_CLK UIM_DATA UIM_PWR +1.5V GND +3.3V

54 53

C764

16 14 12 10 8 6 4 2

CPUSB# {10} USBP10+ {9} USBP10- {9}

CN11 UIM_CLK UIM_DATA {9} {9}

PLTRST# 3G_EN UIM_VPP_R UIM_RST_R UIM_CLK_R UIM_DATA_R UIM_PWR_R

PLTRST# {3,9,28,29,30} 3G_EN {30}

USBP4+ USBP4-

USBP4+ USBP4-

1 3 5 7 9 11

UIM_CLK GND UIM_DATA GND USBGND

UIM_VPP UIM_PWR UIM_RST GND USB+ GND

2 4 6 8 10 12

UIM_VPP UIM_PWR UIM_RST

*3G@88020-12101 B

E3A C763

*3G@100P/50V_4N

54 53

*3G@80003-5121

E3A

3

E3A

52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18

Q52 2

3G_P

{30}

PCIE_WAKE# 3

3G_WAKE#

1

*3G@DDTC144EUA-7-F_30MA *3G@2N7002_200MA 2

1

Q55 +3V_3G

R579

*3G@10K_4

3G CONN Close to 3G MINI Card CN5 1 2 3 4 5 6 7 8 9 10 1411 1312

A

CN8 UIM_CLK_R UIM_DATA_R UIM_RST_R UIM_VPP_R UIM_PWR_R

C762

UIM_VPP_R UIM_RST_R UIM_CLK_R UIM_DATA_R UIM_PWR_R

*[email protected]/16V_4Y

R549 R548 R547 R546 R545

*3G@0_4 *3G@0_4 *3G@0_4 *3G@0_4 *3G@0_4

UIM_VPP_RR UIM_RST_RR UIM_CLK_RR UIM_DATA_RR UIM_PWR_RR

R536 R535 R534 R533 R532

*3G@0_4 *3G@0_4 *3G@0_4 *3G@0_4 *3G@0_4

UIM_VPP UIM_RST UIM_CLK UIM_DATA UIM_PWR

UIM_PWR UIM_VPP UIM_RST UIM_DATA

E3A

E3A

UIM_CLK

*3G@88511-120N

1 2 3 4 5 6 7 8 9 10 1114 1213

A

Quanta Computer Inc. PROJECT : BL6

*3G@88511-120N Size

Document Number

Rev A1A

MINI CARD(WLAN/3G/SIM Card) Date: 5

4

3

2

Sheet

Saturday, April 10, 2010 1

24

of

45

5

4

3

2

1

WWW.ROSEFIX.COM

ESATA Re-driver IC

ESATA_VCC

Pin6/10/16/20 1.5V Low Power =>AL004951003 3.3V Low Power =>AL004951004

C3A +3V

R453

*SHORT_6

+1.5V

R455

*0_6

C294 0.01U/25V_4X

0.055A(20mils) ESATA_VCC

C693 0.1U/16V_4Y

ESATA_VCC

0.01U/25V_4X

SATA_RXP5_C

5

SATA_RXN5

C281

0.01U/25V_4X

SATA_RXN5_C

4

R752

2

ESATA_VCC 3

C3A {10} ESATA_DN#

ESATA_EN#

0_4

7

1

Q68

*FDV301N_200MA

R749

B2A

*0_4

R457

6

16

VCC4

C280

AI+

C3A

U7

AO+ AO-

BO+

BI+

BO-

BI-

EN

GND_P

SATA_RXP5

AI-

21

1

VCC3

SATA_TXP5_C

VCC2

2

0.01U/25V_4X

VCC1

0.01U/25V_4X

GND1 GND2 GND3 GND4

{7} SATA_RXN5

C282

Mode

{7} SATA_RXP5

C283

SATA_TXP5

3 19 18 13

{7} SATA_TXP5

SATA_TXN5_C

17

{7} SATA_TXN5

SATA_TXN5

10

D

20

D

A_EM B_EM

15

BSATA_TXP5_C

C338

0.01U/25V_4X

BSATA_TXP5

14

BSATA_TXN5_C

C337

0.01U/25V_4X

BSATA_TXN5

11

BSATA_RXP5_C

C335

0.01U/25V_4X

BSATA_RXP5

12

BSATA_RXN5_C

C336

0.01U/25V_4X

BSATA_RXN5

9 8

R135

*100_4

ESATA_VCC

R130

100_4

ESATA_VCC

SN75LVCP412ARTJR R139 10K_4

R127 *10K_4

0_4

C3A

E3A for disable TX emphasis C

{9} {9}

USBP13+ USBP13-

USBP13+ R118 USBP13- R114

R_BUSBP13+ R_BUSBP13-

0_6 0_6

C

1.5A(70mils) U4 G545A2P8U USBPWRIN1

+5VPCU

2 3

C258 4 1 9

1U/25V_8X

OUT3 OUT2 OUT1

EN# GND GND-C

OC#

8 7 6

USBPWR1 C263 *10U/6.3V_8X

5

C3A

USB_EN#0 USBOC#13

{30} USB_EN#0 {9,30} USBOC#13

B

IN1 IN2

B

USBPWR1

1

C256

R_BUSBP13-

2

R_BUSBP13+

3

+ C259

10U/6.3V_8X

*100U/6.3V_3528P_E45b

D+ GND

GND B+ BGND AA+ GND

15

13

A

Shield

14

D-

Shield

4

VCC

CN17

11 10 9 8 7 6 5

BSATA_RXP5 BSATA_RXN5 BSATA_TXN5 BSATA_TXP5

R_BUSBP13-

D26

*EGA10402V05AH

BSATA_RXP5

D24

*EGA10402V05AH

R_BUSBP13+

D27

*EGA10402V05AH

BSATA_RXN5

D25

*EGA10402V05AH

USBPWR1

D6

*VPORT 0603 220K-V05

BSATA_TXP5

D29

*EGA10402V05AH

BSATA_TXN5

D28

*EGA10402V05AH

Shield

Shield

12

ESATA CONN

A

3Q38111-R02C1B-7H

Quanta Computer Inc. PROJECT : BL6 Size

Document Number

Date:

Saturday, April 10, 2010

Rev A1A

TP/SW/ESATA/USB+Audio/LED 5

4

3

2

Sheet 1

25

of

45

5

4

3

2

1

SATA ODD

WWW.ROSEFIX.COM

C3A R62

*SHORT_1206

CN14 14

GND1 RXP RXN GND2 TXN TXP GND3

1 2 3 4 5 6 7

+5V C212 C194

0.01U/25V_4X 0.01U/25V_4X

SATA_RXN1_C SATA_RXP1_C

C191 C184

0.01U/25V_4X 0.01U/25V_4X

R418

8 9 10 11 12 13

DP +5V +5V RSVD GND GND

SATA_TXP1_C SATA_TXN1_C

1K_4

1

+5V_ODD

3

D

Q36 +5V

*AO3413_3A

SATA_RXN1 {7} SATA_RXP1 {7}

R402 *4.7K_4

1.6A(100mils)

+5V_ODD

15

GND15

SATA_TXP1 {7} SATA_TXN1 {7}

C633

C636

C628

0.1U/16V_4Y

0.1U/16V_4Y

10U/6.3V_8X

3

GND14

2

D

+ C143 *100U/6.3V_3528P_E45b

2

ODD_EN {30}

1

SLS-13DE1G Q37 *DDTC144EUA-7-F_30MA

C

C

EMI

SATA HDD B2A

CN20 VIN

GND1 RXP RXN GND2 TXN TXP GND3

B

3.3V 3.3V 3.3V GND GND GND 5V 5V 5V GND RSVD GND 12V 12V 12V

1 2 3 4 5 6 7

SATA_TXP0_C SATA_TXN0_C

C794 C792

0.01U/25V_4X 0.01U/25V_4X

SATA_RXN0_C SATA_RXP0_C

C786 C783

0.01U/25V_4X 0.01U/25V_4X

SATA_TXP0 {7} SATA_TXN0 {7}

C86

C90

C92

C94

C110

*0.1U/25V_4Y

*0.1U/25V_4Y

*0.1U/25V_4Y

*0.1U/25V_4Y

*0.1U/25V_4Y

C112

C115

C119

*0.1U/16V_4Y

*0.1U/16V_4Y

*0.1U/16V_4Y

B2A

SATA_RXN0 {7} SATA_RXP0 {7}

(20mils) +3.3VSATA1

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

R565 C754

C772

*10U/6.3V_8X

*0.1U/16V_4Y

*0_8

GND

+3V

+3V

0.94A(80mils)

C3A

+5V_HDD1

127067FR022G205ZR

R512

C743

C742

C744

0.1U/16V_4Y

0.1U/16V_4Y

10U/6.3V_8X

B

*SHORT_8 +5V

+ C731 *100U/6.3V_3528P_E45b GND

A

A

Quanta Computer Inc. PROJECT : BL6 Size

Document Number

Date:

Saturday, April 10, 2010

Rev A1A

HDD/ODD/EMI 5

4

3

2

Sheet 1

26

of

45

5

4

3

2

WWW.ROSEFIX.COM

Codec (CX20587)

Output

1

AUDIO JACKS Earphone

Output

FILT_1.65V

AVDD_3.3

CN23

C835

C842

C846

C843

HPOUT-L

R660

5.1/F_6

HPOUT-L2

L42

HCB1608KF-121T20_2A

HPOUT-L3

1U/10V_6Y

0.1U/16V_4Y

10U/6.3V_8X

0.1U/16V_4Y

HPOUT-R

R666

5.1/F_6

HPOUT-R2

L44

HCB1608KF-121T20_2A

HPOUT-R3

1 2 6 3 4

Port_A# D

R658

+3V

1.2mA(20mils)

0_6

ADOGND +3AVDD

C830

C504

C518

10U/6.3V_8X

0.1U/16V_4Y

0.1U/16V_4Y

R697

+3V_S5

C850

Normal Open Jack ADOGND

*100P/50V_4N

*100P/50V_4N

*0.1U/25V_6X

GND

(100mils)

ADOGND

+5AVDD

C862

C534

C828

C503

10U/6.3V_8X

0.1U/16V_4Y Determining HDA use +1.5V/+3V

10U/6.3V_8X

0.1U/16V_4Y

L45

Port_A#

PBY160808T-601Y-N_1A

D38 *VPORT 0603 220K-V05

+5V D36

*VPORT 0603 220K-V05

HPOUT-L3

D37

*VPORT 0603 220K-V05

HPOUT-R3

*0_6

GND GND

48.7mA(20mils)

0_6 +3AVDD_S5 C528

C857

10U/6.3V_8X

0.1U/16V_4Y

CLASSD_5V

R698 10K_4

C859

C852

10U/6.3V_8X

0.1U/16V_4Y

0.1U/16V_4Y

MDC@0_4 MDC@0_4

DIB_P_R DIB_N_R

R342 C855

0.1U/16V_4Y

15

TP97

54

TP98 TP99 TP100

53 52 51

0.1U/16V_4Y

0.1U/16V_4Y

10U/6.3V_8X

+3AVDD_S5

External MIC

10U/6.3V_8X

GPIO0/EAPD# GPIO1/SPK_MUTE# GPIO2/SPDIF2

PORTE_R PORTE_L PORTD_R PORTD_L PORTA_R PORTA_L

GND GND

RIGHT+

29 28

CX20587-11Z

21

GND

AVEE FLY_N FLY_P RIGHT-

AUXENABLE AUX_CLK

LEFT-

23 1

DMIC_3/4 DMIC_CLK0 DMIC_1/2

19

3 4 5

18

100_4 DMIC INT_DMIC_DATA

LEFT+

R345

22

20

C_BIAS PORTC_R PORTC_L

SPDIF

C808 R655 2.2K_4

GND

CLASSDREF

17

PC_BEEP

Place close to audio codec.

{23} INT_DMIC_CLK {23} INT_DMIC_DATA

RPWR_5.0

35

37

7 2 6 11 24 34

36 AVDD_5V

LPWR_5.0

PORTF_R PORTF_L PORTB_R PORTB_L B_BIAS

HPFILT

GND

PCBEEP_C

SENSE_A SENSE_B

C3A

DIB_P DIB_N

EXT_MUTE#

PCBEEP_R

R689 *10K_4

56 55

BIT_CLK SYNC SDATA_IN SDATA_OUT

16

33_4

100K_4

9 12 10 8

RESET#

14

R691

0_4

SENSE PIN A

C529

R338 R339

SENSE_A

39.2K/F_4 20K/F_4

50 49

R676

SENSE_B

5.11K/F_4

SENSE_B_R

R643 2.2K_4

Port_A# Port_B#

*4.7U/6.3V_6X

ADOGND

SENSE PIN B

R328

100/F_6

MIC1_L2

L40

HCB1608KF-121T20_2A

MIC1_L3

MIC1_R1

R327

100/F_6

MIC1_R2

L41

HCB1608KF-121T20_2A

MIC1_R3

46 45 44 42 41 40

TP90 TP91 TP92

39 38

TP93 TP94

33 32

TP95 TP96

Port_B# 2.2U/6.3V_6X 2.2U/6.3V_6X 0_4

JA6331-B13NS6B-7H

AVEE FLY_N FLY_P

C515

*0.1U/25V_6X

D34

2

1 *VPORT 0603 220K-V05

MIC1_L3

D35

2

1 *VPORT 0603 220K-V05

MIC1_R3

Internal Speaker

C845

0.1U/16V_4Y

10U/6.3V_8X

ADOGND

Port_B# D19 *VPORT 0603 220K-V05

GND

1U/10V_6Y C511

Close to CN2 R346 R344 R341 R343

SPK_R+ SPK_RSPK_LSPK_L+

C3A

GND

GND

CN2

PBY160808T-501Y-N_1.2A PBY160808T-501Y-N_1.2A PBY160808T-501Y-N_1.2A PBY160808T-501Y-N_1.2A

INSPKR+N INSPKR-N INSPKL-N INSPKL+N

1 2 3 4

DMIC

B

MIC1-LL

B2A

INT_DMIC_DATA {30} AMP_MUTE# C531

C858

*0.47U/6.3V_4X

AMP_MUTE#

Low Active

*0.1U/16V_4Y

C30000

*0.1U/16V_4Y

C30002

*0.1U/16V_4Y

ADOGND

ADOGND

GND

C510

*0.47U/6.3V_4X

C538 *47P/50V_4N

*0.47U/6.3V_4X

C527 *47P/50V_4N

GND GND

For EMI BIT_CLK_AUDIO

ACZ_SDOUT_AUDIO

ACZ_RST#_AUDIO

C856

C533

C536

*10P/50V_4C

*10P/50V_4C

*10P/50V_4C

B

INSPKL-N INSPKL+N INSPKR-N INSPKR+N

*0.47U/6.3V_4X

GND

1 2 3 4 88266-04001-06

MIC1-RR C30001

C509 GND

ADOGND

Normal Open Jack

100P/50V_4N 100P/50V_4N

HPOUT-R HPOUT-L

31 30

7 8 9 10

5

C805 C486

MIC1_R1 MIC1_L1 MIC1-VREFO

GND

27 26 25

1 2 6 3 4

+3AVDD_S5

C825 C505 C506 R657

MIC1-RR MIC1-LL MIC1-VREFO_B

C

CN22

MIC1_L1

TP88 TP89

48 47

EP_GND

33_4

BIT_CLK_AUDIO_R ACZ_SYNC_AUDIO_R 33_4 SDATA_IN ACZ_SDOUT_AUDIO_R

R687

C3A

C525

57

33_4

0_4

FILT_1.65

E3A

R755 L22 L21

13

AVDD_3.3

ACZ_RST#_AUDIO_R

R688

R754

DIB_P DIB_N

C521

R340 5.11K/F_4

GND

0.1U/16V_4Y

33_4

E3A

{7} BIT_CLK_AUDIO {7} ACZ_SYNC_AUDIO {7} ACZ_SDIN0_AUDIO {7} ACZ_SDOUT_AUDIO

C522

SENSE_A_R

FILT_1.8 VAUX_3.3 VAUX_3.3 VDD_IO DVDD_3.3 AVDD_HP

GND R736

R677

C532

MIC1-VREFO

C3A C535

{7} ACZ_RST#_AUDIO

(40mils)

FILT_1.8V

U13 C

C3A

PIN 20,23,25 CLOSE +5AVDD

Output

GND

In order for the audio codec to Wake on Jack, the CODEC VAUX pin (VAUX_3.3, pin 4) must be powered by a rail that is not removed unless AC power is removed.

GND

R670 0.1/F_1206

43

R347

PCBEEP

C832

Place bypass caps very close to device.

0.061mA(15mils) +1.5AVDD_S5_VDD_IO

Note:

{7,10}

C847

Layout Note: Path from +5V_IC to LPWR_5.0 and RPWR_5.0 must be very low resistance ( 1.0V

8792GND

VIN

Madison,Park

+VGPU_CORE

C3A PR172 *EV@1M/F_6

B2A {3,5,12,40} MAINON_ON_G

PR254

PR236 EV@1M/F_6

*EV@0_4

PR220 EV@22_8

PR173 *EV@22_8

PR242 EV@22_8

GPU_MAIND

PR219 EV@1M/F_6

4

2

{20,30} GPU_VRON

38.3K/F_4 CS33832FB08

PR166 = R2

100K/F_4 CS41002FB28

100K/F_4 CS41002FB28

PQ41 EV@AO4430_15A

PR171 *EV@1M/F_6

PQ7 *EV@BAM7002_300MA

A

3 2 1

PQ6 *EV@DTC144EU_30MA

1

1 PR178 *EV@100K_4

3

3

GPU_MAIND 3

25.5K/F_4 CS32552FB11

2

A

3

PR163 = R1 5 6 7 8

+15V 3

VIN

+1.8V_GPU

3

+1.5V_GPU

M92,M96

+1.5VSUS

2 2

PR237 EV@1M/F_6

2

PQ47 PQ56 EV@BAM7002_300MA 1

PQ54 EV@DTC144EU_30MA

1

1

2

PR239 EV@100K_4

1

{30} GPU_MAINON

+1.5V_GPU

PQ43 EV@BAM7002_300MA PC195 EV@2200P/50V_4X

5.74A

Quanta Computer Inc. PROJECT : BL6

EV@BAM7002_300MA

Size

Document Number

Date:

Saturday, April 10, 2010

Rev 1A

+VGPU_CORE (MAX8792) 5

4

3

2

1

Sheet

41

of

45

5

4

3

2

WWW.ROSEFIX.COM

42 VIN

+5VPCU

PR199

8152VCCGFX

26

VID5

GFXVR_VID_6_R

25

VID6

19

PU10 IV@RT8152C

PHASE

22

LGATE

20

8152LGATEGFX

5

E3A

PR214 *[email protected]_8

GFXVR_EN

IV@0_4

PR195

IV@0_4

8152DPRSLPVRGFX GFXVR_EN_R

3

DPRSLPVR

4

VRON

6 +3VPCU

PR126

PR182

+1.05V

IV@0_4 IV@10K/F_4

8152PGOODGFX

5

8152VRTTGFX

32

8152NTCGFX 8152VCCGFX

PR110

PR117

IV@10K/F_4

CLKEN

ISEN ISEN_N

IV@10K/F_4

PR198

{30} HWPG_VAXG

1

8152OCSETGFX 2 [email protected]/F_4

16 15

8152ISENGFX 8152ISEN_NGFX

RDSon=5m ohm

PGOOD VRTT CMSET

11

VSEN

12

FB

13

NTC OCSET

PC179

*IV@56P/50V_4N

PR209

IV@12K/F_4

PC181

PR217

GFXVR_EN_R

PR123

B2A

9

SOFT

8

PR212

+VAXG

IV@10_4 PR215 IV@10K _6_ NTC

VCC_AXG_SENSE {5}

B2A

8152COMPGFX PR207 [email protected]/F_4

8152SOFTGFX

IV@10K/F_4

IV@14K/F_4

IV@82P/50V_4N

RGND

C

IV@56P/50V_4N PR218

B

PC189

PC191

PC182

COMP

PR206

PC102

8152FBGFX *[email protected]/25V_4X

14

[email protected]/25V_4X *[email protected]/F_4

+ PC100

8152VSENGFX

PR180 [email protected]/F_4

B2A

PC184

+ PC103

8152CMSETGFX

PR111 IV@10K _6_ NTC

PC190

PC180 [email protected]/25V_4X

PR181

[email protected]/F_4

PQ38 IV@AOL1412_17A_P

E3A

*IV@1500P/50V_4X

{5}

PR192

800 mils +

PR213 [email protected]/F_4

4 1 2 3

C

{5} GFXVR_DPRSLPVR

C3A

[email protected]/25V_4X

GFXVR_VID_5_R

IV@0_4

PL11 [email protected]_10x10

1

IV@0_4

PR189

PQ39 IV@AOL1428_12.4A_P

PC167 [email protected]/25V_4X 8152PHASEGFX

2

PR188

8152BOOTGFX 1 2 PR191 IV@2_6

C3A

*IV@330U/2V_7343P_E9b

VID4

24

f : 300k Hz

B2A B2A

1

27

BOOT

4

2

GFXVR_VID_4_R

8152UGATEGFX

IV@330U/2V_7343P_E9b

IV@0_4

UGATE

23

OCP 20A (Peak 19A, AVG 15.4A)

1

VID3

PR187

C3A PC172 [email protected]/25V_4X

2

VID2

28

[email protected]/25V_8X

29

GFXVR_VID_3_R

[email protected]/25V_8X

GFXVR_VID_2_R

IV@0_4

[email protected]/25V_4X

IV@0_4

PR186

PC192

IV@2200P/50V_4X

PR185

PC186

1 2 3

VID1

PC188

1

{5} GFXVR_VID_6

VID0

30

+VAXG PC183

IV@330U/2V_7343P_E9b

{5} GFXVR_VID_5

31

GFXVR_VID_1_R

8152TONGFX PR201 IV@120K/F_4

2

{5} GFXVR_VID_4

GFXVR_VID_0_R

IV@0_4

TON

17

5

{5} GFXVR_VID_3

IV@0_4

PR184

PR197 IV@10_6

PVDD

7 {5} GFXVR_VID_2

PR183

D

PC105 IV@1U/10V_4X

VCC {5} GFXVR_VID_1

VIN

IV@10_6

PC173 IV@1U/10V_4X

{5} GFXVR_VID_0

B2A

PR125

*IV@Short_4

D

1

VSS_AXG_SENSE {5} PR210 IV@10_4

PC177 1 2

B

IV@5600P/25V_4X

IV@470/F_4

10

8152CMGFX

GFXVR_IMON {5}

VIN

+VAXG

1

CM

2

PC178 [email protected]/25V_4X

PR128 *IV@1M/F_6

PR190 *IV@22_8

{5}

2

GFXVR_EN

2

+VTT

PR129 *IV@1M/F_6

1

+VTT

3

3

18 33 35 34 36 37 38 39 40 41 42 21

2

IV@10K/F_4

C3A

1

PR208 IV@43K/F_4

GND PAD PAD PAD PAD PAD PAD PAD PAD PAD PAD PGND

8152DPRSLPVRGFX

PR121

PR130 *IV@100K_4 PR112 *IV@0_4

B2A

PR113 *IV@0_4

PR119 *IV@0_4

PR114 *IV@0_4

PR115 *IV@0_4

PR116 *IV@0_4

PQ37 *IV@BAM7002_300MA

1

PQ11 *IV@DTC144EU_30MA

PR120 *IV@0_4

A

A

GFXVR_VID_6_R

GFXVR_VID_5_R

PC207 270P/50V_4X

GFXVR_VID_4_R

PC208 270P/50V_4X

GFXVR_VID_3_R

PC209 270P/50V_4X

GFXVR_VID_2_R

PC210 270P/50V_4X

GFXVR_VID_1_R

PC211 270P/50V_4X

GFXVR_VID_0_R

PC212 270P/50V_4X

PC213 270P/50V_4X

Quanta Computer Inc. PROJECT : BL6 Size

Document Number

Rev 1A

UMA GPU CORE (RT8152C) Date: 5

4

3

2

Saturday, April 10, 2010

Sheet 1

42

of

45

5

4

3

2

1

WWW.ROSEFIX.COM

Power Tree Table

1 System Charger ISL88731 P.34

AC D

+VCC_CORE +-2% VRON enable 2 (Peak 58A,AVG 48A) OCP ISL62882C P.39

DC

58A

9 AO6402A P.35

+5VPCU +-5% AC/DC Insert enable (Peak 10.2 ,AVG 8.135A) OCP 11A

3 RT8210B P.35

4 UPI6111A P.37

(AVG 0.001A) Inrush ?A

(AVG 4.984A)

11 AO6402A P.35

(Peak 9A, AVG 7.623A) OCP 11A

43

+-5%

+5V +-5% MAIND

10 AO4496 P.35

AC/DC Insert enable +3VPCU +-5%

+5V_S5 S5D

D

Inrush ?A

+3V +-5% MAIND (AVG 1.984A) Inrush ?A

+3V_S5 +-5%

+VTT +-5% +1.05V +-5% MAINON enable

12 AO4496 P.35

(Peak 21.68, AVG 17.073A)

S5D (AVG 4.253A) Inrush ?A

OCP 23A

+SMDDR_VTERM SUSON enable C

5 UP6163

+SMDDR_VREF SUSON enable

C

P.36

13

+1.5VSUS SUSON enable For VGA (Peak 12.5A, AVG 9.77A) OCP 15A

6 UPI6111A P.38 RT8015A

14 G909 P.36

+1.05V +-5% MAINON enable (Peak 6.336, AVG 4.435A)

OCP 7A

+1.8V +-5% MAINON enable FOR UMA 0.194A OCP 3.7A For VGA 1.345A

B

7 MAX8792A P.41

8 RT8152C P.42

AO6402A P.36

+VGPU_CORE+-2% MAINON enable

15 AO4430 P.41 16 RT9018B P.41

OCP 30A (Peak 28A, AVG 23.1A)

17 AO6402A P.41

+VAXG +-2% MAINON enable (Peak 19A, AVG 15.4A)

+1.5V MAIND (AVG 0.35A) Inrush ?A

+1.5V_S5 S5_ON (AVG 0.000427A) Inrush ?A

+1.5V_GPU GPU_MAIND (AVG 5.74A)

Inrush ?A

+1V_GPU GFXPG_1V_EN B

(AVG 1.791A) Inrush ?A

+1.8V_GPU GPU_MAIND (AVG 0.966A) Inrush ?A

OCP 20A

Power Distribution List

Power

Distribution

A

A

Quanta Computer Inc. PROJECT : BL6 Size

Document Number

Rev 1A

Power Tree Table Date: 5

4

3

2

Wednesday, April 07, 2010

Sheet 1

43

of

45